X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fbaseband%2Facc100%2Frte_acc100_pmd.h;h=03ed0b3e1a311ea827b29fd16f3c8794c0783623;hb=b29890822981ccb1baa64737a218dc416a079404;hp=5c8dde3a4a6b54d25c8d38d89ba8a58d305f78a0;hpb=060e76729302d226f2b57fa4089135378021a7cb;p=dpdk.git

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.h b/drivers/baseband/acc100/rte_acc100_pmd.h
index 5c8dde3a4a..03ed0b3e1a 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.h
+++ b/drivers/baseband/acc100/rte_acc100_pmd.h
@@ -88,6 +88,8 @@
 #define ACC100_TMPL_PRI_3      0x0f0e0d0c
 #define ACC100_QUEUE_ENABLE    0x80000000  /* Bit to mark Queue as Enabled */
 #define ACC100_WORDS_IN_ARAM_SIZE (128 * 1024 / 4)
+#define ACC100_FDONE    0x80000000
+#define ACC100_SDONE    0x40000000
 
 #define ACC100_NUM_TMPL       32
 /* Mapping of signals for the available engines */
@@ -120,6 +122,9 @@
 #define ACC100_FCW_TD_BLEN                24
 #define ACC100_FCW_LE_BLEN                32
 #define ACC100_FCW_LD_BLEN                36
+#define ACC100_5GUL_SIZE_0                16
+#define ACC100_5GUL_SIZE_1                40
+#define ACC100_5GUL_OFFSET_0              36
 
 #define ACC100_FCW_VER         2
 #define ACC100_MUX_5GDL_DESC   6
@@ -153,6 +158,7 @@
 #define ACC100_RESET_HARD       0x1FF
 #define ACC100_ENGINES_MAX      9
 #define ACC100_LONG_WAIT        1000
+#define ACC100_GPEX_AXIMAP_NUM  17
 
 /* ACC100 DMA Descriptor triplet */
 struct acc100_dma_triplet {
@@ -402,6 +408,7 @@ struct __rte_packed acc100_dma_req_desc {
 union acc100_dma_desc {
 	struct acc100_dma_req_desc req;
 	union acc100_dma_rsp_desc rsp;
+	uint64_t atom_hdr;
 };
 
 
@@ -559,8 +566,16 @@ struct acc100_device {
 	rte_iova_t sw_rings_iova;  /* IOVA address of sw_rings */
 	/* Virtual address of the info memory routed to the this function under
 	 * operation, whether it is PF or VF.
+	 * HW may DMA information data at this location asynchronously
 	 */
+	union acc100_info_ring_data *info_ring;
+
 	union acc100_harq_layout_data *harq_layout;
+	/* Virtual Info Ring head */
+	uint16_t info_ring_head;
+	/* Number of bytes available for each queue in device, depending on
+	 * how many queues are enabled with configure()
+	 */
 	uint32_t sw_ring_size;
 	uint32_t ddr_size; /* Size in kB */
 	uint32_t *tail_ptrs; /* Base address of response tail pointer buffer */
@@ -576,4 +591,12 @@ struct acc100_device {
 	bool configured; /**< True if this ACC100 device is configured */
 };
 
+/**
+ * Structure with details about RTE_BBDEV_EVENT_DEQUEUE event. It's passed to
+ * the callback function.
+ */
+struct acc100_deq_intr_details {
+	uint16_t queue_id;
+};
+
 #endif /* _RTE_ACC100_PMD_H_ */