X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fbus%2Fpci%2Fpci_common.c;h=9b8d769287749027270d9d86ac58a4bdd868e47a;hb=6857cb635821c280afcd7f63e588da52c0048991;hp=62d45041bbdcc6b1dafefaa28331c0d3e0e951c3;hpb=e200535c1ca382c518da810ab484e3f0660d351d;p=dpdk.git

diff --git a/drivers/bus/pci/pci_common.c b/drivers/bus/pci/pci_common.c
index 62d45041bb..9b8d769287 100644
--- a/drivers/bus/pci/pci_common.c
+++ b/drivers/bus/pci/pci_common.c
@@ -67,8 +67,9 @@ pci_name_set(struct rte_pci_device *dev)
 			dev->name, sizeof(dev->name));
 	devargs = pci_devargs_lookup(&dev->addr);
 	dev->device.devargs = devargs;
-	/* In blacklist mode, if the device is not blacklisted, no
-	 * rte_devargs exists for it.
+
+	/* When using a blocklist, only blocked devices will have
+	 * an rte_devargs. Allowed devices won't have one.
 	 */
 	if (devargs != NULL)
 		/* If an rte_devargs exists, the generic rte_device uses the
@@ -172,7 +173,7 @@ rte_pci_probe_one_driver(struct rte_pci_driver *dr,
 
 	loc = &dev->addr;
 
-	/* The device is not blacklisted; Check if driver supports it */
+	/* The device is not blocked; Check if driver supports it */
 	if (!rte_pci_match(dr, dev))
 		/* Match of device and driver failed */
 		return 1;
@@ -181,12 +182,10 @@ rte_pci_probe_one_driver(struct rte_pci_driver *dr,
 			loc->domain, loc->bus, loc->devid, loc->function,
 			dev->device.numa_node);
 
-	/* no initialization when blacklisted, return without error */
+	/* no initialization when marked as blocked, return without error */
 	if (dev->device.devargs != NULL &&
-		dev->device.devargs->policy ==
-			RTE_DEV_BLACKLISTED) {
-		RTE_LOG(INFO, EAL, "  Device is blacklisted, not"
-			" initializing\n");
+		dev->device.devargs->policy == RTE_DEV_BLOCKED) {
+		RTE_LOG(INFO, EAL, "  Device is blocked, not initializing\n");
 		return 1;
 	}
 
@@ -629,14 +628,13 @@ rte_pci_ignore_device(const struct rte_pci_addr *pci_addr)
 	struct rte_devargs *devargs = pci_devargs_lookup(pci_addr);
 
 	switch (rte_pci_bus.bus.conf.scan_mode) {
-	case RTE_BUS_SCAN_WHITELIST:
-		if (devargs && devargs->policy == RTE_DEV_WHITELISTED)
+	case RTE_BUS_SCAN_ALLOWLIST:
+		if (devargs && devargs->policy == RTE_DEV_ALLOWED)
 			return false;
 		break;
 	case RTE_BUS_SCAN_UNDEFINED:
-	case RTE_BUS_SCAN_BLACKLIST:
-		if (devargs == NULL ||
-		    devargs->policy != RTE_DEV_BLACKLISTED)
+	case RTE_BUS_SCAN_BLOCKLIST:
+		if (devargs == NULL || devargs->policy != RTE_DEV_BLOCKED)
 			return false;
 		break;
 	}
@@ -705,6 +703,49 @@ rte_pci_get_iommu_class(void)
 	return iova_mode;
 }
 
+off_t
+rte_pci_find_ext_capability(struct rte_pci_device *dev, uint32_t cap)
+{
+	off_t offset = RTE_PCI_CFG_SPACE_SIZE;
+	uint32_t header;
+	int ttl;
+
+	/* minimum 8 bytes per capability */
+	ttl = (RTE_PCI_CFG_SPACE_EXP_SIZE - RTE_PCI_CFG_SPACE_SIZE) / 8;
+
+	if (rte_pci_read_config(dev, &header, 4, offset) < 0) {
+		RTE_LOG(ERR, EAL, "error in reading extended capabilities\n");
+		return -1;
+	}
+
+	/*
+	 * If we have no capabilities, this is indicated by cap ID,
+	 * cap version and next pointer all being 0.
+	 */
+	if (header == 0)
+		return 0;
+
+	while (ttl != 0) {
+		if (RTE_PCI_EXT_CAP_ID(header) == cap)
+			return offset;
+
+		offset = RTE_PCI_EXT_CAP_NEXT(header);
+
+		if (offset < RTE_PCI_CFG_SPACE_SIZE)
+			break;
+
+		if (rte_pci_read_config(dev, &header, 4, offset) < 0) {
+			RTE_LOG(ERR, EAL,
+				"error in reading extended capabilities\n");
+			return -1;
+		}
+
+		ttl--;
+	}
+
+	return 0;
+}
+
 struct rte_pci_bus rte_pci_bus = {
 	.bus = {
 		.scan = rte_pci_scan,