X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fcommon%2Fcnxk%2Froc_bphy_cgx.c;h=c3be3c90414303fd99440d5936fd9a9cedfe1f03;hb=f137566333308b91503bb18e079f598e9f02bb37;hp=978dbda822337d671395d66cd076da9fa52f8099;hpb=7fb5075a539e806e5f482fa6e3d699a58adbd70f;p=dpdk.git

diff --git a/drivers/common/cnxk/roc_bphy_cgx.c b/drivers/common/cnxk/roc_bphy_cgx.c
index 978dbda822..c3be3c9041 100644
--- a/drivers/common/cnxk/roc_bphy_cgx.c
+++ b/drivers/common/cnxk/roc_bphy_cgx.c
@@ -7,11 +7,14 @@
 #include "roc_api.h"
 #include "roc_priv.h"
 
+#define CGX_CMRX_CONFIG		       0x00
+#define CGX_CMRX_CONFIG_DATA_PKT_RX_EN BIT_ULL(54)
+#define CGX_CMRX_CONFIG_DATA_PKT_TX_EN BIT_ULL(53)
 #define CGX_CMRX_INT		       0x40
 #define CGX_CMRX_INT_OVERFLW	       BIT_ULL(1)
 /*
  * CN10K stores number of lmacs in 4 bit filed
- * in contraty to CN9K which uses only 3 bits.
+ * in contrary to CN9K which uses only 3 bits.
  *
  * In theory masks should differ yet on CN9K
  * bits beyond specified range contain zeros.
@@ -214,6 +217,33 @@ roc_bphy_cgx_lmac_exists(struct roc_bphy_cgx *roc_cgx, unsigned int lmac)
 	       (roc_cgx->lmac_bmap & BIT_ULL(lmac));
 }
 
+static int
+roc_bphy_cgx_start_stop_rxtx(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
+			     bool start)
+{
+	uint64_t val;
+
+	if (!roc_cgx)
+		return -EINVAL;
+
+	if (!roc_bphy_cgx_lmac_exists(roc_cgx, lmac))
+		return -ENODEV;
+
+	pthread_mutex_lock(&roc_cgx->lock);
+	val = roc_bphy_cgx_read(roc_cgx, lmac, CGX_CMRX_CONFIG);
+	val &= ~(CGX_CMRX_CONFIG_DATA_PKT_RX_EN |
+		 CGX_CMRX_CONFIG_DATA_PKT_TX_EN);
+
+	if (start)
+		val |= FIELD_PREP(CGX_CMRX_CONFIG_DATA_PKT_RX_EN, 1) |
+		       FIELD_PREP(CGX_CMRX_CONFIG_DATA_PKT_TX_EN, 1);
+
+	roc_bphy_cgx_write(roc_cgx, lmac, CGX_CMRX_CONFIG, val);
+	pthread_mutex_unlock(&roc_cgx->lock);
+
+	return 0;
+}
+
 static int
 roc_bphy_cgx_intlbk_ena_dis(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
 			    bool enable)
@@ -253,6 +283,18 @@ roc_bphy_cgx_ptp_rx_ena_dis(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
 	return roc_bphy_cgx_intf_req(roc_cgx, lmac, scr1, &scr0);
 }
 
+int
+roc_bphy_cgx_start_rxtx(struct roc_bphy_cgx *roc_cgx, unsigned int lmac)
+{
+	return roc_bphy_cgx_start_stop_rxtx(roc_cgx, lmac, true);
+}
+
+int
+roc_bphy_cgx_stop_rxtx(struct roc_bphy_cgx *roc_cgx, unsigned int lmac)
+{
+	return roc_bphy_cgx_start_stop_rxtx(roc_cgx, lmac, false);
+}
+
 int
 roc_bphy_cgx_set_link_state(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
 			    bool state)
@@ -353,3 +395,46 @@ roc_bphy_cgx_ptp_rx_disable(struct roc_bphy_cgx *roc_cgx, unsigned int lmac)
 {
 	return roc_bphy_cgx_ptp_rx_ena_dis(roc_cgx, lmac, false);
 }
+
+int
+roc_bphy_cgx_fec_set(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
+		     enum roc_bphy_cgx_eth_link_fec fec)
+{
+	uint64_t scr1, scr0;
+
+	if (!roc_cgx)
+		return -EINVAL;
+
+	if (!roc_bphy_cgx_lmac_exists(roc_cgx, lmac))
+		return -ENODEV;
+
+	scr1 = FIELD_PREP(SCR1_ETH_CMD_ID, ETH_CMD_SET_FEC) |
+	       FIELD_PREP(SCR1_ETH_SET_FEC_ARGS, fec);
+
+	return roc_bphy_cgx_intf_req(roc_cgx, lmac, scr1, &scr0);
+}
+
+int
+roc_bphy_cgx_fec_supported_get(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
+			       enum roc_bphy_cgx_eth_link_fec *fec)
+{
+	uint64_t scr1, scr0;
+	int ret;
+
+	if (!roc_cgx || !fec)
+		return -EINVAL;
+
+	if (!roc_bphy_cgx_lmac_exists(roc_cgx, lmac))
+		return -ENODEV;
+
+	scr1 = FIELD_PREP(SCR1_ETH_CMD_ID, ETH_CMD_GET_SUPPORTED_FEC);
+
+	ret = roc_bphy_cgx_intf_req(roc_cgx, lmac, scr1, &scr0);
+	if (ret)
+		return ret;
+
+	scr0 = FIELD_GET(SCR0_ETH_FEC_TYPES_S_FEC, scr0);
+	*fec = (enum roc_bphy_cgx_eth_link_fec)scr0;
+
+	return 0;
+}