X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fcommon%2Fcnxk%2Froc_platform.h;h=7864fa4ff4eb435aab2d492723d406e201f29ab7;hb=81c7f0e42221a3fd00d77f54e09491b1fdf83259;hp=1d064353142bd4c97835060e4e24ff93b6523f8e;hpb=014a9e222bac8763dbc2f635383d1d5c81598ff5;p=dpdk.git

diff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h
index 1d06435314..7864fa4ff4 100644
--- a/drivers/common/cnxk/roc_platform.h
+++ b/drivers/common/cnxk/roc_platform.h
@@ -23,9 +23,14 @@
 #include "roc_bits.h"
 
 #if defined(__ARM_FEATURE_SVE)
-#define PLT_CPU_FEATURE_PREAMBLE ".cpu generic+crc+lse+sve\n"
+#define PLT_CPU_FEATURE_PREAMBLE                                               \
+	".arch_extension crc\n"                                                \
+	".arch_extension lse\n"                                                \
+	".arch_extension sve\n"
 #else
-#define PLT_CPU_FEATURE_PREAMBLE ".cpu generic+crc+lse\n"
+#define PLT_CPU_FEATURE_PREAMBLE                                               \
+	".arch_extension crc\n"                                                \
+	".arch_extension lse\n"
 #endif
 
 #define PLT_ASSERT		 RTE_ASSERT
@@ -132,33 +137,59 @@
 #define plt_strlcpy rte_strlcpy
 
 /* Log */
+extern int cnxk_logtype_base;
+extern int cnxk_logtype_mbox;
+extern int cnxk_logtype_npa;
+extern int cnxk_logtype_nix;
+extern int cnxk_logtype_npc;
+extern int cnxk_logtype_sso;
+extern int cnxk_logtype_tim;
+extern int cnxk_logtype_tm;
+
 #define plt_err(fmt, args...)                                                  \
 	RTE_LOG(ERR, PMD, "%s():%u " fmt "\n", __func__, __LINE__, ##args)
 #define plt_info(fmt, args...) RTE_LOG(INFO, PMD, fmt "\n", ##args)
 #define plt_warn(fmt, args...) RTE_LOG(WARNING, PMD, fmt "\n", ##args)
 #define plt_print(fmt, args...) RTE_LOG(INFO, PMD, fmt "\n", ##args)
 
+/**
+ * Log debug message if given subsystem logging is enabled.
+ */
+#define plt_dbg(subsystem, fmt, args...)                                       \
+	rte_log(RTE_LOG_DEBUG, cnxk_logtype_##subsystem,                       \
+		"[%s] %s():%u " fmt "\n", #subsystem, __func__, __LINE__,      \
+		##args)
+
+#define plt_base_dbg(fmt, ...)	plt_dbg(base, fmt, ##__VA_ARGS__)
+#define plt_mbox_dbg(fmt, ...)	plt_dbg(mbox, fmt, ##__VA_ARGS__)
+#define plt_npa_dbg(fmt, ...)	plt_dbg(npa, fmt, ##__VA_ARGS__)
+#define plt_nix_dbg(fmt, ...)	plt_dbg(nix, fmt, ##__VA_ARGS__)
+#define plt_npc_dbg(fmt, ...)	plt_dbg(npc, fmt, ##__VA_ARGS__)
+#define plt_sso_dbg(fmt, ...)	plt_dbg(sso, fmt, ##__VA_ARGS__)
+#define plt_tim_dbg(fmt, ...)	plt_dbg(tim, fmt, ##__VA_ARGS__)
+#define plt_tm_dbg(fmt, ...)	plt_dbg(tm, fmt, ##__VA_ARGS__)
+
 #ifdef __cplusplus
-#define CNXK_PCI_ID(subsystem_dev, dev)				\
-	{							\
-		RTE_CLASS_ANY_ID,				\
-		PCI_VENDOR_ID_CAVIUM,				\
-		(dev),						\
-		PCI_ANY_ID,					\
-		(subsystem_dev),				\
+#define CNXK_PCI_ID(subsystem_dev, dev)                                        \
+	{                                                                      \
+		RTE_CLASS_ANY_ID, PCI_VENDOR_ID_CAVIUM, (dev), RTE_PCI_ANY_ID, \
+			(subsystem_dev),                                       \
 	}
 #else
-#define CNXK_PCI_ID(subsystem_dev, dev)				\
-	{							\
-		.class_id = RTE_CLASS_ANY_ID,			\
-		.vendor_id = PCI_VENDOR_ID_CAVIUM,		\
-		.device_id = (dev),				\
-		.subsystem_vendor_id = PCI_ANY_ID,		\
-		.subsystem_device_id = (subsystem_dev),		\
+#define CNXK_PCI_ID(subsystem_dev, dev)                                        \
+	{                                                                      \
+		.class_id = RTE_CLASS_ANY_ID,                                  \
+		.vendor_id = PCI_VENDOR_ID_CAVIUM, .device_id = (dev),         \
+		.subsystem_vendor_id = RTE_PCI_ANY_ID,                         \
+		.subsystem_device_id = (subsystem_dev),                        \
 	}
 #endif
 
 __rte_internal
 int roc_plt_init(void);
 
+/* Init callbacks */
+typedef int (*roc_plt_init_cb_t)(void);
+int __roc_api roc_plt_init_cb_register(roc_plt_init_cb_t cb);
+
 #endif /* _ROC_PLATFORM_H_ */