X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fcommon%2Fcnxk%2Froc_platform.h;h=adfb88c68dc80b26e53aa4944e1b1b6f0a121469;hb=bce33776a72a0b52d78999d8786099a916d48320;hp=be586257131db2712b310c92910e7e963feb264b;hpb=9854e5db5d973e0b59330022cd1bfbb0ff3df3c8;p=dpdk.git diff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h index be58625713..adfb88c68d 100644 --- a/drivers/common/cnxk/roc_platform.h +++ b/drivers/common/cnxk/roc_platform.h @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -19,6 +20,8 @@ #include #include #include +#include +#include #include "roc_bits.h" @@ -37,19 +40,27 @@ #define PLT_MEMZONE_NAMESIZE RTE_MEMZONE_NAMESIZE #define PLT_STD_C11 RTE_STD_C11 #define PLT_PTR_ADD RTE_PTR_ADD +#define PLT_PTR_DIFF RTE_PTR_DIFF #define PLT_MAX_RXTX_INTR_VEC_ID RTE_MAX_RXTX_INTR_VEC_ID #define PLT_INTR_VEC_RXTX_OFFSET RTE_INTR_VEC_RXTX_OFFSET #define PLT_MIN RTE_MIN #define PLT_MAX RTE_MAX #define PLT_DIM RTE_DIM #define PLT_SET_USED RTE_SET_USED +#define PLT_SWAP RTE_SWAP #define PLT_STATIC_ASSERT(s) _Static_assert(s, #s) #define PLT_ALIGN RTE_ALIGN #define PLT_ALIGN_MUL_CEIL RTE_ALIGN_MUL_CEIL #define PLT_MODEL_MZ_NAME "roc_model_mz" #define PLT_CACHE_LINE_SIZE RTE_CACHE_LINE_SIZE #define BITMASK_ULL GENMASK_ULL +#define PLT_ALIGN_CEIL RTE_ALIGN_CEIL +#define PLT_INIT RTE_INIT +#define PLT_TAILQ_FOREACH_SAFE RTE_TAILQ_FOREACH_SAFE +#ifndef PLT_ETHER_ADDR_LEN +#define PLT_ETHER_ADDR_LEN RTE_ETHER_ADDR_LEN +#endif /** Divide ceil */ #define PLT_DIV_CEIL(x, y) \ ({ \ @@ -61,9 +72,11 @@ #define __plt_cache_aligned __rte_cache_aligned #define __plt_always_inline __rte_always_inline #define __plt_packed __rte_packed +#define __plt_unused __rte_unused #define __roc_api __rte_internal #define plt_iova_t rte_iova_t +#define plt_pci_addr rte_pci_addr #define plt_pci_device rte_pci_device #define plt_pci_read_config rte_pci_read_config #define plt_pci_find_ext_capability rte_pci_find_ext_capability @@ -76,6 +89,8 @@ #define plt_cpu_to_be_64 rte_cpu_to_be_64 #define plt_be_to_cpu_64 rte_be_to_cpu_64 +#define plt_aligned __rte_aligned +#define plt_align32pow2 rte_align32pow2 #define plt_align32prevpow2 rte_align32prevpow2 #define plt_bitmap rte_bitmap @@ -100,6 +115,33 @@ #define plt_thread_is_intr rte_thread_is_intr #define plt_intr_callback_fn rte_intr_callback_fn +#define plt_intr_efd_counter_size_get rte_intr_efd_counter_size_get +#define plt_intr_efd_counter_size_set rte_intr_efd_counter_size_set +#define plt_intr_vec_list_index_get rte_intr_vec_list_index_get +#define plt_intr_vec_list_index_set rte_intr_vec_list_index_set +#define plt_intr_vec_list_alloc rte_intr_vec_list_alloc +#define plt_intr_vec_list_free rte_intr_vec_list_free +#define plt_intr_fd_set rte_intr_fd_set +#define plt_intr_fd_get rte_intr_fd_get +#define plt_intr_dev_fd_get rte_intr_dev_fd_get +#define plt_intr_dev_fd_set rte_intr_dev_fd_set +#define plt_intr_type_get rte_intr_type_get +#define plt_intr_type_set rte_intr_type_set +#define plt_intr_instance_alloc rte_intr_instance_alloc +#define plt_intr_instance_dup rte_intr_instance_dup +#define plt_intr_instance_free rte_intr_instance_free +#define plt_intr_event_list_update rte_intr_event_list_update +#define plt_intr_max_intr_get rte_intr_max_intr_get +#define plt_intr_max_intr_set rte_intr_max_intr_set +#define plt_intr_nb_efd_get rte_intr_nb_efd_get +#define plt_intr_nb_efd_set rte_intr_nb_efd_set +#define plt_intr_nb_intr_get rte_intr_nb_intr_get +#define plt_intr_nb_intr_set rte_intr_nb_intr_set +#define plt_intr_efds_index_get rte_intr_efds_index_get +#define plt_intr_efds_index_set rte_intr_efds_index_set +#define plt_intr_elist_index_get rte_intr_elist_index_get +#define plt_intr_elist_index_set rte_intr_elist_index_set + #define plt_alarm_set rte_eal_alarm_set #define plt_alarm_cancel rte_eal_alarm_cancel @@ -112,10 +154,11 @@ #define plt_write64(val, addr) \ rte_write64_relaxed((val), (volatile void *)(addr)) -#define plt_wmb() rte_wmb() -#define plt_rmb() rte_rmb() -#define plt_io_wmb() rte_io_wmb() -#define plt_io_rmb() rte_io_rmb() +#define plt_wmb() rte_wmb() +#define plt_rmb() rte_rmb() +#define plt_io_wmb() rte_io_wmb() +#define plt_io_rmb() rte_io_rmb() +#define plt_atomic_thread_fence rte_atomic_thread_fence #define plt_mmap mmap #define PLT_PROT_READ PROT_READ @@ -138,21 +181,39 @@ #define plt_strlcpy rte_strlcpy +#define PLT_TEL_INT_VAL RTE_TEL_INT_VAL +#define PLT_TEL_STRING_VAL RTE_TEL_STRING_VAL +#define plt_tel_data rte_tel_data +#define plt_tel_data_start_array rte_tel_data_start_array +#define plt_tel_data_add_array_int rte_tel_data_add_array_int +#define plt_tel_data_add_array_string rte_tel_data_add_array_string +#define plt_tel_data_start_dict rte_tel_data_start_dict +#define plt_tel_data_add_dict_int rte_tel_data_add_dict_int +#define plt_tel_data_add_dict_ptr(d, n, v) \ + rte_tel_data_add_dict_u64(d, n, (uint64_t)v) +#define plt_tel_data_add_dict_string rte_tel_data_add_dict_string +#define plt_tel_data_add_dict_u64 rte_tel_data_add_dict_u64 +#define plt_telemetry_register_cmd rte_telemetry_register_cmd + /* Log */ extern int cnxk_logtype_base; extern int cnxk_logtype_mbox; +extern int cnxk_logtype_cpt; extern int cnxk_logtype_npa; extern int cnxk_logtype_nix; extern int cnxk_logtype_npc; extern int cnxk_logtype_sso; extern int cnxk_logtype_tim; extern int cnxk_logtype_tm; +extern int cnxk_logtype_ree; #define plt_err(fmt, args...) \ RTE_LOG(ERR, PMD, "%s():%u " fmt "\n", __func__, __LINE__, ##args) #define plt_info(fmt, args...) RTE_LOG(INFO, PMD, fmt "\n", ##args) #define plt_warn(fmt, args...) RTE_LOG(WARNING, PMD, fmt "\n", ##args) #define plt_print(fmt, args...) RTE_LOG(INFO, PMD, fmt "\n", ##args) +#define plt_dump(fmt, ...) fprintf(stderr, fmt "\n", ##__VA_ARGS__) +#define plt_dump_no_nl(fmt, ...) fprintf(stderr, fmt, ##__VA_ARGS__) /** * Log debug message if given subsystem logging is enabled. @@ -160,9 +221,10 @@ extern int cnxk_logtype_tm; #define plt_dbg(subsystem, fmt, args...) \ rte_log(RTE_LOG_DEBUG, cnxk_logtype_##subsystem, \ "[%s] %s():%u " fmt "\n", #subsystem, __func__, __LINE__, \ - ##args) +##args) #define plt_base_dbg(fmt, ...) plt_dbg(base, fmt, ##__VA_ARGS__) +#define plt_cpt_dbg(fmt, ...) plt_dbg(cpt, fmt, ##__VA_ARGS__) #define plt_mbox_dbg(fmt, ...) plt_dbg(mbox, fmt, ##__VA_ARGS__) #define plt_npa_dbg(fmt, ...) plt_dbg(npa, fmt, ##__VA_ARGS__) #define plt_nix_dbg(fmt, ...) plt_dbg(nix, fmt, ##__VA_ARGS__) @@ -170,21 +232,28 @@ extern int cnxk_logtype_tm; #define plt_sso_dbg(fmt, ...) plt_dbg(sso, fmt, ##__VA_ARGS__) #define plt_tim_dbg(fmt, ...) plt_dbg(tim, fmt, ##__VA_ARGS__) #define plt_tm_dbg(fmt, ...) plt_dbg(tm, fmt, ##__VA_ARGS__) +#define plt_ree_dbg(fmt, ...) plt_dbg(ree, fmt, ##__VA_ARGS__) + +/* Datapath logs */ +#define plt_dp_err(fmt, args...) \ + RTE_LOG_DP(ERR, PMD, "%s():%u " fmt "\n", __func__, __LINE__, ##args) +#define plt_dp_info(fmt, args...) \ + RTE_LOG_DP(INFO, PMD, "%s():%u " fmt "\n", __func__, __LINE__, ##args) #ifdef __cplusplus #define CNXK_PCI_ID(subsystem_dev, dev) \ - { \ - RTE_CLASS_ANY_ID, PCI_VENDOR_ID_CAVIUM, (dev), RTE_PCI_ANY_ID, \ - (subsystem_dev), \ - } +{ \ + RTE_CLASS_ANY_ID, PCI_VENDOR_ID_CAVIUM, (dev), RTE_PCI_ANY_ID, \ + (subsystem_dev), \ +} #else #define CNXK_PCI_ID(subsystem_dev, dev) \ - { \ - .class_id = RTE_CLASS_ANY_ID, \ - .vendor_id = PCI_VENDOR_ID_CAVIUM, .device_id = (dev), \ - .subsystem_vendor_id = RTE_PCI_ANY_ID, \ - .subsystem_device_id = (subsystem_dev), \ - } +{ \ + .class_id = RTE_CLASS_ANY_ID, \ + .vendor_id = PCI_VENDOR_ID_CAVIUM, .device_id = (dev), \ + .subsystem_vendor_id = RTE_PCI_ANY_ID, \ + .subsystem_device_id = (subsystem_dev), \ +} #endif __rte_internal