X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fcommon%2Fcpt%2Fcpt_ucode.h;h=05366207101b804023854fccb6cb43dada9e8345;hb=e961c8e31e9660876b16adca596dafe419aa5d1b;hp=763355fb1f03d6fa60b9cc6ab7b149faf04313f1;hpb=4be717272e5f73ca14b0a029b1449977c75cf994;p=dpdk.git diff --git a/drivers/common/cpt/cpt_ucode.h b/drivers/common/cpt/cpt_ucode.h index 763355fb1f..0536620710 100644 --- a/drivers/common/cpt/cpt_ucode.h +++ b/drivers/common/cpt/cpt_ucode.h @@ -35,21 +35,62 @@ gen_key_snow3g(const uint8_t *ck, uint32_t *keyx) } } +static __rte_always_inline int +cpt_mac_len_verify(struct rte_crypto_auth_xform *auth) +{ + uint16_t mac_len = auth->digest_length; + int ret; + + switch (auth->algo) { + case RTE_CRYPTO_AUTH_MD5: + case RTE_CRYPTO_AUTH_MD5_HMAC: + ret = (mac_len == 16) ? 0 : -1; + break; + case RTE_CRYPTO_AUTH_SHA1: + case RTE_CRYPTO_AUTH_SHA1_HMAC: + ret = (mac_len == 20) ? 0 : -1; + break; + case RTE_CRYPTO_AUTH_SHA224: + case RTE_CRYPTO_AUTH_SHA224_HMAC: + ret = (mac_len == 28) ? 0 : -1; + break; + case RTE_CRYPTO_AUTH_SHA256: + case RTE_CRYPTO_AUTH_SHA256_HMAC: + ret = (mac_len == 32) ? 0 : -1; + break; + case RTE_CRYPTO_AUTH_SHA384: + case RTE_CRYPTO_AUTH_SHA384_HMAC: + ret = (mac_len == 48) ? 0 : -1; + break; + case RTE_CRYPTO_AUTH_SHA512: + case RTE_CRYPTO_AUTH_SHA512_HMAC: + ret = (mac_len == 64) ? 0 : -1; + break; + case RTE_CRYPTO_AUTH_NULL: + ret = 0; + break; + default: + ret = -1; + } + + return ret; +} + static __rte_always_inline void -cpt_fc_salt_update(void *ctx, +cpt_fc_salt_update(struct cpt_ctx *cpt_ctx, uint8_t *salt) { - struct cpt_ctx *cpt_ctx = ctx; - memcpy(&cpt_ctx->fctx.enc.encr_iv, salt, 4); + mc_fc_context_t *fctx = &cpt_ctx->mc_ctx.fctx; + memcpy(fctx->enc.encr_iv, salt, 4); } static __rte_always_inline int cpt_fc_ciph_validate_key_aes(uint16_t key_len) { switch (key_len) { - case CPT_BYTE_16: - case CPT_BYTE_24: - case CPT_BYTE_32: + case 16: + case 24: + case 32: return 0; default: return -1; @@ -82,7 +123,7 @@ cpt_fc_ciph_set_type(cipher_type_t type, struct cpt_ctx *ctx, uint16_t key_len) break; case AES_XTS: key_len = key_len / 2; - if (unlikely(key_len == CPT_BYTE_24)) { + if (unlikely(key_len == 24)) { CPT_LOG_DP_ERR("Invalid AES key len for XTS"); return -1; } @@ -128,13 +169,13 @@ cpt_fc_ciph_set_key_set_aes_key_type(mc_fc_context_t *fctx, uint16_t key_len) { mc_aes_type_t aes_key_type = 0; switch (key_len) { - case CPT_BYTE_16: + case 16: aes_key_type = AES_128_BIT; break; - case CPT_BYTE_24: + case 24: aes_key_type = AES_192_BIT; break; - case CPT_BYTE_32: + case 32: aes_key_type = AES_256_BIT; break; default: @@ -149,10 +190,12 @@ static __rte_always_inline void cpt_fc_ciph_set_key_snow3g_uea2(struct cpt_ctx *cpt_ctx, const uint8_t *key, uint16_t key_len) { + mc_zuc_snow3g_ctx_t *zs_ctx = &cpt_ctx->mc_ctx.zs_ctx; uint32_t keyx[4]; + cpt_ctx->snow3g = 1; gen_key_snow3g(key, keyx); - memcpy(cpt_ctx->zs_ctx.ci_key, keyx, key_len); + memcpy(zs_ctx->ci_key, keyx, key_len); cpt_ctx->zsk_flags = 0; } @@ -160,9 +203,11 @@ static __rte_always_inline void cpt_fc_ciph_set_key_zuc_eea3(struct cpt_ctx *cpt_ctx, const uint8_t *key, uint16_t key_len) { + mc_zuc_snow3g_ctx_t *zs_ctx = &cpt_ctx->mc_ctx.zs_ctx; + cpt_ctx->snow3g = 0; - memcpy(cpt_ctx->zs_ctx.ci_key, key, key_len); - memcpy(cpt_ctx->zs_ctx.zuc_const, zuc_d, 32); + memcpy(zs_ctx->ci_key, key, key_len); + memcpy(zs_ctx->zuc_const, zuc_d, 32); cpt_ctx->zsk_flags = 0; } @@ -170,8 +215,10 @@ static __rte_always_inline void cpt_fc_ciph_set_key_kasumi_f8_ecb(struct cpt_ctx *cpt_ctx, const uint8_t *key, uint16_t key_len) { + mc_kasumi_ctx_t *k_ctx = &cpt_ctx->mc_ctx.k_ctx; + cpt_ctx->k_ecb = 1; - memcpy(cpt_ctx->k_ctx.ci_key, key, key_len); + memcpy(k_ctx->ci_key, key, key_len); cpt_ctx->zsk_flags = 0; } @@ -179,16 +226,17 @@ static __rte_always_inline void cpt_fc_ciph_set_key_kasumi_f8_cbc(struct cpt_ctx *cpt_ctx, const uint8_t *key, uint16_t key_len) { - memcpy(cpt_ctx->k_ctx.ci_key, key, key_len); + mc_kasumi_ctx_t *k_ctx = &cpt_ctx->mc_ctx.k_ctx; + + memcpy(k_ctx->ci_key, key, key_len); cpt_ctx->zsk_flags = 0; } static __rte_always_inline int -cpt_fc_ciph_set_key(void *ctx, cipher_type_t type, const uint8_t *key, - uint16_t key_len, uint8_t *salt) +cpt_fc_ciph_set_key(struct cpt_ctx *cpt_ctx, cipher_type_t type, + const uint8_t *key, uint16_t key_len, uint8_t *salt) { - struct cpt_ctx *cpt_ctx = ctx; - mc_fc_context_t *fctx = &cpt_ctx->fctx; + mc_fc_context_t *fctx = &cpt_ctx->mc_ctx.fctx; int ret; ret = cpt_fc_ciph_set_type(type, cpt_ctx, key_len); @@ -439,10 +487,8 @@ cpt_digest_gen_prep(uint32_t flags, uint32_t g_size_bytes, s_size_bytes; uint64_t dptr_dma, rptr_dma; vq_cmd_word0_t vq_cmd_w0; - vq_cmd_word3_t vq_cmd_w3; void *c_vaddr, *m_vaddr; uint64_t c_dma, m_dma; - opcode_info_t opcode; ctx = params->ctx_buf.vaddr; meta_p = ¶ms->meta_buf; @@ -477,31 +523,27 @@ cpt_digest_gen_prep(uint32_t flags, data_len = AUTH_DLEN(d_lens); /*GP op header */ - vq_cmd_w0.u64 = 0; + vq_cmd_w0.s.opcode.minor = 0; vq_cmd_w0.s.param2 = ((uint16_t)hash_type << 8); if (ctx->hmac) { - opcode.s.major = CPT_MAJOR_OP_HMAC | CPT_DMA_MODE; + vq_cmd_w0.s.opcode.major = CPT_MAJOR_OP_HMAC | CPT_DMA_MODE; vq_cmd_w0.s.param1 = key_len; - vq_cmd_w0.s.dlen = data_len + ROUNDUP8(key_len); + vq_cmd_w0.s.dlen = data_len + RTE_ALIGN_CEIL(key_len, 8); } else { - opcode.s.major = CPT_MAJOR_OP_HASH | CPT_DMA_MODE; + vq_cmd_w0.s.opcode.major = CPT_MAJOR_OP_HASH | CPT_DMA_MODE; vq_cmd_w0.s.param1 = 0; vq_cmd_w0.s.dlen = data_len; } - opcode.s.minor = 0; - /* Null auth only case enters the if */ if (unlikely(!hash_type && !ctx->enc_cipher)) { - opcode.s.major = CPT_MAJOR_OP_MISC; + vq_cmd_w0.s.opcode.major = CPT_MAJOR_OP_MISC; /* Minor op is passthrough */ - opcode.s.minor = 0x03; + vq_cmd_w0.s.opcode.minor = 0x03; /* Send out completion code only */ vq_cmd_w0.s.param2 = 0x1; } - vq_cmd_w0.s.opcode = opcode.flags; - /* DPTR has SG list */ in_buffer = m_vaddr; dptr_dma = m_dma; @@ -522,7 +564,8 @@ cpt_digest_gen_prep(uint32_t flags, uint64_t k_dma = params->ctx_buf.dma_addr + offsetof(struct cpt_ctx, auth_key); /* Key */ - i = fill_sg_comp(gather_comp, i, k_dma, ROUNDUP8(key_len)); + i = fill_sg_comp(gather_comp, i, k_dma, + RTE_ALIGN_CEIL(key_len, 8)); } /* input data */ @@ -592,9 +635,6 @@ cpt_digest_gen_prep(uint32_t flags, req->ist.ei1 = dptr_dma; req->ist.ei2 = rptr_dma; - /* vq command w3 */ - vq_cmd_w3.u64 = 0; - /* 16 byte aligned cpt res address */ req->completion_addr = (uint64_t *)((uint8_t *)c_vaddr); *req->completion_addr = COMPLETION_CODE_INIT; @@ -602,7 +642,6 @@ cpt_digest_gen_prep(uint32_t flags, /* Fill microcode part of instruction */ req->ist.ei0 = vq_cmd_w0.u64; - req->ist.ei3 = vq_cmd_w3.u64; req->op = op; @@ -630,12 +669,10 @@ cpt_enc_hmac_prep(uint32_t flags, uint32_t encr_data_len, auth_data_len, aad_len = 0; uint32_t passthrough_len = 0; void *m_vaddr, *offset_vaddr; - uint64_t m_dma, offset_dma, ctx_dma; + uint64_t m_dma, offset_dma; vq_cmd_word0_t vq_cmd_w0; - vq_cmd_word3_t vq_cmd_w3; void *c_vaddr; uint64_t c_dma; - opcode_info_t opcode; meta_p = &fc_params->meta_buf; m_vaddr = meta_p->vaddr; @@ -714,8 +751,8 @@ cpt_enc_hmac_prep(uint32_t flags, } /* Encryption */ - opcode.s.major = CPT_MAJOR_OP_FC; - opcode.s.minor = 0; + vq_cmd_w0.s.opcode.major = CPT_MAJOR_OP_FC; + vq_cmd_w0.s.opcode.minor = 0; if (hash_type == GMAC_TYPE) { encr_offset = 0; @@ -726,10 +763,12 @@ cpt_enc_hmac_prep(uint32_t flags, enc_dlen = encr_data_len + encr_offset; if (unlikely(encr_data_len & 0xf)) { if ((cipher_type == DES3_CBC) || (cipher_type == DES3_ECB)) - enc_dlen = ROUNDUP8(encr_data_len) + encr_offset; + enc_dlen = RTE_ALIGN_CEIL(encr_data_len, 8) + + encr_offset; else if (likely((cipher_type == AES_CBC) || (cipher_type == AES_ECB))) - enc_dlen = ROUNDUP16(encr_data_len) + encr_offset; + enc_dlen = RTE_ALIGN_CEIL(encr_data_len, 8) + + encr_offset; } if (unlikely(auth_dlen > enc_dlen)) { @@ -741,7 +780,6 @@ cpt_enc_hmac_prep(uint32_t flags, } /* GP op header */ - vq_cmd_w0.u64 = 0; vq_cmd_w0.s.param1 = encr_data_len; vq_cmd_w0.s.param2 = auth_data_len; /* @@ -772,8 +810,6 @@ cpt_enc_hmac_prep(uint32_t flags, vq_cmd_w0.s.dlen = inputlen + OFF_CTRL_LEN; - vq_cmd_w0.s.opcode = opcode.flags; - if (likely(iv_len)) { uint64_t *dest = (uint64_t *)((uint8_t *)offset_vaddr + OFF_CTRL_LEN); @@ -802,9 +838,7 @@ cpt_enc_hmac_prep(uint32_t flags, m_vaddr = (uint8_t *)m_vaddr + size; m_dma += size; - opcode.s.major |= CPT_DMA_MODE; - - vq_cmd_w0.s.opcode = opcode.flags; + vq_cmd_w0.s.opcode.major |= CPT_DMA_MODE; if (likely(iv_len)) { uint64_t *dest = (uint64_t *)((uint8_t *)offset_vaddr @@ -962,13 +996,6 @@ cpt_enc_hmac_prep(uint32_t flags, req->ist.ei2 = rptr_dma; } - ctx_dma = fc_params->ctx_buf.dma_addr + - offsetof(struct cpt_ctx, fctx); - /* vq command w3 */ - vq_cmd_w3.u64 = 0; - vq_cmd_w3.s.grp = 0; - vq_cmd_w3.s.cptr = ctx_dma; - /* 16 byte aligned cpt res address */ req->completion_addr = (uint64_t *)((uint8_t *)c_vaddr); *req->completion_addr = COMPLETION_CODE_INIT; @@ -976,7 +1003,6 @@ cpt_enc_hmac_prep(uint32_t flags, /* Fill microcode part of instruction */ req->ist.ei0 = vq_cmd_w0.u64; - req->ist.ei3 = vq_cmd_w3.u64; req->op = op; @@ -1003,10 +1029,8 @@ cpt_dec_hmac_prep(uint32_t flags, uint32_t encr_data_len, auth_data_len, aad_len = 0; uint32_t passthrough_len = 0; void *m_vaddr, *offset_vaddr; - uint64_t m_dma, offset_dma, ctx_dma; - opcode_info_t opcode; + uint64_t m_dma, offset_dma; vq_cmd_word0_t vq_cmd_w0; - vq_cmd_word3_t vq_cmd_w3; void *c_vaddr; uint64_t c_dma; @@ -1087,8 +1111,8 @@ cpt_dec_hmac_prep(uint32_t flags, m_dma += size; /* Decryption */ - opcode.s.major = CPT_MAJOR_OP_FC; - opcode.s.minor = 1; + vq_cmd_w0.s.opcode.major = CPT_MAJOR_OP_FC; + vq_cmd_w0.s.opcode.minor = 1; if (hash_type == GMAC_TYPE) { encr_offset = 0; @@ -1106,7 +1130,6 @@ cpt_dec_hmac_prep(uint32_t flags, outputlen = enc_dlen; } - vq_cmd_w0.u64 = 0; vq_cmd_w0.s.param1 = encr_data_len; vq_cmd_w0.s.param2 = auth_data_len; @@ -1143,8 +1166,6 @@ cpt_dec_hmac_prep(uint32_t flags, vq_cmd_w0.s.dlen = inputlen + OFF_CTRL_LEN; - vq_cmd_w0.s.opcode = opcode.flags; - if (likely(iv_len)) { uint64_t *dest = (uint64_t *)((uint8_t *)offset_vaddr + OFF_CTRL_LEN); @@ -1174,9 +1195,7 @@ cpt_dec_hmac_prep(uint32_t flags, m_vaddr = (uint8_t *)m_vaddr + size; m_dma += size; - opcode.s.major |= CPT_DMA_MODE; - - vq_cmd_w0.s.opcode = opcode.flags; + vq_cmd_w0.s.opcode.major |= CPT_DMA_MODE; if (likely(iv_len)) { uint64_t *dest = (uint64_t *)((uint8_t *)offset_vaddr + @@ -1347,13 +1366,6 @@ cpt_dec_hmac_prep(uint32_t flags, req->ist.ei2 = rptr_dma; } - ctx_dma = fc_params->ctx_buf.dma_addr + - offsetof(struct cpt_ctx, fctx); - /* vq command w3 */ - vq_cmd_w3.u64 = 0; - vq_cmd_w3.s.grp = 0; - vq_cmd_w3.s.cptr = ctx_dma; - /* 16 byte aligned cpt res address */ req->completion_addr = (uint64_t *)((uint8_t *)c_vaddr); *req->completion_addr = COMPLETION_CODE_INIT; @@ -1361,7 +1373,6 @@ cpt_dec_hmac_prep(uint32_t flags, /* Fill microcode part of instruction */ req->ist.ei0 = vq_cmd_w0.u64; - req->ist.ei3 = vq_cmd_w3.u64; req->op = op; @@ -1392,8 +1403,6 @@ cpt_zuc_snow3g_enc_prep(uint32_t req_flags, uint64_t *offset_vaddr, offset_dma; uint32_t *iv_s, iv[4]; vq_cmd_word0_t vq_cmd_w0; - vq_cmd_word3_t vq_cmd_w3; - opcode_info_t opcode; buf_p = ¶ms->meta_buf; m_vaddr = buf_p->vaddr; @@ -1427,11 +1436,11 @@ cpt_zuc_snow3g_enc_prep(uint32_t req_flags, m_vaddr = (uint8_t *)m_vaddr + size; m_dma += size; - opcode.s.major = CPT_MAJOR_OP_ZUC_SNOW3G; + vq_cmd_w0.s.opcode.major = CPT_MAJOR_OP_ZUC_SNOW3G; /* indicates CPTR ctx, operation type, KEY & IV mode from DPTR */ - opcode.s.minor = ((1 << 7) | (snow3g << 5) | (0 << 4) | + vq_cmd_w0.s.opcode.minor = ((1 << 7) | (snow3g << 5) | (0 << 4) | (0 << 3) | (flags & 0x7)); if (flags == 0x1) { @@ -1494,7 +1503,6 @@ cpt_zuc_snow3g_enc_prep(uint32_t req_flags, /* * GP op header, lengths are expected in bits. */ - vq_cmd_w0.u64 = 0; vq_cmd_w0.s.param1 = encr_data_len; vq_cmd_w0.s.param2 = auth_data_len; @@ -1527,8 +1535,6 @@ cpt_zuc_snow3g_enc_prep(uint32_t req_flags, vq_cmd_w0.s.dlen = inputlen + OFF_CTRL_LEN; - vq_cmd_w0.s.opcode = opcode.flags; - if (likely(iv_len)) { uint32_t *iv_d = (uint32_t *)((uint8_t *)offset_vaddr + OFF_CTRL_LEN); @@ -1551,9 +1557,7 @@ cpt_zuc_snow3g_enc_prep(uint32_t req_flags, m_vaddr = (uint8_t *)m_vaddr + OFF_CTRL_LEN + iv_len; m_dma += OFF_CTRL_LEN + iv_len; - opcode.s.major |= CPT_DMA_MODE; - - vq_cmd_w0.s.opcode = opcode.flags; + vq_cmd_w0.s.opcode.major |= CPT_DMA_MODE; /* DPTR has SG list */ in_buffer = m_vaddr; @@ -1669,12 +1673,6 @@ cpt_zuc_snow3g_enc_prep(uint32_t req_flags, req->ist.ei2 = rptr_dma; } - /* vq command w3 */ - vq_cmd_w3.u64 = 0; - vq_cmd_w3.s.grp = 0; - vq_cmd_w3.s.cptr = params->ctx_buf.dma_addr + - offsetof(struct cpt_ctx, zs_ctx); - /* 16 byte aligned cpt res address */ req->completion_addr = (uint64_t *)((uint8_t *)c_vaddr); *req->completion_addr = COMPLETION_CODE_INIT; @@ -1682,7 +1680,6 @@ cpt_zuc_snow3g_enc_prep(uint32_t req_flags, /* Fill microcode part of instruction */ req->ist.ei0 = vq_cmd_w0.u64; - req->ist.ei3 = vq_cmd_w3.u64; req->op = op; @@ -1712,8 +1709,6 @@ cpt_zuc_snow3g_dec_prep(uint32_t req_flags, uint64_t *offset_vaddr, offset_dma; uint32_t *iv_s, iv[4], j; vq_cmd_word0_t vq_cmd_w0; - vq_cmd_word3_t vq_cmd_w3; - opcode_info_t opcode; buf_p = ¶ms->meta_buf; m_vaddr = buf_p->vaddr; @@ -1752,11 +1747,12 @@ cpt_zuc_snow3g_dec_prep(uint32_t req_flags, m_vaddr = (uint8_t *)m_vaddr + size; m_dma += size; - opcode.s.major = CPT_MAJOR_OP_ZUC_SNOW3G; + vq_cmd_w0.u64 = 0; + vq_cmd_w0.s.opcode.major = CPT_MAJOR_OP_ZUC_SNOW3G; /* indicates CPTR ctx, operation type, KEY & IV mode from DPTR */ - opcode.s.minor = ((1 << 7) | (snow3g << 5) | (0 << 4) | + vq_cmd_w0.s.opcode.minor = ((1 << 7) | (snow3g << 5) | (0 << 4) | (0 << 3) | (flags & 0x7)); /* consider iv len */ @@ -1785,7 +1781,6 @@ cpt_zuc_snow3g_dec_prep(uint32_t req_flags, /* * GP op header, lengths are expected in bits. */ - vq_cmd_w0.u64 = 0; vq_cmd_w0.s.param1 = encr_data_len; /* @@ -1817,8 +1812,6 @@ cpt_zuc_snow3g_dec_prep(uint32_t req_flags, vq_cmd_w0.s.dlen = inputlen + OFF_CTRL_LEN; - vq_cmd_w0.s.opcode = opcode.flags; - if (likely(iv_len)) { uint32_t *iv_d = (uint32_t *)((uint8_t *)offset_vaddr + OFF_CTRL_LEN); @@ -1842,9 +1835,7 @@ cpt_zuc_snow3g_dec_prep(uint32_t req_flags, m_vaddr = (uint8_t *)m_vaddr + OFF_CTRL_LEN + iv_len; m_dma += OFF_CTRL_LEN + iv_len; - opcode.s.major |= CPT_DMA_MODE; - - vq_cmd_w0.s.opcode = opcode.flags; + vq_cmd_w0.s.opcode.major |= CPT_DMA_MODE; /* DPTR has SG list */ in_buffer = m_vaddr; @@ -1933,12 +1924,6 @@ cpt_zuc_snow3g_dec_prep(uint32_t req_flags, req->ist.ei2 = rptr_dma; } - /* vq command w3 */ - vq_cmd_w3.u64 = 0; - vq_cmd_w3.s.grp = 0; - vq_cmd_w3.s.cptr = params->ctx_buf.dma_addr + - offsetof(struct cpt_ctx, zs_ctx); - /* 16 byte aligned cpt res address */ req->completion_addr = (uint64_t *)((uint8_t *)c_vaddr); *req->completion_addr = COMPLETION_CODE_INIT; @@ -1946,7 +1931,6 @@ cpt_zuc_snow3g_dec_prep(uint32_t req_flags, /* Fill microcode part of instruction */ req->ist.ei0 = vq_cmd_w0.u64; - req->ist.ei3 = vq_cmd_w3.u64; req->op = op; @@ -1978,8 +1962,6 @@ cpt_kasumi_enc_prep(uint32_t req_flags, uint64_t m_dma, c_dma; uint64_t *offset_vaddr, offset_dma; vq_cmd_word0_t vq_cmd_w0; - vq_cmd_word3_t vq_cmd_w3; - opcode_info_t opcode; uint8_t *in_buffer; uint32_t g_size_bytes, s_size_bytes; uint64_t dptr_dma, rptr_dma; @@ -2029,19 +2011,17 @@ cpt_kasumi_enc_prep(uint32_t req_flags, m_vaddr = (uint8_t *)m_vaddr + size; m_dma += size; - opcode.s.major = CPT_MAJOR_OP_KASUMI | CPT_DMA_MODE; + vq_cmd_w0.s.opcode.major = CPT_MAJOR_OP_KASUMI | CPT_DMA_MODE; /* indicates ECB/CBC, direction, ctx from cptr, iv from dptr */ - opcode.s.minor = ((1 << 6) | (cpt_ctx->k_ecb << 5) | + vq_cmd_w0.s.opcode.minor = ((1 << 6) | (cpt_ctx->k_ecb << 5) | (dir << 4) | (0 << 3) | (flags & 0x7)); /* * GP op header, lengths are expected in bits. */ - vq_cmd_w0.u64 = 0; vq_cmd_w0.s.param1 = encr_data_len; vq_cmd_w0.s.param2 = auth_data_len; - vq_cmd_w0.s.opcode = opcode.flags; /* consider iv len */ if (flags == 0x0) { @@ -2180,12 +2160,6 @@ cpt_kasumi_enc_prep(uint32_t req_flags, req->ist.ei1 = dptr_dma; req->ist.ei2 = rptr_dma; - /* vq command w3 */ - vq_cmd_w3.u64 = 0; - vq_cmd_w3.s.grp = 0; - vq_cmd_w3.s.cptr = params->ctx_buf.dma_addr + - offsetof(struct cpt_ctx, k_ctx); - /* 16 byte aligned cpt res address */ req->completion_addr = (uint64_t *)((uint8_t *)c_vaddr); *req->completion_addr = COMPLETION_CODE_INIT; @@ -2193,7 +2167,6 @@ cpt_kasumi_enc_prep(uint32_t req_flags, /* Fill microcode part of instruction */ req->ist.ei0 = vq_cmd_w0.u64; - req->ist.ei3 = vq_cmd_w3.u64; req->op = op; @@ -2222,8 +2195,6 @@ cpt_kasumi_dec_prep(uint64_t d_offs, uint64_t m_dma, c_dma; uint64_t *offset_vaddr, offset_dma; vq_cmd_word0_t vq_cmd_w0; - vq_cmd_word3_t vq_cmd_w3; - opcode_info_t opcode; uint8_t *in_buffer; uint32_t g_size_bytes, s_size_bytes; uint64_t dptr_dma, rptr_dma; @@ -2262,18 +2233,17 @@ cpt_kasumi_dec_prep(uint64_t d_offs, m_vaddr = (uint8_t *)m_vaddr + size; m_dma += size; - opcode.s.major = CPT_MAJOR_OP_KASUMI | CPT_DMA_MODE; + vq_cmd_w0.u64 = 0; + vq_cmd_w0.s.opcode.major = CPT_MAJOR_OP_KASUMI | CPT_DMA_MODE; /* indicates ECB/CBC, direction, ctx from cptr, iv from dptr */ - opcode.s.minor = ((1 << 6) | (cpt_ctx->k_ecb << 5) | + vq_cmd_w0.s.opcode.minor = ((1 << 6) | (cpt_ctx->k_ecb << 5) | (dir << 4) | (0 << 3) | (flags & 0x7)); /* * GP op header, lengths are expected in bits. */ - vq_cmd_w0.u64 = 0; vq_cmd_w0.s.param1 = encr_data_len; - vq_cmd_w0.s.opcode = opcode.flags; /* consider iv len */ encr_offset += iv_len; @@ -2370,12 +2340,6 @@ cpt_kasumi_dec_prep(uint64_t d_offs, req->ist.ei1 = dptr_dma; req->ist.ei2 = rptr_dma; - /* vq command w3 */ - vq_cmd_w3.u64 = 0; - vq_cmd_w3.s.grp = 0; - vq_cmd_w3.s.cptr = params->ctx_buf.dma_addr + - offsetof(struct cpt_ctx, k_ctx); - /* 16 byte aligned cpt res address */ req->completion_addr = (uint64_t *)((uint8_t *)c_vaddr); *req->completion_addr = COMPLETION_CODE_INIT; @@ -2383,7 +2347,6 @@ cpt_kasumi_dec_prep(uint64_t d_offs, /* Fill microcode part of instruction */ req->ist.ei0 = vq_cmd_w0.u64; - req->ist.ei3 = vq_cmd_w3.u64; req->op = op; @@ -2451,11 +2414,12 @@ cpt_fc_enc_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens, } static __rte_always_inline int -cpt_fc_auth_set_key(void *ctx, auth_type_t type, const uint8_t *key, - uint16_t key_len, uint16_t mac_len) +cpt_fc_auth_set_key(struct cpt_ctx *cpt_ctx, auth_type_t type, + const uint8_t *key, uint16_t key_len, uint16_t mac_len) { - struct cpt_ctx *cpt_ctx = ctx; - mc_fc_context_t *fctx = &cpt_ctx->fctx; + mc_fc_context_t *fctx = &cpt_ctx->mc_ctx.fctx; + mc_zuc_snow3g_ctx_t *zs_ctx = &cpt_ctx->mc_ctx.zs_ctx; + mc_kasumi_ctx_t *k_ctx = &cpt_ctx->mc_ctx.k_ctx; if ((type >= ZUC_EIA3) && (type <= KASUMI_F9_ECB)) { uint32_t keyx[4]; @@ -2470,26 +2434,26 @@ cpt_fc_auth_set_key(void *ctx, auth_type_t type, const uint8_t *key, case SNOW3G_UIA2: cpt_ctx->snow3g = 1; gen_key_snow3g(key, keyx); - memcpy(cpt_ctx->zs_ctx.ci_key, keyx, key_len); + memcpy(zs_ctx->ci_key, keyx, key_len); cpt_ctx->fc_type = ZUC_SNOW3G; cpt_ctx->zsk_flags = 0x1; break; case ZUC_EIA3: cpt_ctx->snow3g = 0; - memcpy(cpt_ctx->zs_ctx.ci_key, key, key_len); - memcpy(cpt_ctx->zs_ctx.zuc_const, zuc_d, 32); + memcpy(zs_ctx->ci_key, key, key_len); + memcpy(zs_ctx->zuc_const, zuc_d, 32); cpt_ctx->fc_type = ZUC_SNOW3G; cpt_ctx->zsk_flags = 0x1; break; case KASUMI_F9_ECB: /* Kasumi ECB mode */ cpt_ctx->k_ecb = 1; - memcpy(cpt_ctx->k_ctx.ci_key, key, key_len); + memcpy(k_ctx->ci_key, key, key_len); cpt_ctx->fc_type = KASUMI; cpt_ctx->zsk_flags = 0x1; break; case KASUMI_F9_CBC: - memcpy(cpt_ctx->k_ctx.ci_key, key, key_len); + memcpy(k_ctx->ci_key, key, key_len); cpt_ctx->fc_type = KASUMI; cpt_ctx->zsk_flags = 0x1; break;