X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fcommon%2Fmlx5%2Fmlx5_common.h;h=5028a05b49c7983c648fc6b667b788b282647529;hb=8052638442f46a67c57a1cb185958aac4f97a136;hp=da01ffa1ce9dd8f064d10cefd688bef94906d32f;hpb=420bbdae89f29744847a166b831c675ad5affd2a;p=dpdk.git diff --git a/drivers/common/mlx5/mlx5_common.h b/drivers/common/mlx5/mlx5_common.h index da01ffa1ce..5028a05b49 100644 --- a/drivers/common/mlx5/mlx5_common.h +++ b/drivers/common/mlx5/mlx5_common.h @@ -13,10 +13,13 @@ #include #include #include +#include #include "mlx5_prm.h" #include "mlx5_devx_cmds.h" +/* Reported driver name. */ +#define MLX5_DRIVER_NAME "mlx5_pci" /* Bit-field manipulation. */ #define BITFIELD_DECLARE(bf, type, size) \ @@ -89,14 +92,12 @@ pmd_drv_log_basename(const char *s) /* claim_zero() does not perform any check when debugging is disabled. */ #ifdef RTE_LIBRTE_MLX5_DEBUG -#define DEBUG(...) DRV_LOG(DEBUG, __VA_ARGS__) #define MLX5_ASSERT(exp) RTE_VERIFY(exp) #define claim_zero(...) MLX5_ASSERT((__VA_ARGS__) == 0) #define claim_nonzero(...) MLX5_ASSERT((__VA_ARGS__) != 0) #else /* RTE_LIBRTE_MLX5_DEBUG */ -#define DEBUG(...) (void)0 #define MLX5_ASSERT(exp) RTE_ASSERT(exp) #define claim_zero(...) (__VA_ARGS__) #define claim_nonzero(...) (__VA_ARGS__) @@ -128,8 +129,11 @@ enum { PCI_DEVICE_ID_MELLANOX_CONNECTX6 = 0x101b, PCI_DEVICE_ID_MELLANOX_CONNECTX6VF = 0x101c, PCI_DEVICE_ID_MELLANOX_CONNECTX6DX = 0x101d, - PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF = 0x101e, + PCI_DEVICE_ID_MELLANOX_CONNECTXVF = 0x101e, PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF = 0xa2d6, + PCI_DEVICE_ID_MELLANOX_CONNECTX6LX = 0x101f, + PCI_DEVICE_ID_MELLANOX_CONNECTX7 = 0x1021, + PCI_DEVICE_ID_MELLANOX_CONNECTX7BF = 0Xa2dc, }; /* Maximum number of simultaneous unicast MAC addresses. */ @@ -191,7 +195,7 @@ check_cqe(volatile struct mlx5_cqe *cqe, const uint16_t cqes_n, if (unlikely((op_owner != (!!(idx))) || (op_code == MLX5_CQE_INVALID))) return MLX5_CQE_STATUS_HW_OWN; - rte_cio_rmb(); + rte_io_rmb(); if (unlikely(op_code == MLX5_CQE_RESP_ERR || op_code == MLX5_CQE_REQ_ERR)) return MLX5_CQE_STATUS_ERR; @@ -207,25 +211,14 @@ int mlx5_get_ifname_sysfs(const char *ibdev_path, char *ifname); #define MLX5_CLASS_ARG_NAME "class" enum mlx5_class { - MLX5_CLASS_NET, - MLX5_CLASS_VDPA, MLX5_CLASS_INVALID, + MLX5_CLASS_NET = RTE_BIT64(0), + MLX5_CLASS_VDPA = RTE_BIT64(1), + MLX5_CLASS_REGEX = RTE_BIT64(2), + MLX5_CLASS_COMPRESS = RTE_BIT64(3), }; -#define MLX5_DBR_PAGE_SIZE 4096 /* Must be >= 512. */ -#define MLX5_DBR_SIZE 8 -#define MLX5_DBR_PER_PAGE (MLX5_DBR_PAGE_SIZE / MLX5_DBR_SIZE) -#define MLX5_DBR_BITMAP_SIZE (MLX5_DBR_PER_PAGE / 64) - -struct mlx5_devx_dbr_page { - /* Door-bell records, must be first member in structure. */ - uint8_t dbrs[MLX5_DBR_PAGE_SIZE]; - LIST_ENTRY(mlx5_devx_dbr_page) next; /* Pointer to the next element. */ - void *umem; - uint32_t dbr_count; /* Number of door-bell records in use. */ - /* 1 bit marks matching door-bell is in use. */ - uint64_t dbr_bitmap[MLX5_DBR_BITMAP_SIZE]; -}; +#define MLX5_DBR_SIZE RTE_CACHE_LINE_SIZE /* devX creation object */ struct mlx5_devx_obj { @@ -240,20 +233,15 @@ struct mlx5_klm { uint64_t address; }; -LIST_HEAD(mlx5_dbr_page_list, mlx5_devx_dbr_page); - -__rte_internal -enum mlx5_class mlx5_class_get(struct rte_devargs *devargs); __rte_internal void mlx5_translate_port_name(const char *port_name_in, struct mlx5_switch_info *port_info_out); void mlx5_glue_constructor(void); __rte_internal -int64_t mlx5_get_dbr(void *ctx, struct mlx5_dbr_page_list *head, - struct mlx5_devx_dbr_page **dbr_page); -__rte_internal -int32_t mlx5_release_dbr(struct mlx5_dbr_page_list *head, uint32_t umem_id, - uint64_t offset); +void *mlx5_devx_alloc_uar(void *ctx, int mapping); extern uint8_t haswell_broadwell_cpu; +__rte_internal +void mlx5_common_init(void); + #endif /* RTE_PMD_MLX5_COMMON_H_ */