X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fcommon%2Fmlx5%2Fmlx5_devx_cmds.h;h=abbea67784572d644457165a1434079d1f68dc96;hb=5b38d8cd4663;hp=7b15b5e0ca00e8940941c4faa28468be9e0dddbb;hpb=79a7e409a2f6d8ed1bc836b0456141860220225c;p=dpdk.git

diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h b/drivers/common/mlx5/mlx5_devx_cmds.h
index 7b15b5e0ca..abbea67784 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.h
+++ b/drivers/common/mlx5/mlx5_devx_cmds.h
@@ -70,6 +70,7 @@ struct mlx5_hca_attr {
 	uint32_t eswitch_manager:1;
 	uint32_t flow_counters_dump:1;
 	uint32_t log_max_rqt_size:5;
+	uint32_t parse_graph_flex_node:1;
 	uint8_t flow_counter_bulk_alloc_bitmap;
 	uint32_t eth_net_offloads:1;
 	uint32_t eth_virt:1;
@@ -84,6 +85,7 @@ struct mlx5_hca_attr {
 	uint32_t tunnel_lro_vxlan:1;
 	uint32_t lro_max_msg_sz_mode:2;
 	uint32_t lro_timer_supported_periods[MLX5_LRO_NUM_SUPP_PERIODS];
+	uint16_t lro_min_mss_size;
 	uint32_t flex_parser_protocols;
 	uint32_t hairpin:1;
 	uint32_t log_max_hairpin_queues:5;
@@ -92,13 +94,16 @@ struct mlx5_hca_attr {
 	uint32_t vhca_id:16;
 	uint32_t relaxed_ordering_write:1;
 	uint32_t relaxed_ordering_read:1;
+	uint32_t access_register_user:1;
 	uint32_t wqe_index_ignore:1;
 	uint32_t cross_channel:1;
 	uint32_t non_wire_sq:1; /* SQ with non-wire ops is supported. */
 	uint32_t log_max_static_sq_wq:5; /* Static WQE size SQ. */
 	uint32_t dev_freq_khz; /* Timestamp counter frequency, kHz. */
+	uint32_t scatter_fcs_w_decap_disable:1;
 	uint32_t regex:1;
 	uint32_t regexp_num_of_engines;
+	uint32_t log_max_ft_sampler_num:8;
 	struct mlx5_hca_qos_attr qos;
 	struct mlx5_hca_vdpa_attr vdpa;
 };
@@ -187,6 +192,13 @@ struct mlx5_devx_tir_attr {
 	struct mlx5_rx_hash_field_select rx_hash_field_selector_inner;
 };
 
+/* TIR attributes structure, used by TIR modify. */
+struct mlx5_devx_modify_tir_attr {
+	uint32_t tirn:24;
+	uint64_t modify_bitmask;
+	struct mlx5_devx_tir_attr tir;
+};
+
 /* RQT attributes structure, used by RQT operations. */
 struct mlx5_devx_rqt_attr {
 	uint8_t rq_type;
@@ -241,6 +253,8 @@ struct mlx5_devx_cq_attr {
 	uint32_t db_umem_valid:1;
 	uint32_t use_first_only:1;
 	uint32_t overrun_ignore:1;
+	uint32_t cqe_comp_en:1;
+	uint32_t mini_cqe_res_format:2;
 	uint32_t cqe_size:3;
 	uint32_t log_cq_size:5;
 	uint32_t log_page_size:5;
@@ -311,6 +325,50 @@ struct mlx5_devx_virtio_q_couners_attr {
 	uint32_t invalid_buffer;
 };
 
+/*
+ * graph flow match sample attributes structure,
+ * used by flex parser operations.
+ */
+struct mlx5_devx_match_sample_attr {
+	uint32_t flow_match_sample_en:1;
+	uint32_t flow_match_sample_field_offset:16;
+	uint32_t flow_match_sample_offset_mode:4;
+	uint32_t flow_match_sample_field_offset_mask;
+	uint32_t flow_match_sample_field_offset_shift:4;
+	uint32_t flow_match_sample_field_base_offset:8;
+	uint32_t flow_match_sample_tunnel_mode:3;
+	uint32_t flow_match_sample_field_id;
+};
+
+/* graph node arc attributes structure, used by flex parser operations. */
+struct mlx5_devx_graph_arc_attr {
+	uint32_t compare_condition_value:16;
+	uint32_t start_inner_tunnel:1;
+	uint32_t arc_parse_graph_node:8;
+	uint32_t parse_graph_node_handle;
+};
+
+/* Maximal number of samples per graph node. */
+#define MLX5_GRAPH_NODE_SAMPLE_NUM 8
+
+/* Maximal number of input/output arcs per graph node. */
+#define MLX5_GRAPH_NODE_ARC_NUM 8
+
+/* parse graph node attributes structure, used by flex parser operations. */
+struct mlx5_devx_graph_node_attr {
+	uint32_t modify_field_select;
+	uint32_t header_length_mode:4;
+	uint32_t header_length_base_value:16;
+	uint32_t header_length_field_shift:4;
+	uint32_t header_length_field_offset:16;
+	uint32_t header_length_field_mask;
+	struct mlx5_devx_match_sample_attr sample[MLX5_GRAPH_NODE_SAMPLE_NUM];
+	uint32_t next_header_field_offset:16;
+	uint32_t next_header_field_size:5;
+	struct mlx5_devx_graph_arc_attr in[MLX5_GRAPH_NODE_ARC_NUM];
+	struct mlx5_devx_graph_arc_attr out[MLX5_GRAPH_NODE_ARC_NUM];
+};
+
 /* mlx5_devx_cmds.c */
 
 __rte_internal
@@ -384,7 +442,20 @@ int mlx5_devx_cmd_modify_qp_state(struct mlx5_devx_obj *qp,
 __rte_internal
 int mlx5_devx_cmd_modify_rqt(struct mlx5_devx_obj *rqt,
 			     struct mlx5_devx_rqt_attr *rqt_attr);
+__rte_internal
+int mlx5_devx_cmd_modify_tir(struct mlx5_devx_obj *tir,
+			     struct mlx5_devx_modify_tir_attr *tir_attr);
+__rte_internal
+int mlx5_devx_cmd_query_parse_samples(struct mlx5_devx_obj *flex_obj,
+				      uint32_t ids[], uint32_t num);
+
+__rte_internal
+struct mlx5_devx_obj *mlx5_devx_cmd_create_flex_parser(void *ctx,
+					struct mlx5_devx_graph_node_attr *data);
 
+__rte_internal
+int mlx5_devx_cmd_register_read(void *ctx, uint16_t reg_id,
+				uint32_t arg, uint32_t *data, uint32_t dw_cnt);
 /**
  * Create virtio queue counters object DevX API.
  *