X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fcommon%2Focteontx2%2Fotx2_common.h;h=2168cde4d8ecb4e74ba0a9e6e3e48f057ab9410e;hb=8a4a417d9f9db3f3f7b2e25685ffdaf63ac413bf;hp=a1554627dabcebd91d6b8e7e77a764f39fd46e24;hpb=2d10a3fbab8da3f9e6c8c82bf7a02255647faf66;p=dpdk.git

diff --git a/drivers/common/octeontx2/otx2_common.h b/drivers/common/octeontx2/otx2_common.h
index a1554627da..2168cde4d8 100644
--- a/drivers/common/octeontx2/otx2_common.h
+++ b/drivers/common/octeontx2/otx2_common.h
@@ -8,6 +8,7 @@
 #include <rte_atomic.h>
 #include <rte_common.h>
 #include <rte_cycles.h>
+#include <rte_kvargs.h>
 #include <rte_memory.h>
 #include <rte_memzone.h>
 #include <rte_io.h>
@@ -16,6 +17,7 @@
 #include "hw/otx2_nix.h"
 #include "hw/otx2_npc.h"
 #include "hw/otx2_npa.h"
+#include "hw/otx2_sdp.h"
 #include "hw/otx2_sso.h"
 #include "hw/otx2_ssow.h"
 #include "hw/otx2_tim.h"
@@ -31,11 +33,25 @@
 #define BIT(nr)     (1UL << (nr))
 #endif
 
-/* Compiler attributes */
-#ifndef __hot
-#define __hot   __attribute__((hot))
+#ifndef BITS_PER_LONG
+#define BITS_PER_LONG	(__SIZEOF_LONG__ * 8)
+#endif
+#ifndef BITS_PER_LONG_LONG
+#define BITS_PER_LONG_LONG (__SIZEOF_LONG_LONG__ * 8)
+#endif
+
+#ifndef GENMASK
+#define GENMASK(h, l) \
+		(((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
+#endif
+#ifndef GENMASK_ULL
+#define GENMASK_ULL(h, l) \
+	(((~0ULL) - (1ULL << (l)) + 1) & \
+	 (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h))))
 #endif
 
+#define OTX2_NPA_LOCK_MASK "npa_lock_mask"
+
 /* Intra device related functions */
 struct otx2_npa_lf;
 struct otx2_idev_cfg {
@@ -47,16 +63,27 @@ struct otx2_idev_cfg {
 		rte_atomic16_t npa_refcnt;
 		uint16_t npa_refcnt_u16;
 	};
+	uint64_t npa_lock_mask;
 };
 
+__rte_internal
 struct otx2_idev_cfg *otx2_intra_dev_get_cfg(void);
+__rte_internal
 void otx2_sso_pf_func_set(uint16_t sso_pf_func);
+__rte_internal
 uint16_t otx2_sso_pf_func_get(void);
+__rte_internal
 uint16_t otx2_npa_pf_func_get(void);
+__rte_internal
 struct otx2_npa_lf *otx2_npa_lf_obj_get(void);
+__rte_internal
 void otx2_npa_set_defaults(struct otx2_idev_cfg *idev);
+__rte_internal
 int otx2_npa_lf_active(void *dev);
+__rte_internal
 int otx2_npa_lf_obj_ref(void);
+__rte_internal
+void otx2_parse_common_devargs(struct rte_kvargs *kvlist);
 
 /* Log */
 extern int otx2_logtype_base;
@@ -68,6 +95,7 @@ extern int otx2_logtype_npc;
 extern int otx2_logtype_tm;
 extern int otx2_logtype_tim;
 extern int otx2_logtype_dpi;
+extern int otx2_logtype_ep;
 
 #define otx2_err(fmt, args...)			\
 	RTE_LOG(ERR, PMD, "%s():%u " fmt "\n",	\
@@ -90,6 +118,7 @@ extern int otx2_logtype_dpi;
 #define otx2_tm_dbg(fmt, ...) otx2_dbg(tm, fmt, ##__VA_ARGS__)
 #define otx2_tim_dbg(fmt, ...) otx2_dbg(tim, fmt, ##__VA_ARGS__)
 #define otx2_dpi_dbg(fmt, ...) otx2_dbg(dpi, fmt, ##__VA_ARGS__)
+#define otx2_sdp_dbg(fmt, ...) otx2_dbg(ep, fmt, ##__VA_ARGS__)
 
 /* PCI IDs */
 #define PCI_VENDOR_ID_CAVIUM			0x177D
@@ -104,9 +133,9 @@ extern int otx2_logtype_dpi;
 #define PCI_DEVID_OCTEONTX2_RVU_CPT_VF		0xA0FE
 #define PCI_DEVID_OCTEONTX2_RVU_AF_VF		0xA0f8
 #define PCI_DEVID_OCTEONTX2_DPI_VF		0xA081
-
-/* Subsystem Device ID */
-#define PCI_SUBSYS_DEVID_96XX_95XX		0xB200
+#define PCI_DEVID_OCTEONTX2_EP_VF		0xB203 /* OCTEON TX2 EP mode */
+#define PCI_DEVID_OCTEONTX2_RVU_SDP_PF		0xA0f6
+#define PCI_DEVID_OCTEONTX2_RVU_SDP_VF		0xA0f7
 
 /*
  * REVID for RVU PCIe devices.
@@ -135,4 +164,8 @@ extern int otx2_logtype_dpi;
 #include "otx2_io_generic.h"
 #endif
 
+/* Fastpath lookup */
+#define OTX2_NIX_FASTPATH_LOOKUP_MEM	"otx2_nix_fastpath_lookup_mem"
+#define OTX2_NIX_SA_TBL_START		(4096*4 + 69632*2)
+
 #endif /* _OTX2_COMMON_H_ */