X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fcommon%2Focteontx2%2Fotx2_common.h;h=b6779f71042abd8e33976580adf2e7252d179d46;hb=b4fac34715f2;hp=81d5a71d867bb0994383c3d863e6e79fd01b22d5;hpb=81fd15a2acc2858d39c70e875169248f1a2f702f;p=dpdk.git diff --git a/drivers/common/octeontx2/otx2_common.h b/drivers/common/octeontx2/otx2_common.h index 81d5a71d86..b6779f7104 100644 --- a/drivers/common/octeontx2/otx2_common.h +++ b/drivers/common/octeontx2/otx2_common.h @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -20,6 +21,7 @@ #include "hw/otx2_sso.h" #include "hw/otx2_ssow.h" #include "hw/otx2_tim.h" +#include "hw/otx2_ree.h" /* Alignment */ #define OTX2_ALIGN 128 @@ -49,10 +51,7 @@ (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h)))) #endif -/* Compiler attributes */ -#ifndef __hot -#define __hot __attribute__((hot)) -#endif +#define OTX2_NPA_LOCK_MASK "npa_lock_mask" /* Intra device related functions */ struct otx2_npa_lf; @@ -65,16 +64,27 @@ struct otx2_idev_cfg { rte_atomic16_t npa_refcnt; uint16_t npa_refcnt_u16; }; + uint64_t npa_lock_mask; }; +__rte_internal struct otx2_idev_cfg *otx2_intra_dev_get_cfg(void); +__rte_internal void otx2_sso_pf_func_set(uint16_t sso_pf_func); +__rte_internal uint16_t otx2_sso_pf_func_get(void); +__rte_internal uint16_t otx2_npa_pf_func_get(void); +__rte_internal struct otx2_npa_lf *otx2_npa_lf_obj_get(void); +__rte_internal void otx2_npa_set_defaults(struct otx2_idev_cfg *idev); +__rte_internal int otx2_npa_lf_active(void *dev); +__rte_internal int otx2_npa_lf_obj_ref(void); +__rte_internal +void otx2_parse_common_devargs(struct rte_kvargs *kvlist); /* Log */ extern int otx2_logtype_base; @@ -87,6 +97,7 @@ extern int otx2_logtype_tm; extern int otx2_logtype_tim; extern int otx2_logtype_dpi; extern int otx2_logtype_ep; +extern int otx2_logtype_ree; #define otx2_err(fmt, args...) \ RTE_LOG(ERR, PMD, "%s():%u " fmt "\n", \ @@ -110,6 +121,7 @@ extern int otx2_logtype_ep; #define otx2_tim_dbg(fmt, ...) otx2_dbg(tim, fmt, ##__VA_ARGS__) #define otx2_dpi_dbg(fmt, ...) otx2_dbg(dpi, fmt, ##__VA_ARGS__) #define otx2_sdp_dbg(fmt, ...) otx2_dbg(ep, fmt, ##__VA_ARGS__) +#define otx2_ree_dbg(fmt, ...) otx2_dbg(ree, fmt, ##__VA_ARGS__) /* PCI IDs */ #define PCI_VENDOR_ID_CAVIUM 0x177D @@ -127,6 +139,8 @@ extern int otx2_logtype_ep; #define PCI_DEVID_OCTEONTX2_EP_VF 0xB203 /* OCTEON TX2 EP mode */ #define PCI_DEVID_OCTEONTX2_RVU_SDP_PF 0xA0f6 #define PCI_DEVID_OCTEONTX2_RVU_SDP_VF 0xA0f7 +#define PCI_DEVID_OCTEONTX2_RVU_REE_PF 0xA0f4 +#define PCI_DEVID_OCTEONTX2_RVU_REE_VF 0xA0f5 /* * REVID for RVU PCIe devices. @@ -155,4 +169,8 @@ extern int otx2_logtype_ep; #include "otx2_io_generic.h" #endif +/* Fastpath lookup */ +#define OTX2_NIX_FASTPATH_LOOKUP_MEM "otx2_nix_fastpath_lookup_mem" +#define OTX2_NIX_SA_TBL_START (4096*4 + 69632*2) + #endif /* _OTX2_COMMON_H_ */