X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fcommon%2Focteontx2%2Fotx2_mbox.h;h=b435694db7297d2dcc855d464903424f76b24d5f;hb=9dfc2d6fdac7a82b7aa55dcd59d41a5d6c3ffca3;hp=9a1e8a7eac9c921994192398c712cabf5e24a206;hpb=b0179d007b1085ff8f4c67c2421baedf81f84777;p=dpdk.git

diff --git a/drivers/common/octeontx2/otx2_mbox.h b/drivers/common/octeontx2/otx2_mbox.h
index 9a1e8a7eac..b435694db7 100644
--- a/drivers/common/octeontx2/otx2_mbox.h
+++ b/drivers/common/octeontx2/otx2_mbox.h
@@ -90,7 +90,7 @@ struct mbox_msghdr {
 #define OTX2_MBOX_RSP_SIG (0xbeef)
 	/* Signature, for validating corrupted msgs */
 	uint16_t __otx2_io sig;
-#define OTX2_MBOX_VERSION (0x0009)
+#define OTX2_MBOX_VERSION (0x000a)
 	/* Version of msg's structure for this ID */
 	uint16_t __otx2_io ver;
 	/* Offset of next msg within mailbox region */
@@ -177,6 +177,8 @@ M(SSO_GRP_GET_STATS,	0x609, sso_grp_get_stats, sso_info_req,		\
 				sso_grp_stats)				\
 M(SSO_HWS_GET_STATS,	0x610, sso_hws_get_stats, sso_info_req,		\
 				sso_hws_stats)				\
+M(SSO_HW_RELEASE_XAQ,	0x611, sso_hw_release_xaq_aura,			\
+				sso_release_xaq, msg_rsp)		\
 /* TIM mbox IDs (range 0x800 - 0x9FF) */				\
 M(TIM_LF_ALLOC,		0x800, tim_lf_alloc, tim_lf_alloc_req,		\
 				tim_lf_alloc_rsp)			\
@@ -353,13 +355,30 @@ struct ready_msg_rsp {
 	uint16_t __otx2_io rclk_freq; /* RCLK frequency */
 };
 
+enum npc_pkind_type {
+	NPC_RX_VLAN_EXDSA_PKIND = 56ULL,
+	NPC_RX_CHLEN24B_PKIND,
+	NPC_RX_CPT_HDR_PKIND,
+	NPC_RX_CHLEN90B_PKIND,
+	NPC_TX_HIGIG_PKIND,
+	NPC_RX_HIGIG_PKIND,
+	NPC_RX_EXDSA_PKIND,
+	NPC_RX_EDSA_PKIND,
+	NPC_TX_DEF_PKIND,
+};
+
+#define OTX2_PRIV_FLAGS_CH_LEN_90B 254
+#define OTX2_PRIV_FLAGS_CH_LEN_24B 255
+
 /* Struct to set pkind */
 struct npc_set_pkind {
 	struct mbox_msghdr hdr;
 #define OTX2_PRIV_FLAGS_DEFAULT  BIT_ULL(0)
 #define OTX2_PRIV_FLAGS_EDSA     BIT_ULL(1)
 #define OTX2_PRIV_FLAGS_HIGIG    BIT_ULL(2)
-#define OTX2_PRIV_FLAGS_LEN_90B  BIT_ULL(3)
+#define OTX2_PRIV_FLAGS_FDSA     BIT_ULL(3)
+#define OTX2_PRIV_FLAGS_EXDSA    BIT_ULL(4)
+#define OTX2_PRIV_FLAGS_VLAN_EXDSA    BIT_ULL(5)
 #define OTX2_PRIV_FLAGS_CUSTOM   BIT_ULL(63)
 	uint64_t __otx2_io mode;
 #define PKIND_TX		BIT_ULL(0)
@@ -454,17 +473,17 @@ struct msix_offset_rsp {
 	struct mbox_msghdr hdr;
 	uint16_t __otx2_io npa_msixoff;
 	uint16_t __otx2_io nix_msixoff;
-	uint8_t __otx2_io sso;
-	uint8_t __otx2_io ssow;
-	uint8_t __otx2_io timlfs;
-	uint8_t __otx2_io cptlfs;
+	uint16_t __otx2_io sso;
+	uint16_t __otx2_io ssow;
+	uint16_t __otx2_io timlfs;
+	uint16_t __otx2_io cptlfs;
 	uint16_t __otx2_io sso_msixoff[MAX_RVU_BLKLF_CNT];
 	uint16_t __otx2_io ssow_msixoff[MAX_RVU_BLKLF_CNT];
 	uint16_t __otx2_io timlf_msixoff[MAX_RVU_BLKLF_CNT];
 	uint16_t __otx2_io cptlf_msixoff[MAX_RVU_BLKLF_CNT];
-	uint8_t __otx2_io cpt1_lfs;
-	uint8_t __otx2_io ree0_lfs;
-	uint8_t __otx2_io ree1_lfs;
+	uint16_t __otx2_io cpt1_lfs;
+	uint16_t __otx2_io ree0_lfs;
+	uint16_t __otx2_io ree1_lfs;
 	uint16_t __otx2_io cpt1_lf_msixoff[MAX_RVU_BLKLF_CNT];
 	uint16_t __otx2_io ree0_lf_msixoff[MAX_RVU_BLKLF_CNT];
 	uint16_t __otx2_io ree1_lf_msixoff[MAX_RVU_BLKLF_CNT];
@@ -1177,6 +1196,11 @@ struct sso_hw_setconfig {
 	uint16_t __otx2_io hwgrps;
 };
 
+struct sso_release_xaq {
+	struct mbox_msghdr hdr;
+	uint16_t __otx2_io hwgrps;
+};
+
 struct sso_info_req {
 	struct mbox_msghdr hdr;
 	union {