X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fcommon%2Fqat%2Fqat_common.h;h=9411a7930125c848b3896b59e18bcbaa6f673ae6;hb=a800675b06f91c9326063f57daaecd71098211ec;hp=db85d54827df8778d000afa79b7ca149efc3ce04;hpb=98c4a35c736fb6c214416b67e80acb689d6fc877;p=dpdk.git

diff --git a/drivers/common/qat/qat_common.h b/drivers/common/qat/qat_common.h
index db85d54827..9411a79301 100644
--- a/drivers/common/qat/qat_common.h
+++ b/drivers/common/qat/qat_common.h
@@ -10,28 +10,36 @@
 
 /**< Intel(R) QAT device name for PCI registration */
 #define QAT_PCI_NAME	qat
-/*
- * Maximum number of SGL entries
- */
-#define QAT_SGL_MAX_NUMBER	16
-
 #define QAT_64_BTYE_ALIGN_MASK (~0x3f)
 
 /* Intel(R) QuickAssist Technology device generation is enumerated
- * from one according to the generation of the device
+ * from one according to the generation of the device.
+ * QAT_GEN* is used as the index to find all devices
  */
 enum qat_device_gen {
-	QAT_GEN1 = 1,
-	QAT_GEN2
+	QAT_GEN1,
+	QAT_GEN2,
+	QAT_GEN3,
+	QAT_GEN4,
+	QAT_N_GENS
 };
 
 enum qat_service_type {
-	QAT_SERVICE_ASYMMETRIC = 0,
+	QAT_SERVICE_ASYMMETRIC,
 	QAT_SERVICE_SYMMETRIC,
 	QAT_SERVICE_COMPRESSION,
-	QAT_SERVICE_INVALID
+	QAT_MAX_SERVICES
+};
+
+#define QAT_SERVICE_INVALID	(QAT_MAX_SERVICES)
+
+enum qat_svc_list {
+	QAT_SVC_UNUSED = 0,
+	QAT_SVC_CRYPTO = 1,
+	QAT_SVC_COMPRESSION = 2,
+	QAT_SVC_SYM = 3,
+	QAT_SVC_ASYM = 4,
 };
-#define QAT_MAX_SERVICES		(QAT_SERVICE_INVALID)
 
 /**< Common struct for scatter-gather list operations */
 struct qat_flat_buf {
@@ -40,11 +48,17 @@ struct qat_flat_buf {
 	uint64_t addr;
 } __rte_packed;
 
+#define qat_sgl_hdr  struct { \
+	uint64_t resrvd; \
+	uint32_t num_bufs; \
+	uint32_t num_mapped_bufs; \
+}
+
+__extension__
 struct qat_sgl {
-	uint64_t resrvd;
-	uint32_t num_bufs;
-	uint32_t num_mapped_bufs;
-	struct qat_flat_buf buffers[QAT_SGL_MAX_NUMBER];
+	qat_sgl_hdr;
+	/* flexible array of flat buffers*/
+	struct qat_flat_buf buffers[0];
 } __rte_packed __rte_cache_aligned;
 
 /** Common, i.e. not service-specific, statistics */
@@ -58,13 +72,17 @@ struct qat_common_stats {
 	/**< Total error count on operations enqueued */
 	uint64_t dequeue_err_count;
 	/**< Total error count on operations dequeued */
+	uint64_t threshold_hit_count;
+	/**< Total number of times min qp threshold condition was fulfilled */
+
 };
 
 struct qat_pci_device;
 
 int
-qat_sgl_fill_array(struct rte_mbuf *buf, uint64_t buf_start,
-		struct qat_sgl *list, uint32_t data_len);
+qat_sgl_fill_array(struct rte_mbuf *buf, int64_t offset,
+		void *list_in, uint32_t data_len,
+		const uint16_t max_segs);
 void
 qat_stats_get(struct qat_pci_device *dev,
 		struct qat_common_stats *stats,
@@ -73,4 +91,7 @@ void
 qat_stats_reset(struct qat_pci_device *dev,
 		enum qat_service_type service);
 
+const char *
+qat_service_get_str(enum qat_service_type type);
+
 #endif /* _QAT_COMMON_H_ */