X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fcompress%2Fisal%2Fisal_compress_pmd_ops.c;h=31c4559915504298421d6b1cf49448cae205f640;hb=8ada5b15a94e1b356f45d4232a2f8fddca234044;hp=b0abf423c9cb7a7682141ef7acbc8e66b65ca0ff;hpb=b0e23c458a6f67f73ddccaaaf27a2b438bf27c43;p=dpdk.git

diff --git a/drivers/compress/isal/isal_compress_pmd_ops.c b/drivers/compress/isal/isal_compress_pmd_ops.c
index b0abf423c9..31c4559915 100644
--- a/drivers/compress/isal/isal_compress_pmd_ops.c
+++ b/drivers/compress/isal/isal_compress_pmd_ops.c
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2018 Intel Corporation
  */
+#include <isa-l.h>
 
 #include <rte_common.h>
 #include <rte_compressdev_pmd.h>
@@ -9,6 +10,22 @@
 #include "isal_compress_pmd_private.h"
 
 static const struct rte_compressdev_capabilities isal_pmd_capabilities[] = {
+	{
+		.algo = RTE_COMP_ALGO_DEFLATE,
+		.comp_feature_flags =	RTE_COMP_FF_OOP_SGL_IN_SGL_OUT |
+					RTE_COMP_FF_OOP_SGL_IN_LB_OUT |
+					RTE_COMP_FF_OOP_LB_IN_SGL_OUT |
+					RTE_COMP_FF_SHAREABLE_PRIV_XFORM |
+					RTE_COMP_FF_HUFFMAN_FIXED |
+					RTE_COMP_FF_HUFFMAN_DYNAMIC |
+					RTE_COMP_FF_CRC32_CHECKSUM |
+					RTE_COMP_FF_ADLER32_CHECKSUM,
+		.window_size = {
+			.min = 15,
+			.max = 15,
+			.increment = 0
+		},
+	},
 	RTE_COMP_END_OF_CAPABILITIES_LIST()
 };
 
@@ -93,6 +110,24 @@ isal_comp_pmd_close(struct rte_compressdev *dev)
 	return 0;
 }
 
+/** Get device statistics */
+static void
+isal_comp_pmd_stats_get(struct rte_compressdev *dev,
+		struct rte_compressdev_stats *stats)
+{
+	uint16_t qp_id;
+
+	for (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {
+		struct isal_comp_qp *qp = dev->data->queue_pairs[qp_id];
+
+		stats->enqueued_count += qp->qp_stats.enqueued_count;
+		stats->dequeued_count += qp->qp_stats.dequeued_count;
+
+		stats->enqueue_err_count += qp->qp_stats.enqueue_err_count;
+		stats->dequeue_err_count += qp->qp_stats.dequeue_err_count;
+	}
+}
+
 /** Get device info */
 static void
 isal_comp_pmd_info_get(struct rte_compressdev *dev __rte_unused,
@@ -100,13 +135,32 @@ isal_comp_pmd_info_get(struct rte_compressdev *dev __rte_unused,
 {
 	if (dev_info != NULL) {
 		dev_info->capabilities = isal_pmd_capabilities;
-		dev_info->feature_flags = RTE_COMPDEV_FF_CPU_AVX512 |
-				RTE_COMPDEV_FF_CPU_AVX2 |
-				RTE_COMPDEV_FF_CPU_AVX |
-				RTE_COMPDEV_FF_CPU_SSE;
+
+		/* Check CPU for supported vector instruction and set
+		 * feature_flags
+		 */
+		if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F))
+			dev_info->feature_flags |= RTE_COMPDEV_FF_CPU_AVX512;
+		else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))
+			dev_info->feature_flags |= RTE_COMPDEV_FF_CPU_AVX2;
+		else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX))
+			dev_info->feature_flags |= RTE_COMPDEV_FF_CPU_AVX;
+		else
+			dev_info->feature_flags |= RTE_COMPDEV_FF_CPU_SSE;
 	}
 }
 
+/** Reset device statistics */
+static void
+isal_comp_pmd_stats_reset(struct rte_compressdev *dev)
+{
+	uint16_t qp_id;
+
+	for (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {
+		struct isal_comp_qp *qp = dev->data->queue_pairs[qp_id];
+		memset(&qp->qp_stats, 0, sizeof(qp->qp_stats));
+	}
+}
 
 /** Release queue pair */
 static int
@@ -117,8 +171,14 @@ isal_comp_pmd_qp_release(struct rte_compressdev *dev, uint16_t qp_id)
 	if (qp == NULL)
 		return -EINVAL;
 
-	if (dev->data->queue_pairs[qp_id] != NULL)
-		rte_free(dev->data->queue_pairs[qp_id]);
+	if (qp->stream)
+		rte_free(qp->stream->level_buf);
+
+	rte_free(qp->state);
+	rte_ring_free(qp->processed_pkts);
+	rte_free(qp->stream);
+	rte_free(qp);
+	dev->data->queue_pairs[qp_id] = NULL;
 
 	return 0;
 }
@@ -156,7 +216,7 @@ isal_comp_pmd_qp_set_unique_name(struct rte_compressdev *dev,
 struct isal_comp_qp *qp)
 {
 	unsigned int n = snprintf(qp->name, sizeof(qp->name),
-			"isal_compression_pmd_%u_qp_%u",
+			"isal_comp_pmd_%u_qp_%u",
 			dev->data->dev_id, qp->id);
 
 	if (n >= sizeof(qp->name))
@@ -185,6 +245,21 @@ isal_comp_pmd_qp_setup(struct rte_compressdev *dev, uint16_t qp_id,
 		return (-ENOMEM);
 	}
 
+	/* Initialize memory for compression stream structure */
+	qp->stream = rte_zmalloc_socket("Isa-l compression stream ",
+			sizeof(struct isal_zstream),  RTE_CACHE_LINE_SIZE,
+			socket_id);
+
+	/* Initialize memory for compression level buffer */
+	qp->stream->level_buf = rte_zmalloc_socket("Isa-l compression lev_buf",
+			ISAL_DEF_LVL3_DEFAULT, RTE_CACHE_LINE_SIZE,
+			socket_id);
+
+	/* Initialize memory for decompression state structure */
+	qp->state = rte_zmalloc_socket("Isa-l decompression state",
+			sizeof(struct inflate_state), RTE_CACHE_LINE_SIZE,
+			socket_id);
+
 	qp->id = qp_id;
 	dev->data->queue_pairs[qp_id] = qp;
 
@@ -203,6 +278,8 @@ isal_comp_pmd_qp_setup(struct rte_compressdev *dev, uint16_t qp_id,
 		goto qp_setup_cleanup;
 	}
 
+	qp->num_free_elements = rte_ring_free_count(qp->processed_pkts);
+
 	memset(&qp->qp_stats, 0, sizeof(qp->qp_stats));
 	return 0;
 
@@ -263,8 +340,8 @@ struct rte_compressdev_ops isal_pmd_ops = {
 		.dev_stop		= isal_comp_pmd_stop,
 		.dev_close		= isal_comp_pmd_close,
 
-		.stats_get		= NULL,
-		.stats_reset		= NULL,
+		.stats_get		= isal_comp_pmd_stats_get,
+		.stats_reset		= isal_comp_pmd_stats_reset,
 
 		.dev_infos_get		= isal_comp_pmd_info_get,