X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fcrypto%2Faesni_gcm%2Faesni_gcm_pmd_private.h;h=2763d1c49299df6b55bfbe693c749cdb3bb75e34;hb=0136dd3727165dcf08bb8a654548707577956a47;hp=903e7503d3a62f41fed476cfae35ba0da6429654;hpb=725d2a7fbf717d9a6189ac9b49bad2b4f5391a60;p=dpdk.git diff --git a/drivers/crypto/aesni_gcm/aesni_gcm_pmd_private.h b/drivers/crypto/aesni_gcm/aesni_gcm_pmd_private.h index 903e7503d3..2763d1c492 100644 --- a/drivers/crypto/aesni_gcm/aesni_gcm_pmd_private.h +++ b/drivers/crypto/aesni_gcm/aesni_gcm_pmd_private.h @@ -1,9 +1,9 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2016-2017 Intel Corporation + * Copyright(c) 2016-2020 Intel Corporation */ -#ifndef _RTE_AESNI_GCM_PMD_PRIVATE_H_ -#define _RTE_AESNI_GCM_PMD_PRIVATE_H_ +#ifndef _AESNI_GCM_PMD_PRIVATE_H_ +#define _AESNI_GCM_PMD_PRIVATE_H_ #include "aesni_gcm_ops.h" @@ -20,7 +20,7 @@ /**< AES-NI GCM PMD device name */ /** AES-NI GCM PMD LOGTYPE DRIVER */ -int aesni_gcm_logtype_driver; +extern int aesni_gcm_logtype_driver; #define AESNI_GCM_LOG(level, fmt, ...) \ rte_log(RTE_LOG_ ## level, aesni_gcm_logtype_driver, \ "%s() line %u: "fmt "\n", __func__, __LINE__, \ @@ -35,11 +35,15 @@ struct aesni_gcm_private { /**< Vector mode */ unsigned max_nb_queue_pairs; /**< Max number of queue pairs supported by device */ + MB_MGR *mb_mgr; + /**< Multi-buffer instance */ + struct aesni_gcm_ops ops[GCM_KEY_NUM]; + /**< Function pointer table of the gcm APIs */ }; struct aesni_gcm_qp { const struct aesni_gcm_ops *ops; - /**< Architecture dependent function pointer table of the gcm APIs */ + /**< Function pointer table of the gcm APIs */ struct rte_ring *processed_pkts; /**< Ring for placing process packets */ struct gcm_context_data gdata_ctx; /* (16 * 5) + 8 = 88 B */ @@ -88,6 +92,8 @@ struct aesni_gcm_session { /**< GCM key type */ struct gcm_key_data gdata_key; /**< GCM parameters */ + struct aesni_gcm_session_ops ops; + /**< Session handlers */ }; @@ -105,10 +111,13 @@ aesni_gcm_set_session_parameters(const struct aesni_gcm_ops *ops, struct aesni_gcm_session *sess, const struct rte_crypto_sym_xform *xform); - -/** - * Device specific operations function pointer structure */ +/* Device specific operations function pointer structure */ extern struct rte_cryptodev_ops *rte_aesni_gcm_pmd_ops; +/** CPU crypto bulk process handler */ +uint32_t +aesni_gcm_pmd_cpu_crypto_process(struct rte_cryptodev *dev, + struct rte_cryptodev_sym_session *sess, union rte_crypto_sym_ofs ofs, + struct rte_crypto_sym_vec *vec); -#endif /* _RTE_AESNI_GCM_PMD_PRIVATE_H_ */ +#endif /* _AESNI_GCM_PMD_PRIVATE_H_ */