X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fcrypto%2Fcnxk%2Fcnxk_se.h;h=7959c4c7af8d3aa3ef3c4280195148c0c4c262ec;hb=90a2ec4ae81f2ef52f7c14bfc9307e75a4127fa4;hp=e8be6630567366a0b3b02035e9114d66885081d0;hpb=b02cd7a3168dbf2b42bb26ca119bb8981b45f04c;p=dpdk.git diff --git a/drivers/crypto/cnxk/cnxk_se.h b/drivers/crypto/cnxk/cnxk_se.h index e8be663056..7959c4c7af 100644 --- a/drivers/crypto/cnxk/cnxk_se.h +++ b/drivers/crypto/cnxk/cnxk_se.h @@ -36,6 +36,29 @@ struct cnxk_se_sess { struct roc_se_ctx roc_se_ctx; } __rte_cache_aligned; +static inline void +pdcp_iv_copy(uint8_t *iv_d, uint8_t *iv_s, const uint8_t pdcp_alg_type) +{ + uint32_t *iv_s_temp, iv_temp[4]; + int j; + + if (pdcp_alg_type == ROC_SE_PDCP_ALG_TYPE_SNOW3G) { + /* + * DPDK seems to provide it in form of IV3 IV2 IV1 IV0 + * and BigEndian, MC needs it as IV0 IV1 IV2 IV3 + */ + + iv_s_temp = (uint32_t *)iv_s; + + for (j = 0; j < 4; j++) + iv_temp[j] = iv_s_temp[3 - j]; + memcpy(iv_d, iv_temp, 16); + } else { + /* ZUC doesn't need a swap */ + memcpy(iv_d, iv_s, 16); + } +} + static __rte_always_inline int cpt_mac_len_verify(struct rte_crypto_auth_xform *auth) { @@ -211,6 +234,136 @@ fill_sg_comp_from_iov(struct roc_se_sglist_comp *list, uint32_t i, return (uint32_t)i; } +static __rte_always_inline int +cpt_digest_gen_prep(uint32_t flags, uint64_t d_lens, + struct roc_se_fc_params *params, struct cpt_inst_s *inst) +{ + void *m_vaddr = params->meta_buf.vaddr; + uint32_t size, i; + uint16_t data_len, mac_len, key_len; + roc_se_auth_type hash_type; + struct roc_se_ctx *ctx; + struct roc_se_sglist_comp *gather_comp; + struct roc_se_sglist_comp *scatter_comp; + uint8_t *in_buffer; + uint32_t g_size_bytes, s_size_bytes; + union cpt_inst_w4 cpt_inst_w4; + + ctx = params->ctx_buf.vaddr; + + hash_type = ctx->hash_type; + mac_len = ctx->mac_len; + key_len = ctx->auth_key_len; + data_len = ROC_SE_AUTH_DLEN(d_lens); + + /*GP op header */ + cpt_inst_w4.s.opcode_minor = 0; + cpt_inst_w4.s.param2 = ((uint16_t)hash_type << 8); + if (ctx->hmac) { + cpt_inst_w4.s.opcode_major = + ROC_SE_MAJOR_OP_HMAC | ROC_SE_DMA_MODE; + cpt_inst_w4.s.param1 = key_len; + cpt_inst_w4.s.dlen = data_len + RTE_ALIGN_CEIL(key_len, 8); + } else { + cpt_inst_w4.s.opcode_major = + ROC_SE_MAJOR_OP_HASH | ROC_SE_DMA_MODE; + cpt_inst_w4.s.param1 = 0; + cpt_inst_w4.s.dlen = data_len; + } + + /* Null auth only case enters the if */ + if (unlikely(!hash_type && !ctx->enc_cipher)) { + cpt_inst_w4.s.opcode_major = ROC_SE_MAJOR_OP_MISC; + /* Minor op is passthrough */ + cpt_inst_w4.s.opcode_minor = 0x03; + /* Send out completion code only */ + cpt_inst_w4.s.param2 = 0x1; + } + + /* DPTR has SG list */ + in_buffer = m_vaddr; + + ((uint16_t *)in_buffer)[0] = 0; + ((uint16_t *)in_buffer)[1] = 0; + + /* TODO Add error check if space will be sufficient */ + gather_comp = (struct roc_se_sglist_comp *)((uint8_t *)m_vaddr + 8); + + /* + * Input gather list + */ + + i = 0; + + if (ctx->hmac) { + uint64_t k_vaddr = (uint64_t)ctx->auth_key; + /* Key */ + i = fill_sg_comp(gather_comp, i, k_vaddr, + RTE_ALIGN_CEIL(key_len, 8)); + } + + /* input data */ + size = data_len; + if (size) { + i = fill_sg_comp_from_iov(gather_comp, i, params->src_iov, 0, + &size, NULL, 0); + if (unlikely(size)) { + plt_dp_err("Insufficient dst IOV size, short by %dB", + size); + return -1; + } + } else { + /* + * Looks like we need to support zero data + * gather ptr in case of hash & hmac + */ + i++; + } + ((uint16_t *)in_buffer)[2] = rte_cpu_to_be_16(i); + g_size_bytes = ((i + 3) / 4) * sizeof(struct roc_se_sglist_comp); + + /* + * Output Gather list + */ + + i = 0; + scatter_comp = (struct roc_se_sglist_comp *)((uint8_t *)gather_comp + + g_size_bytes); + + if (flags & ROC_SE_VALID_MAC_BUF) { + if (unlikely(params->mac_buf.size < mac_len)) { + plt_dp_err("Insufficient MAC size"); + return -1; + } + + size = mac_len; + i = fill_sg_comp_from_buf_min(scatter_comp, i, ¶ms->mac_buf, + &size); + } else { + size = mac_len; + i = fill_sg_comp_from_iov(scatter_comp, i, params->src_iov, + data_len, &size, NULL, 0); + if (unlikely(size)) { + plt_dp_err("Insufficient dst IOV size, short by %dB", + size); + return -1; + } + } + + ((uint16_t *)in_buffer)[3] = rte_cpu_to_be_16(i); + s_size_bytes = ((i + 3) / 4) * sizeof(struct roc_se_sglist_comp); + + size = g_size_bytes + s_size_bytes + ROC_SE_SG_LIST_HDR_SIZE; + + /* This is DPTR len in case of SG mode */ + cpt_inst_w4.s.dlen = size; + + inst->dptr = (uint64_t)in_buffer; + inst->w4.u64 = cpt_inst_w4.u64; + + return 0; +} + static __rte_always_inline int cpt_enc_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens, struct roc_se_fc_params *fc_params, struct cpt_inst_s *inst) @@ -816,6 +969,578 @@ cpt_dec_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens, return 0; } +static __rte_always_inline int +cpt_zuc_snow3g_prep(uint32_t req_flags, uint64_t d_offs, uint64_t d_lens, + struct roc_se_fc_params *params, struct cpt_inst_s *inst) +{ + uint32_t size; + int32_t inputlen, outputlen; + struct roc_se_ctx *se_ctx; + uint32_t mac_len = 0; + uint8_t pdcp_alg_type; + uint32_t encr_offset, auth_offset; + uint32_t encr_data_len, auth_data_len; + int flags, iv_len; + uint64_t offset_ctrl; + uint64_t *offset_vaddr; + uint8_t *iv_s; + union cpt_inst_w4 cpt_inst_w4; + + se_ctx = params->ctx_buf.vaddr; + flags = se_ctx->zsk_flags; + mac_len = se_ctx->mac_len; + pdcp_alg_type = se_ctx->pdcp_alg_type; + + cpt_inst_w4.s.opcode_major = ROC_SE_MAJOR_OP_ZUC_SNOW3G; + + cpt_inst_w4.s.opcode_minor = se_ctx->template_w4.s.opcode_minor; + + if (flags == 0x1) { + iv_s = params->auth_iv_buf; + iv_len = params->auth_iv_len; + + /* + * Microcode expects offsets in bytes + * TODO: Rounding off + */ + auth_data_len = ROC_SE_AUTH_DLEN(d_lens); + + /* EIA3 or UIA2 */ + auth_offset = ROC_SE_AUTH_OFFSET(d_offs); + auth_offset = auth_offset / 8; + + /* consider iv len */ + auth_offset += iv_len; + + inputlen = auth_offset + (RTE_ALIGN(auth_data_len, 8) / 8); + outputlen = mac_len; + + offset_ctrl = rte_cpu_to_be_64((uint64_t)auth_offset); + + encr_data_len = 0; + encr_offset = 0; + } else { + iv_s = params->iv_buf; + iv_len = params->cipher_iv_len; + + /* EEA3 or UEA2 */ + /* + * Microcode expects offsets in bytes + * TODO: Rounding off + */ + encr_data_len = ROC_SE_ENCR_DLEN(d_lens); + + encr_offset = ROC_SE_ENCR_OFFSET(d_offs); + encr_offset = encr_offset / 8; + /* consider iv len */ + encr_offset += iv_len; + + inputlen = encr_offset + (RTE_ALIGN(encr_data_len, 8) / 8); + outputlen = inputlen; + + /* iv offset is 0 */ + offset_ctrl = rte_cpu_to_be_64((uint64_t)encr_offset << 16); + + auth_data_len = 0; + auth_offset = 0; + } + + if (unlikely((encr_offset >> 16) || (auth_offset >> 8))) { + plt_dp_err("Offset not supported"); + plt_dp_err("enc_offset: %d", encr_offset); + plt_dp_err("auth_offset: %d", auth_offset); + return -1; + } + + /* + * GP op header, lengths are expected in bits. + */ + cpt_inst_w4.s.param1 = encr_data_len; + cpt_inst_w4.s.param2 = auth_data_len; + + /* + * In cn9k, cn10k since we have a limitation of + * IV & Offset control word not part of instruction + * and need to be part of Data Buffer, we check if + * head room is there and then only do the Direct mode processing + */ + if (likely((req_flags & ROC_SE_SINGLE_BUF_INPLACE) && + (req_flags & ROC_SE_SINGLE_BUF_HEADROOM))) { + void *dm_vaddr = params->bufs[0].vaddr; + + /* Use Direct mode */ + + offset_vaddr = (uint64_t *)((uint8_t *)dm_vaddr - + ROC_SE_OFF_CTRL_LEN - iv_len); + + /* DPTR */ + inst->dptr = (uint64_t)offset_vaddr; + /* RPTR should just exclude offset control word */ + inst->rptr = (uint64_t)dm_vaddr - iv_len; + + cpt_inst_w4.s.dlen = inputlen + ROC_SE_OFF_CTRL_LEN; + + uint8_t *iv_d = ((uint8_t *)offset_vaddr + ROC_SE_OFF_CTRL_LEN); + pdcp_iv_copy(iv_d, iv_s, pdcp_alg_type); + + *offset_vaddr = offset_ctrl; + } else { + void *m_vaddr = params->meta_buf.vaddr; + uint32_t i, g_size_bytes, s_size_bytes; + struct roc_se_sglist_comp *gather_comp; + struct roc_se_sglist_comp *scatter_comp; + uint8_t *in_buffer; + uint8_t *iv_d; + + /* save space for iv */ + offset_vaddr = m_vaddr; + + m_vaddr = (uint8_t *)m_vaddr + ROC_SE_OFF_CTRL_LEN + iv_len; + + cpt_inst_w4.s.opcode_major |= (uint64_t)ROC_SE_DMA_MODE; + + /* DPTR has SG list */ + in_buffer = m_vaddr; + + ((uint16_t *)in_buffer)[0] = 0; + ((uint16_t *)in_buffer)[1] = 0; + + /* TODO Add error check if space will be sufficient */ + gather_comp = + (struct roc_se_sglist_comp *)((uint8_t *)m_vaddr + 8); + + /* + * Input Gather List + */ + i = 0; + + /* Offset control word followed by iv */ + + i = fill_sg_comp(gather_comp, i, (uint64_t)offset_vaddr, + ROC_SE_OFF_CTRL_LEN + iv_len); + + /* iv offset is 0 */ + *offset_vaddr = offset_ctrl; + + iv_d = ((uint8_t *)offset_vaddr + ROC_SE_OFF_CTRL_LEN); + pdcp_iv_copy(iv_d, iv_s, pdcp_alg_type); + + /* input data */ + size = inputlen - iv_len; + if (size) { + i = fill_sg_comp_from_iov(gather_comp, i, + params->src_iov, 0, &size, + NULL, 0); + if (unlikely(size)) { + plt_dp_err("Insufficient buffer space," + " size %d needed", + size); + return -1; + } + } + ((uint16_t *)in_buffer)[2] = rte_cpu_to_be_16(i); + g_size_bytes = + ((i + 3) / 4) * sizeof(struct roc_se_sglist_comp); + + /* + * Output Scatter List + */ + + i = 0; + scatter_comp = + (struct roc_se_sglist_comp *)((uint8_t *)gather_comp + + g_size_bytes); + + if (flags == 0x1) { + /* IV in SLIST only for EEA3 & UEA2 */ + iv_len = 0; + } + + if (iv_len) { + i = fill_sg_comp(scatter_comp, i, + (uint64_t)offset_vaddr + + ROC_SE_OFF_CTRL_LEN, + iv_len); + } + + /* Add output data */ + if (req_flags & ROC_SE_VALID_MAC_BUF) { + size = outputlen - iv_len - mac_len; + if (size) { + i = fill_sg_comp_from_iov(scatter_comp, i, + params->dst_iov, 0, + &size, NULL, 0); + + if (unlikely(size)) { + plt_dp_err("Insufficient buffer space," + " size %d needed", + size); + return -1; + } + } + + /* mac data */ + if (mac_len) { + i = fill_sg_comp_from_buf(scatter_comp, i, + ¶ms->mac_buf); + } + } else { + /* Output including mac */ + size = outputlen - iv_len; + if (size) { + i = fill_sg_comp_from_iov(scatter_comp, i, + params->dst_iov, 0, + &size, NULL, 0); + + if (unlikely(size)) { + plt_dp_err("Insufficient buffer space," + " size %d needed", + size); + return -1; + } + } + } + ((uint16_t *)in_buffer)[3] = rte_cpu_to_be_16(i); + s_size_bytes = + ((i + 3) / 4) * sizeof(struct roc_se_sglist_comp); + + size = g_size_bytes + s_size_bytes + ROC_SE_SG_LIST_HDR_SIZE; + + /* This is DPTR len in case of SG mode */ + cpt_inst_w4.s.dlen = size; + + inst->dptr = (uint64_t)in_buffer; + } + + inst->w4.u64 = cpt_inst_w4.u64; + + return 0; +} + +static __rte_always_inline int +cpt_kasumi_enc_prep(uint32_t req_flags, uint64_t d_offs, uint64_t d_lens, + struct roc_se_fc_params *params, struct cpt_inst_s *inst) +{ + void *m_vaddr = params->meta_buf.vaddr; + uint32_t size; + int32_t inputlen = 0, outputlen = 0; + struct roc_se_ctx *se_ctx; + uint32_t mac_len = 0; + uint8_t i = 0; + uint32_t encr_offset, auth_offset; + uint32_t encr_data_len, auth_data_len; + int flags; + uint8_t *iv_s, *iv_d, iv_len = 8; + uint8_t dir = 0; + uint64_t *offset_vaddr; + union cpt_inst_w4 cpt_inst_w4; + uint8_t *in_buffer; + uint32_t g_size_bytes, s_size_bytes; + struct roc_se_sglist_comp *gather_comp; + struct roc_se_sglist_comp *scatter_comp; + + encr_offset = ROC_SE_ENCR_OFFSET(d_offs) / 8; + auth_offset = ROC_SE_AUTH_OFFSET(d_offs) / 8; + encr_data_len = ROC_SE_ENCR_DLEN(d_lens); + auth_data_len = ROC_SE_AUTH_DLEN(d_lens); + + se_ctx = params->ctx_buf.vaddr; + flags = se_ctx->zsk_flags; + mac_len = se_ctx->mac_len; + + if (flags == 0x0) + iv_s = params->iv_buf; + else + iv_s = params->auth_iv_buf; + + dir = iv_s[8] & 0x1; + + cpt_inst_w4.s.opcode_major = ROC_SE_MAJOR_OP_KASUMI | ROC_SE_DMA_MODE; + + /* indicates ECB/CBC, direction, ctx from cptr, iv from dptr */ + cpt_inst_w4.s.opcode_minor = ((1 << 6) | (se_ctx->k_ecb << 5) | + (dir << 4) | (0 << 3) | (flags & 0x7)); + + /* + * GP op header, lengths are expected in bits. + */ + cpt_inst_w4.s.param1 = encr_data_len; + cpt_inst_w4.s.param2 = auth_data_len; + + /* consider iv len */ + if (flags == 0x0) { + encr_offset += iv_len; + auth_offset += iv_len; + } + + /* save space for offset ctrl and iv */ + offset_vaddr = m_vaddr; + + m_vaddr = (uint8_t *)m_vaddr + ROC_SE_OFF_CTRL_LEN + iv_len; + + /* DPTR has SG list */ + in_buffer = m_vaddr; + + ((uint16_t *)in_buffer)[0] = 0; + ((uint16_t *)in_buffer)[1] = 0; + + /* TODO Add error check if space will be sufficient */ + gather_comp = (struct roc_se_sglist_comp *)((uint8_t *)m_vaddr + 8); + + /* + * Input Gather List + */ + i = 0; + + /* Offset control word followed by iv */ + + if (flags == 0x0) { + inputlen = encr_offset + (RTE_ALIGN(encr_data_len, 8) / 8); + outputlen = inputlen; + /* iv offset is 0 */ + *offset_vaddr = rte_cpu_to_be_64((uint64_t)encr_offset << 16); + if (unlikely((encr_offset >> 16))) { + plt_dp_err("Offset not supported"); + plt_dp_err("enc_offset: %d", encr_offset); + return -1; + } + } else { + inputlen = auth_offset + (RTE_ALIGN(auth_data_len, 8) / 8); + outputlen = mac_len; + /* iv offset is 0 */ + *offset_vaddr = rte_cpu_to_be_64((uint64_t)auth_offset); + if (unlikely((auth_offset >> 8))) { + plt_dp_err("Offset not supported"); + plt_dp_err("auth_offset: %d", auth_offset); + return -1; + } + } + + i = fill_sg_comp(gather_comp, i, (uint64_t)offset_vaddr, + ROC_SE_OFF_CTRL_LEN + iv_len); + + /* IV */ + iv_d = (uint8_t *)offset_vaddr + ROC_SE_OFF_CTRL_LEN; + memcpy(iv_d, iv_s, iv_len); + + /* input data */ + size = inputlen - iv_len; + if (size) { + i = fill_sg_comp_from_iov(gather_comp, i, params->src_iov, 0, + &size, NULL, 0); + + if (unlikely(size)) { + plt_dp_err("Insufficient buffer space," + " size %d needed", + size); + return -1; + } + } + ((uint16_t *)in_buffer)[2] = rte_cpu_to_be_16(i); + g_size_bytes = ((i + 3) / 4) * sizeof(struct roc_se_sglist_comp); + + /* + * Output Scatter List + */ + + i = 0; + scatter_comp = (struct roc_se_sglist_comp *)((uint8_t *)gather_comp + + g_size_bytes); + + if (flags == 0x1) { + /* IV in SLIST only for F8 */ + iv_len = 0; + } + + /* IV */ + if (iv_len) { + i = fill_sg_comp(scatter_comp, i, + (uint64_t)offset_vaddr + ROC_SE_OFF_CTRL_LEN, + iv_len); + } + + /* Add output data */ + if (req_flags & ROC_SE_VALID_MAC_BUF) { + size = outputlen - iv_len - mac_len; + if (size) { + i = fill_sg_comp_from_iov(scatter_comp, i, + params->dst_iov, 0, &size, + NULL, 0); + + if (unlikely(size)) { + plt_dp_err("Insufficient buffer space," + " size %d needed", + size); + return -1; + } + } + + /* mac data */ + if (mac_len) { + i = fill_sg_comp_from_buf(scatter_comp, i, + ¶ms->mac_buf); + } + } else { + /* Output including mac */ + size = outputlen - iv_len; + if (size) { + i = fill_sg_comp_from_iov(scatter_comp, i, + params->dst_iov, 0, &size, + NULL, 0); + + if (unlikely(size)) { + plt_dp_err("Insufficient buffer space," + " size %d needed", + size); + return -1; + } + } + } + ((uint16_t *)in_buffer)[3] = rte_cpu_to_be_16(i); + s_size_bytes = ((i + 3) / 4) * sizeof(struct roc_se_sglist_comp); + + size = g_size_bytes + s_size_bytes + ROC_SE_SG_LIST_HDR_SIZE; + + /* This is DPTR len in case of SG mode */ + cpt_inst_w4.s.dlen = size; + + inst->dptr = (uint64_t)in_buffer; + inst->w4.u64 = cpt_inst_w4.u64; + + return 0; +} + +static __rte_always_inline int +cpt_kasumi_dec_prep(uint64_t d_offs, uint64_t d_lens, + struct roc_se_fc_params *params, struct cpt_inst_s *inst) +{ + void *m_vaddr = params->meta_buf.vaddr; + uint32_t size; + int32_t inputlen = 0, outputlen; + struct roc_se_ctx *se_ctx; + uint8_t i = 0, iv_len = 8; + uint32_t encr_offset; + uint32_t encr_data_len; + int flags; + uint8_t dir = 0; + uint64_t *offset_vaddr; + union cpt_inst_w4 cpt_inst_w4; + uint8_t *in_buffer; + uint32_t g_size_bytes, s_size_bytes; + struct roc_se_sglist_comp *gather_comp; + struct roc_se_sglist_comp *scatter_comp; + + encr_offset = ROC_SE_ENCR_OFFSET(d_offs) / 8; + encr_data_len = ROC_SE_ENCR_DLEN(d_lens); + + se_ctx = params->ctx_buf.vaddr; + flags = se_ctx->zsk_flags; + + cpt_inst_w4.u64 = 0; + cpt_inst_w4.s.opcode_major = ROC_SE_MAJOR_OP_KASUMI | ROC_SE_DMA_MODE; + + /* indicates ECB/CBC, direction, ctx from cptr, iv from dptr */ + cpt_inst_w4.s.opcode_minor = ((1 << 6) | (se_ctx->k_ecb << 5) | + (dir << 4) | (0 << 3) | (flags & 0x7)); + + /* + * GP op header, lengths are expected in bits. + */ + cpt_inst_w4.s.param1 = encr_data_len; + + /* consider iv len */ + encr_offset += iv_len; + + inputlen = iv_len + (RTE_ALIGN(encr_data_len, 8) / 8); + outputlen = inputlen; + + /* save space for offset ctrl & iv */ + offset_vaddr = m_vaddr; + + m_vaddr = (uint8_t *)m_vaddr + ROC_SE_OFF_CTRL_LEN + iv_len; + + /* DPTR has SG list */ + in_buffer = m_vaddr; + + ((uint16_t *)in_buffer)[0] = 0; + ((uint16_t *)in_buffer)[1] = 0; + + /* TODO Add error check if space will be sufficient */ + gather_comp = (struct roc_se_sglist_comp *)((uint8_t *)m_vaddr + 8); + + /* + * Input Gather List + */ + i = 0; + + /* Offset control word followed by iv */ + *offset_vaddr = rte_cpu_to_be_64((uint64_t)encr_offset << 16); + if (unlikely((encr_offset >> 16))) { + plt_dp_err("Offset not supported"); + plt_dp_err("enc_offset: %d", encr_offset); + return -1; + } + + i = fill_sg_comp(gather_comp, i, (uint64_t)offset_vaddr, + ROC_SE_OFF_CTRL_LEN + iv_len); + + /* IV */ + memcpy((uint8_t *)offset_vaddr + ROC_SE_OFF_CTRL_LEN, params->iv_buf, + iv_len); + + /* Add input data */ + size = inputlen - iv_len; + if (size) { + i = fill_sg_comp_from_iov(gather_comp, i, params->src_iov, 0, + &size, NULL, 0); + if (unlikely(size)) { + plt_dp_err("Insufficient buffer space," + " size %d needed", + size); + return -1; + } + } + ((uint16_t *)in_buffer)[2] = rte_cpu_to_be_16(i); + g_size_bytes = ((i + 3) / 4) * sizeof(struct roc_se_sglist_comp); + + /* + * Output Scatter List + */ + + i = 0; + scatter_comp = (struct roc_se_sglist_comp *)((uint8_t *)gather_comp + + g_size_bytes); + + /* IV */ + i = fill_sg_comp(scatter_comp, i, + (uint64_t)offset_vaddr + ROC_SE_OFF_CTRL_LEN, iv_len); + + /* Add output data */ + size = outputlen - iv_len; + if (size) { + i = fill_sg_comp_from_iov(scatter_comp, i, params->dst_iov, 0, + &size, NULL, 0); + if (unlikely(size)) { + plt_dp_err("Insufficient buffer space," + " size %d needed", + size); + return -1; + } + } + ((uint16_t *)in_buffer)[3] = rte_cpu_to_be_16(i); + s_size_bytes = ((i + 3) / 4) * sizeof(struct roc_se_sglist_comp); + + size = g_size_bytes + s_size_bytes + ROC_SE_SG_LIST_HDR_SIZE; + + /* This is DPTR len in case of SG mode */ + cpt_inst_w4.s.dlen = size; + + inst->dptr = (uint64_t)in_buffer; + inst->w4.u64 = cpt_inst_w4.u64; + + return 0; +} + static __rte_always_inline int cpt_fc_dec_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens, struct roc_se_fc_params *fc_params, @@ -827,8 +1552,21 @@ cpt_fc_dec_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens, fc_type = ctx->fc_type; - if (likely(fc_type == ROC_SE_FC_GEN)) + if (likely(fc_type == ROC_SE_FC_GEN)) { ret = cpt_dec_hmac_prep(flags, d_offs, d_lens, fc_params, inst); + } else if (fc_type == ROC_SE_PDCP) { + ret = cpt_zuc_snow3g_prep(flags, d_offs, d_lens, fc_params, + inst); + } else if (fc_type == ROC_SE_KASUMI) { + ret = cpt_kasumi_dec_prep(d_offs, d_lens, fc_params, inst); + } + + /* + * For AUTH_ONLY case, + * MC only supports digest generation and verification + * should be done in software by memcmp() + */ + return ret; } @@ -843,8 +1581,17 @@ cpt_fc_enc_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens, fc_type = ctx->fc_type; - if (likely(fc_type == ROC_SE_FC_GEN)) + if (likely(fc_type == ROC_SE_FC_GEN)) { ret = cpt_enc_hmac_prep(flags, d_offs, d_lens, fc_params, inst); + } else if (fc_type == ROC_SE_PDCP) { + ret = cpt_zuc_snow3g_prep(flags, d_offs, d_lens, fc_params, + inst); + } else if (fc_type == ROC_SE_KASUMI) { + ret = cpt_kasumi_enc_prep(flags, d_offs, d_lens, fc_params, + inst); + } else if (fc_type == ROC_SE_HASH_HMAC) { + ret = cpt_digest_gen_prep(flags, d_lens, fc_params, inst); + } return ret; } @@ -974,7 +1721,7 @@ fill_sess_cipher(struct rte_crypto_sym_xform *xform, struct cnxk_se_sess *sess) break; case RTE_CRYPTO_CIPHER_ZUC_EEA3: enc_type = ROC_SE_ZUC_EEA3; - cipher_key_len = 16; + cipher_key_len = c_form->key.length; zsk_flag = ROC_SE_ZS_EA; break; case RTE_CRYPTO_CIPHER_AES_XTS: @@ -1018,6 +1765,8 @@ fill_sess_cipher(struct rte_crypto_sym_xform *xform, struct cnxk_se_sess *sess) NULL))) return -1; + if ((enc_type >= ROC_SE_ZUC_EEA3) && (enc_type <= ROC_SE_AES_CTR_EEA2)) + roc_se_ctx_swap(&sess->roc_se_ctx); return 0; } @@ -1121,6 +1870,10 @@ fill_sess_auth(struct rte_crypto_sym_xform *xform, struct cnxk_se_sess *sess) a_form->digest_length))) return -1; + if ((auth_type >= ROC_SE_ZUC_EIA3) && + (auth_type <= ROC_SE_AES_CMAC_EIA2)) + roc_se_ctx_swap(&sess->roc_se_ctx); + return 0; } @@ -1318,6 +2071,9 @@ fill_fc_params(struct rte_crypto_op *cop, struct cnxk_se_sess *sess, uint32_t iv_buf[4]; int ret; + fc_params.cipher_iv_len = sess->iv_length; + fc_params.auth_iv_len = sess->auth_iv_length; + if (likely(sess->iv_length)) { flags |= ROC_SE_VALID_IV_BUF; fc_params.iv_buf = rte_crypto_op_ctod_offset(cop, uint8_t *, @@ -1530,4 +2286,205 @@ err_exit: return ret; } +static __rte_always_inline void +compl_auth_verify(struct rte_crypto_op *op, uint8_t *gen_mac, uint64_t mac_len) +{ + uint8_t *mac; + struct rte_crypto_sym_op *sym_op = op->sym; + + if (sym_op->auth.digest.data) + mac = sym_op->auth.digest.data; + else + mac = rte_pktmbuf_mtod_offset(sym_op->m_src, uint8_t *, + sym_op->auth.data.length + + sym_op->auth.data.offset); + if (!mac) { + op->status = RTE_CRYPTO_OP_STATUS_ERROR; + return; + } + + if (memcmp(mac, gen_mac, mac_len)) + op->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED; + else + op->status = RTE_CRYPTO_OP_STATUS_SUCCESS; +} + +static __rte_always_inline void +find_kasumif9_direction_and_length(uint8_t *src, uint32_t counter_num_bytes, + uint32_t *addr_length_in_bits, + uint8_t *addr_direction) +{ + uint8_t found = 0; + uint32_t pos; + uint8_t last_byte; + while (!found && counter_num_bytes > 0) { + counter_num_bytes--; + if (src[counter_num_bytes] == 0x00) + continue; + pos = rte_bsf32(src[counter_num_bytes]); + if (pos == 7) { + if (likely(counter_num_bytes > 0)) { + last_byte = src[counter_num_bytes - 1]; + *addr_direction = last_byte & 0x1; + *addr_length_in_bits = + counter_num_bytes * 8 - 1; + } + } else { + last_byte = src[counter_num_bytes]; + *addr_direction = (last_byte >> (pos + 1)) & 0x1; + *addr_length_in_bits = + counter_num_bytes * 8 + (8 - (pos + 2)); + } + found = 1; + } +} + +/* + * This handles all auth only except AES_GMAC + */ +static __rte_always_inline int +fill_digest_params(struct rte_crypto_op *cop, struct cnxk_se_sess *sess, + struct cpt_qp_meta_info *m_info, + struct cpt_inflight_req *infl_req, struct cpt_inst_s *inst) +{ + uint32_t space = 0; + struct rte_crypto_sym_op *sym_op = cop->sym; + void *mdata; + uint32_t auth_range_off; + uint32_t flags = 0; + uint64_t d_offs = 0, d_lens; + struct rte_mbuf *m_src, *m_dst; + uint16_t auth_op = sess->cpt_op & ROC_SE_OP_AUTH_MASK; + uint16_t mac_len = sess->mac_len; + struct roc_se_fc_params params; + char src[SRC_IOV_SIZE]; + uint8_t iv_buf[16]; + int ret; + + memset(¶ms, 0, sizeof(struct roc_se_fc_params)); + + m_src = sym_op->m_src; + + mdata = alloc_op_meta(¶ms.meta_buf, m_info->mlen, m_info->pool, + infl_req); + if (mdata == NULL) { + ret = -ENOMEM; + goto err_exit; + } + + auth_range_off = sym_op->auth.data.offset; + + flags = ROC_SE_VALID_MAC_BUF; + params.src_iov = (void *)src; + if (unlikely(sess->zsk_flag)) { + /* + * Since for Zuc, Kasumi, Snow3g offsets are in bits + * we will send pass through even for auth only case, + * let MC handle it + */ + d_offs = auth_range_off; + auth_range_off = 0; + params.auth_iv_len = sess->auth_iv_length; + params.auth_iv_buf = rte_crypto_op_ctod_offset( + cop, uint8_t *, sess->auth_iv_offset); + if (sess->zsk_flag == ROC_SE_K_F9) { + uint32_t length_in_bits, num_bytes; + uint8_t *src, direction = 0; + + memcpy(iv_buf, + rte_pktmbuf_mtod(cop->sym->m_src, uint8_t *), 8); + /* + * This is kasumi f9, take direction from + * source buffer + */ + length_in_bits = cop->sym->auth.data.length; + num_bytes = (length_in_bits >> 3); + src = rte_pktmbuf_mtod(cop->sym->m_src, uint8_t *); + find_kasumif9_direction_and_length( + src, num_bytes, &length_in_bits, &direction); + length_in_bits -= 64; + cop->sym->auth.data.offset += 64; + d_offs = cop->sym->auth.data.offset; + auth_range_off = d_offs / 8; + cop->sym->auth.data.length = length_in_bits; + + /* Store it at end of auth iv */ + iv_buf[8] = direction; + params.auth_iv_buf = iv_buf; + } + } + + d_lens = sym_op->auth.data.length; + + params.ctx_buf.vaddr = &sess->roc_se_ctx; + + if (auth_op == ROC_SE_OP_AUTH_GENERATE) { + if (sym_op->auth.digest.data) { + /* + * Digest to be generated + * in separate buffer + */ + params.mac_buf.size = sess->mac_len; + params.mac_buf.vaddr = sym_op->auth.digest.data; + } else { + uint32_t off = sym_op->auth.data.offset + + sym_op->auth.data.length; + int32_t dlen, space; + + m_dst = sym_op->m_dst ? sym_op->m_dst : sym_op->m_src; + dlen = rte_pktmbuf_pkt_len(m_dst); + + space = off + mac_len - dlen; + if (space > 0) + if (!rte_pktmbuf_append(m_dst, space)) { + plt_dp_err("Failed to extend " + "mbuf by %uB", + space); + ret = -EINVAL; + goto free_mdata_and_exit; + } + + params.mac_buf.vaddr = + rte_pktmbuf_mtod_offset(m_dst, void *, off); + params.mac_buf.size = mac_len; + } + } else { + uint64_t *op = mdata; + + /* Need space for storing generated mac */ + space += 2 * sizeof(uint64_t); + + params.mac_buf.vaddr = (uint8_t *)mdata + space; + params.mac_buf.size = mac_len; + space += RTE_ALIGN_CEIL(mac_len, 8); + op[0] = (uintptr_t)params.mac_buf.vaddr; + op[1] = mac_len; + infl_req->op_flags |= CPT_OP_FLAGS_AUTH_VERIFY; + } + + params.meta_buf.vaddr = (uint8_t *)mdata + space; + params.meta_buf.size -= space; + + /* Out of place processing */ + params.src_iov = (void *)src; + + /*Store SG I/O in the api for reuse */ + if (prepare_iov_from_pkt(m_src, params.src_iov, auth_range_off)) { + plt_dp_err("Prepare src iov failed"); + ret = -EINVAL; + goto free_mdata_and_exit; + } + + ret = cpt_fc_enc_hmac_prep(flags, d_offs, d_lens, ¶ms, inst); + if (ret) + goto free_mdata_and_exit; + + return 0; + +free_mdata_and_exit: + if (infl_req->op_flags & CPT_OP_FLAGS_METABUF) + rte_mempool_put(m_info->pool, infl_req->mdata); +err_exit: + return ret; +} #endif /*_CNXK_SE_H_ */