X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fcrypto%2Focteontx2%2Fotx2_cryptodev.c;h=7f45e57cce18c207d650a1efb66a0e29543fd7bc;hb=1f411e31a826a9b080c2834a0944b028213e9ed6;hp=9aa0fe35b4f5eb8aee2cda9f75240cd101f3af4a;hpb=a0645ed0d6ef6baa992497ab75682d0abe18e343;p=dpdk.git

diff --git a/drivers/crypto/octeontx2/otx2_cryptodev.c b/drivers/crypto/octeontx2/otx2_cryptodev.c
index 9aa0fe35b4..7f45e57cce 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev.c
+++ b/drivers/crypto/octeontx2/otx2_cryptodev.c
@@ -17,6 +17,7 @@
 #include "otx2_cryptodev_capabilities.h"
 #include "otx2_cryptodev_mbox.h"
 #include "otx2_cryptodev_ops.h"
+#include "otx2_cryptodev_sec.h"
 #include "otx2_dev.h"
 
 /* CPT common headers */
@@ -69,52 +70,70 @@ otx2_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 
 	otx2_dev = &vf->otx2_dev;
 
-	/* Initialize the base otx2_dev object */
-	ret = otx2_dev_init(pci_dev, otx2_dev);
-	if (ret) {
-		CPT_LOG_ERR("Could not initialize otx2_dev");
-		goto pmd_destroy;
+	if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
+		/* Initialize the base otx2_dev object */
+		ret = otx2_dev_init(pci_dev, otx2_dev);
+		if (ret) {
+			CPT_LOG_ERR("Could not initialize otx2_dev");
+			goto pmd_destroy;
+		}
+
+		/* Get number of queues available on the device */
+		ret = otx2_cpt_available_queues_get(dev, &nb_queues);
+		if (ret) {
+			CPT_LOG_ERR("Could not determine the number of queues available");
+			goto otx2_dev_fini;
+		}
+
+		/* Don't exceed the limits set per VF */
+		nb_queues = RTE_MIN(nb_queues, OTX2_CPT_MAX_QUEUES_PER_VF);
+
+		if (nb_queues == 0) {
+			CPT_LOG_ERR("No free queues available on the device");
+			goto otx2_dev_fini;
+		}
+
+		vf->max_queues = nb_queues;
+
+		CPT_LOG_INFO("Max queues supported by device: %d",
+				vf->max_queues);
+
+		ret = otx2_cpt_hardware_caps_get(dev, vf->hw_caps);
+		if (ret) {
+			CPT_LOG_ERR("Could not determine hardware capabilities");
+			goto otx2_dev_fini;
+		}
 	}
 
-	/* Get number of queues available on the device */
-	ret = otx2_cpt_available_queues_get(dev, &nb_queues);
-	if (ret) {
-		CPT_LOG_ERR("Could not determine the number of queues available");
-		goto otx2_dev_fini;
-	}
-
-	/* Don't exceed the limits set per VF */
-	nb_queues = RTE_MIN(nb_queues, OTX2_CPT_MAX_QUEUES_PER_VF);
+	otx2_crypto_capabilities_init(vf->hw_caps);
+	otx2_crypto_sec_capabilities_init(vf->hw_caps);
 
-	if (nb_queues == 0) {
-		CPT_LOG_ERR("No free queues available on the device");
+	/* Create security ctx */
+	ret = otx2_crypto_sec_ctx_create(dev);
+	if (ret)
 		goto otx2_dev_fini;
-	}
-
-	vf->max_queues = nb_queues;
-
-	CPT_LOG_INFO("Max queues supported by device: %d", vf->max_queues);
-
-	ret = otx2_cpt_hardware_caps_get(dev, vf->hw_caps);
-	if (ret) {
-		CPT_LOG_ERR("Could not determine hardware capabilities");
-		goto otx2_dev_fini;
-	}
 
 	dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
 			     RTE_CRYPTODEV_FF_HW_ACCELERATED |
 			     RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
 			     RTE_CRYPTODEV_FF_IN_PLACE_SGL |
+			     RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT |
 			     RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
 			     RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
 			     RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO |
 			     RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT |
-			     RTE_CRYPTODEV_FF_SYM_SESSIONLESS;
+			     RTE_CRYPTODEV_FF_SYM_SESSIONLESS |
+			     RTE_CRYPTODEV_FF_SECURITY |
+			     RTE_CRYPTODEV_FF_DIGEST_ENCRYPTED;
+
+	if (rte_eal_process_type() == RTE_PROC_SECONDARY)
+		otx2_cpt_set_enqdeq_fns(dev);
 
 	return 0;
 
 otx2_dev_fini:
-	otx2_dev_fini(pci_dev, otx2_dev);
+	if (rte_eal_process_type() == RTE_PROC_PRIMARY)
+		otx2_dev_fini(pci_dev, otx2_dev);
 pmd_destroy:
 	rte_cryptodev_pmd_destroy(dev);
 exit:
@@ -138,6 +157,9 @@ otx2_cpt_pci_remove(struct rte_pci_device *pci_dev)
 	if (dev == NULL)
 		return -ENODEV;
 
+	/* Destroy security ctx */
+	otx2_crypto_sec_ctx_destroy(dev);
+
 	return rte_cryptodev_pmd_destroy(dev);
 }