X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fcrypto%2Focteontx2%2Fotx2_cryptodev_hw_access.h;h=f9981ea8c909dd411bbffbb79cf204e453f97daf;hb=e863fe3a13da89787fdf3b5c590101a3c0f10af6;hp=87d4e7754a5de1825f26a0e3dd5644cee703d6b9;hpb=556a273e78b8f2029f0099c8b38f229633a03ebc;p=dpdk.git

diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.h b/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.h
index 87d4e7754a..f9981ea8c9 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.h
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.h
@@ -12,8 +12,10 @@
 
 #include "cpt_common.h"
 #include "cpt_hw_types.h"
+#include "cpt_mcode_defines.h"
 
 #include "otx2_dev.h"
+#include "otx2_cryptodev_qp.h"
 
 /* CPT instruction queue length */
 #define OTX2_CPT_IQ_LEN			8200
@@ -40,10 +42,11 @@
 #define OTX2_CPT_LF_NQ(a)		(0x400ull | (uint64_t)(a) << 3)
 
 #define OTX2_CPT_AF_LF_CTL(a)		(0x27000ull | (uint64_t)(a) << 3)
+#define OTX2_CPT_AF_LF_CTL2(a)		(0x29000ull | (uint64_t)(a) << 3)
 
-#define OTX2_CPT_LF_BAR2(vf, q_id) \
+#define OTX2_CPT_LF_BAR2(vf, blk_addr, q_id) \
 		((vf)->otx2_dev.bar2 + \
-		 ((RVU_BLOCK_ADDR_CPT0 << 20) | ((q_id) << 12)))
+		 ((blk_addr << 20) | ((q_id) << 12)))
 
 #define OTX2_CPT_QUEUE_HI_PRIO 0x1
 
@@ -108,6 +111,17 @@ union otx2_cpt_af_lf_ctl {
 	} s;
 };
 
+union otx2_cpt_af_lf_ctl2 {
+	uint64_t u;
+	struct {
+		uint64_t exe_no_swap                 : 1;
+		uint64_t exe_ldwb                    : 1;
+		uint64_t reserved_2_31               : 30;
+		uint64_t sso_pf_func                 : 16;
+		uint64_t nix_pf_func                 : 16;
+	} s;
+};
+
 union otx2_cpt_lf_q_grp_ptr {
 	uint64_t u;
 	struct {
@@ -119,25 +133,19 @@ union otx2_cpt_lf_q_grp_ptr {
 	} s;
 };
 
-struct otx2_cpt_qp {
-	uint32_t id;
-	/**< Queue pair id */
-	uintptr_t base;
-	/**< Base address where BAR is mapped */
-	void *lmtline;
-	/**< Address of LMTLINE */
-	rte_iova_t lf_nq_reg;
-	/**< LF enqueue register address */
-	struct pending_queue pend_q;
-	/**< Pending queue */
-	struct rte_mempool *sess_mp;
-	/**< Session mempool */
-	struct rte_mempool *sess_mp_priv;
-	/**< Session private data mempool */
-	struct cpt_qp_meta_info meta_info;
-	/**< Metabuf info required to support operations on the queue pair */
-	rte_iova_t iq_dma_addr;
-	/**< Instruction queue address */
+/*
+ * Enumeration cpt_9x_comp_e
+ *
+ * CPT 9X Completion Enumeration
+ * Enumerates the values of CPT_RES_S[COMPCODE].
+ */
+enum cpt_9x_comp_e {
+	CPT_9X_COMP_E_NOTDONE = 0x00,
+	CPT_9X_COMP_E_GOOD = 0x01,
+	CPT_9X_COMP_E_FAULT = 0x02,
+	CPT_9X_COMP_E_HWERR = 0x04,
+	CPT_9X_COMP_E_INSTERR = 0x05,
+	CPT_9X_COMP_E_LAST_ENTRY = 0x06
 };
 
 void otx2_cpt_err_intr_unregister(const struct rte_cryptodev *dev);