X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fevent%2Fcnxk%2Fcnxk_eventdev.h;h=8a5c737e4be74ad1d6b8300f93c0f3cf8b466ad9;hb=77140af0b8cbe45992a8c5e9b82f1a579a32e8e3;hp=b96a6a908222c6db00e721b339f5a2feae30e712;hpb=38c2e3240ba822d8ee4cd92d848d7e3a20ecef6e;p=dpdk.git diff --git a/drivers/event/cnxk/cnxk_eventdev.h b/drivers/event/cnxk/cnxk_eventdev.h index b96a6a9082..8a5c737e4b 100644 --- a/drivers/event/cnxk/cnxk_eventdev.h +++ b/drivers/event/cnxk/cnxk_eventdev.h @@ -5,7 +5,13 @@ #ifndef __CNXK_EVENTDEV_H__ #define __CNXK_EVENTDEV_H__ +#include + +#include #include +#include +#include +#include #include #include #include @@ -14,15 +20,57 @@ #include "roc_api.h" -#define CNXK_SSO_XAE_CNT "xae_cnt" -#define CNXK_SSO_GGRP_QOS "qos" +#include "cnxk_tim_evdev.h" + +#define CNXK_SSO_XAE_CNT "xae_cnt" +#define CNXK_SSO_GGRP_QOS "qos" +#define CNXK_SSO_FORCE_BP "force_rx_bp" +#define CN9K_SSO_SINGLE_WS "single_ws" +#define CN10K_SSO_GW_MODE "gw_mode" -#define USEC2NSEC(__us) ((__us)*1E3) +#define NSEC2USEC(__ns) ((__ns) / 1E3) +#define USEC2NSEC(__us) ((__us)*1E3) +#define NSEC2TICK(__ns, __freq) (((__ns) * (__freq)) / 1E9) +#define CNXK_SSO_MAX_HWGRP (RTE_EVENT_MAX_QUEUES_PER_DEV + 1) #define CNXK_SSO_FC_NAME "cnxk_evdev_xaq_fc" #define CNXK_SSO_MZ_NAME "cnxk_evdev_mz" #define CNXK_SSO_XAQ_CACHE_CNT (0x7) #define CNXK_SSO_XAQ_SLACK (8) +#define CNXK_SSO_WQE_SG_PTR (9) +#define CNXK_SSO_SQB_LIMIT (0x180) + +#define CNXK_TT_FROM_TAG(x) (((x) >> 32) & SSO_TT_EMPTY) +#define CNXK_TT_FROM_EVENT(x) (((x) >> 38) & SSO_TT_EMPTY) +#define CNXK_EVENT_TYPE_FROM_TAG(x) (((x) >> 28) & 0xf) +#define CNXK_SUB_EVENT_FROM_TAG(x) (((x) >> 20) & 0xff) +#define CNXK_CLR_SUB_EVENT(x) (~(0xffu << 20) & x) +#define CNXK_GRP_FROM_TAG(x) (((x) >> 36) & 0x3ff) +#define CNXK_SWTAG_PEND(x) (BIT_ULL(62) & x) + +#define CN9K_SSOW_GET_BASE_ADDR(_GW) ((_GW)-SSOW_LF_GWS_OP_GET_WORK0) + +#define CN10K_GW_MODE_NONE 0 +#define CN10K_GW_MODE_PREF 1 +#define CN10K_GW_MODE_PREF_WFE 2 + +#define CNXK_VALID_DEV_OR_ERR_RET(dev, drv_name) \ + do { \ + if (strncmp(dev->driver->name, drv_name, strlen(drv_name))) \ + return -EINVAL; \ + } while (0) + +typedef void *(*cnxk_sso_init_hws_mem_t)(void *dev, uint8_t port_id); +typedef void (*cnxk_sso_hws_setup_t)(void *dev, void *ws, uintptr_t *grp_base); +typedef void (*cnxk_sso_hws_release_t)(void *dev, void *ws); +typedef int (*cnxk_sso_link_t)(void *dev, void *ws, uint16_t *map, + uint16_t nb_link); +typedef int (*cnxk_sso_unlink_t)(void *dev, void *ws, uint16_t *map, + uint16_t nb_link); +typedef void (*cnxk_handle_event_t)(void *arg, struct rte_event ev); +typedef void (*cnxk_sso_hws_reset_t)(void *arg, void *ws); +typedef void (*cnxk_sso_hws_flush_t)(void *ws, uint8_t queue_id, uintptr_t base, + cnxk_handle_event_t fn, void *arg); struct cnxk_sso_qos { uint16_t queue; @@ -38,6 +86,7 @@ struct cnxk_sso_evdev { uint8_t is_timeout_deq; uint8_t nb_event_queues; uint8_t nb_event_ports; + uint8_t configured; uint32_t deq_tmo_ns; uint32_t min_dequeue_timeout_ns; uint32_t max_dequeue_timeout_ns; @@ -47,14 +96,112 @@ struct cnxk_sso_evdev { uint64_t nb_xaq_cfg; rte_iova_t fc_iova; struct rte_mempool *xaq_pool; + uint64_t rx_offloads; + uint64_t tx_offloads; + uint64_t adptr_xae_cnt; + uint16_t rx_adptr_pool_cnt; + uint64_t *rx_adptr_pools; + uint64_t *tx_adptr_data; + uint16_t max_port_id; + uint16_t tim_adptr_ring_cnt; + uint16_t *timer_adptr_rings; + uint64_t *timer_adptr_sz; + uint16_t vec_pool_cnt; + uint64_t *vec_pools; /* Dev args */ uint32_t xae_cnt; uint8_t qos_queue_cnt; struct cnxk_sso_qos *qos_parse_data; + uint8_t force_ena_bp; /* CN9K */ uint8_t dual_ws; + /* CN10K */ + uint8_t gw_mode; + /* Crypto adapter */ + uint8_t is_ca_internal_port; +} __rte_cache_aligned; + +struct cn10k_sso_hws { + uint64_t base; + /* PTP timestamp */ + struct cnxk_timesync_info *tstamp; + void *lookup_mem; + uint32_t gw_wdata; + uint8_t swtag_req; + uint8_t hws_id; + /* Add Work Fastpath data */ + uint64_t xaq_lmt __rte_cache_aligned; + uint64_t *fc_mem; + uintptr_t grps_base[CNXK_SSO_MAX_HWGRP]; + /* Tx Fastpath data */ + uint64_t tx_base __rte_cache_aligned; + uintptr_t lmt_base; + uint8_t tx_adptr_data[]; +} __rte_cache_aligned; + +/* CN9K HWS ops */ +#define CN9K_SSO_HWS_OPS \ + uintptr_t swtag_desched_op; \ + uintptr_t swtag_flush_op; \ + uintptr_t swtag_norm_op; \ + uintptr_t getwrk_op; \ + uintptr_t tag_op; \ + uintptr_t wqp_op + +/* Event port a.k.a GWS */ +struct cn9k_sso_hws { + /* Get Work Fastpath data */ + CN9K_SSO_HWS_OPS; + /* PTP timestamp */ + struct cnxk_timesync_info *tstamp; + void *lookup_mem; + uint8_t swtag_req; + uint8_t hws_id; + /* Add Work Fastpath data */ + uint64_t xaq_lmt __rte_cache_aligned; + uint64_t *fc_mem; + uintptr_t grps_base[CNXK_SSO_MAX_HWGRP]; + /* Tx Fastpath data */ + uint64_t base __rte_cache_aligned; + uint8_t tx_adptr_data[]; +} __rte_cache_aligned; + +struct cn9k_sso_hws_state { + CN9K_SSO_HWS_OPS; +}; + +struct cn9k_sso_hws_dual { + /* Get Work Fastpath data */ + struct cn9k_sso_hws_state ws_state[2]; /* Ping and Pong */ + /* PTP timestamp */ + struct cnxk_timesync_info *tstamp; + void *lookup_mem; + uint8_t swtag_req; + uint8_t vws; /* Ping pong bit */ + uint8_t hws_id; + /* Add Work Fastpath data */ + uint64_t xaq_lmt __rte_cache_aligned; + uint64_t *fc_mem; + uintptr_t grps_base[CNXK_SSO_MAX_HWGRP]; + /* Tx Fastpath data */ + uint64_t base[2] __rte_cache_aligned; + uint8_t tx_adptr_data[]; +} __rte_cache_aligned; + +struct cnxk_sso_hws_cookie { + const struct rte_eventdev *event_dev; + bool configured; } __rte_cache_aligned; +static inline int +parse_kvargs_flag(const char *key, const char *value, void *opaque) +{ + RTE_SET_USED(key); + + *(uint8_t *)opaque = !!atoi(value); + return 0; +} + static inline int parse_kvargs_value(const char *key, const char *value, void *opaque) { @@ -70,8 +217,17 @@ cnxk_sso_pmd_priv(const struct rte_eventdev *event_dev) return event_dev->data->dev_private; } +static inline struct cnxk_sso_hws_cookie * +cnxk_sso_hws_get_cookie(void *ws) +{ + return RTE_PTR_SUB(ws, sizeof(struct cnxk_sso_hws_cookie)); +} + /* Configuration functions */ +int cnxk_sso_xae_reconfigure(struct rte_eventdev *event_dev); int cnxk_sso_xaq_allocate(struct cnxk_sso_evdev *dev); +void cnxk_sso_updt_xae_cnt(struct cnxk_sso_evdev *dev, void *data, + uint32_t event_type); /* Common ops API. */ int cnxk_sso_init(struct rte_eventdev *event_dev); @@ -80,6 +236,11 @@ int cnxk_sso_remove(struct rte_pci_device *pci_dev); void cnxk_sso_info_get(struct cnxk_sso_evdev *dev, struct rte_event_dev_info *dev_info); int cnxk_sso_dev_validate(const struct rte_eventdev *event_dev); +int cnxk_setup_event_ports(const struct rte_eventdev *event_dev, + cnxk_sso_init_hws_mem_t init_hws_mem, + cnxk_sso_hws_setup_t hws_setup); +void cnxk_sso_restore_links(const struct rte_eventdev *event_dev, + cnxk_sso_link_t link_fn); void cnxk_sso_queue_def_conf(struct rte_eventdev *event_dev, uint8_t queue_id, struct rte_event_queue_conf *queue_conf); int cnxk_sso_queue_setup(struct rte_eventdev *event_dev, uint8_t queue_id, @@ -87,5 +248,62 @@ int cnxk_sso_queue_setup(struct rte_eventdev *event_dev, uint8_t queue_id, void cnxk_sso_queue_release(struct rte_eventdev *event_dev, uint8_t queue_id); void cnxk_sso_port_def_conf(struct rte_eventdev *event_dev, uint8_t port_id, struct rte_event_port_conf *port_conf); +int cnxk_sso_port_setup(struct rte_eventdev *event_dev, uint8_t port_id, + cnxk_sso_hws_setup_t hws_setup_fn); +int cnxk_sso_timeout_ticks(struct rte_eventdev *event_dev, uint64_t ns, + uint64_t *tmo_ticks); +int cnxk_sso_start(struct rte_eventdev *event_dev, + cnxk_sso_hws_reset_t reset_fn, + cnxk_sso_hws_flush_t flush_fn); +void cnxk_sso_stop(struct rte_eventdev *event_dev, + cnxk_sso_hws_reset_t reset_fn, + cnxk_sso_hws_flush_t flush_fn); +int cnxk_sso_close(struct rte_eventdev *event_dev, cnxk_sso_unlink_t unlink_fn); +int cnxk_sso_selftest(const char *dev_name); +void cnxk_sso_dump(struct rte_eventdev *event_dev, FILE *f); + +/* Stats API. */ +int cnxk_sso_xstats_get_names(const struct rte_eventdev *event_dev, + enum rte_event_dev_xstats_mode mode, + uint8_t queue_port_id, + struct rte_event_dev_xstats_name *xstats_names, + unsigned int *ids, unsigned int size); +int cnxk_sso_xstats_get(const struct rte_eventdev *event_dev, + enum rte_event_dev_xstats_mode mode, + uint8_t queue_port_id, const unsigned int ids[], + uint64_t values[], unsigned int n); +int cnxk_sso_xstats_reset(struct rte_eventdev *event_dev, + enum rte_event_dev_xstats_mode mode, + int16_t queue_port_id, const uint32_t ids[], + uint32_t n); + +/* Crypto adapter APIs. */ +int cnxk_crypto_adapter_qp_add(const struct rte_eventdev *event_dev, + const struct rte_cryptodev *cdev, + int32_t queue_pair_id); +int cnxk_crypto_adapter_qp_del(const struct rte_cryptodev *cdev, + int32_t queue_pair_id); + +/* CN9K */ +void cn9k_sso_set_rsrc(void *arg); + +/* Common adapter ops */ +int cnxk_sso_rx_adapter_queue_add( + const struct rte_eventdev *event_dev, const struct rte_eth_dev *eth_dev, + int32_t rx_queue_id, + const struct rte_event_eth_rx_adapter_queue_conf *queue_conf); +int cnxk_sso_rx_adapter_queue_del(const struct rte_eventdev *event_dev, + const struct rte_eth_dev *eth_dev, + int32_t rx_queue_id); +int cnxk_sso_rx_adapter_start(const struct rte_eventdev *event_dev, + const struct rte_eth_dev *eth_dev); +int cnxk_sso_rx_adapter_stop(const struct rte_eventdev *event_dev, + const struct rte_eth_dev *eth_dev); +int cnxk_sso_tx_adapter_queue_add(const struct rte_eventdev *event_dev, + const struct rte_eth_dev *eth_dev, + int32_t tx_queue_id); +int cnxk_sso_tx_adapter_queue_del(const struct rte_eventdev *event_dev, + const struct rte_eth_dev *eth_dev, + int32_t tx_queue_id); #endif /* __CNXK_EVENTDEV_H__ */