X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fevent%2Focteontx%2Fssovf_evdev.h;h=b1856c15b773b2fa3534900b7bb131547ba7a451;hb=31fda5187761f31bf280f72cdff63a5f1669afc8;hp=9a6bac53e9cb97275d39465def6e31db6068c23a;hpb=35a228ac5082c4ebee6b7f626c5d96df958a7387;p=dpdk.git diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h index 9a6bac53e9..b1856c15b7 100644 --- a/drivers/event/octeontx/ssovf_evdev.h +++ b/drivers/event/octeontx/ssovf_evdev.h @@ -1,66 +1,29 @@ -/* - * BSD LICENSE - * - * Copyright (C) Cavium networks Ltd. 2017. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Cavium networks nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2017 Cavium, Inc */ #ifndef __SSOVF_EVDEV_H__ #define __SSOVF_EVDEV_H__ -#include -#include +#include +#include #include -#include "rte_pmd_octeontx_ssovf.h" +#include +#include #define EVENTDEV_NAME_OCTEONTX_PMD event_octeontx -#ifdef RTE_LIBRTE_PMD_OCTEONTX_SSOVF_DEBUG -#define ssovf_log_info(fmt, args...) \ - RTE_LOG(INFO, EVENTDEV, "[%s] %s() " fmt "\n", \ - RTE_STR(EVENTDEV_NAME_OCTEONTX_PMD), __func__, ## args) -#define ssovf_log_dbg(fmt, args...) \ - RTE_LOG(DEBUG, EVENTDEV, "[%s] %s() " fmt "\n", \ - RTE_STR(EVENTDEV_NAME_OCTEONTX_PMD), __func__, ## args) -#else -#define ssovf_log_info(fmt, args...) -#define ssovf_log_dbg(fmt, args...) -#endif +#define SSOVF_LOG(level, fmt, args...) \ + rte_log(RTE_LOG_ ## level, otx_logtype_ssovf, \ + "[%s] %s() " fmt "\n", \ + RTE_STR(EVENTDEV_NAME_OCTEONTX_PMD), __func__, ## args) +#define ssovf_log_info(fmt, ...) SSOVF_LOG(INFO, fmt, ##__VA_ARGS__) +#define ssovf_log_dbg(fmt, ...) SSOVF_LOG(DEBUG, fmt, ##__VA_ARGS__) +#define ssovf_log_err(fmt, ...) SSOVF_LOG(ERR, fmt, ##__VA_ARGS__) #define ssovf_func_trace ssovf_log_dbg -#define ssovf_log_err(fmt, args...) \ - RTE_LOG(ERR, EVENTDEV, "[%s] %s() " fmt "\n", \ - RTE_STR(EVENTDEV_NAME_OCTEONTX_PMD), __func__, ## args) - -#define PCI_VENDOR_ID_CAVIUM 0x177D -#define PCI_DEVICE_ID_OCTEONTX_SSOGRP_VF 0xA04B -#define PCI_DEVICE_ID_OCTEONTX_SSOWS_VF 0xA04D +#define ssovf_log_selftest ssovf_log_info #define SSO_MAX_VHGRP (64) #define SSO_MAX_VHWS (32) @@ -76,7 +39,6 @@ #define SSO_VHGRP_XAQ_CNT (0x1B0ULL) #define SSO_VHGRP_AQ_CNT (0x1C0ULL) #define SSO_VHGRP_AQ_THR (0x1E0ULL) -#define SSO_VHGRP_PF_MBOX(x) (0x200ULL | ((x) << 3)) /* BAR2 */ #define SSO_VHGRP_OP_ADD_WORK0 (0x00ULL) @@ -107,8 +69,6 @@ #define SSOW_VHWS_OP_GET_WORK0 (0x80000ULL) #define SSOW_VHWS_OP_GET_WORK1 (0x80008ULL) -#define SSOW_BAR4_LEN (64 * 1024) - /* Mailbox message constants */ #define SSO_COPROC 0x2 @@ -117,9 +77,12 @@ #define SSO_GET_DEV_INFO 0x3 #define SSO_GET_GETWORK_WAIT 0x4 #define SSO_SET_GETWORK_WAIT 0x5 +#define SSO_CONVERT_NS_GETWORK_ITER 0x6 #define SSO_GRP_GET_PRIORITY 0x7 #define SSO_GRP_SET_PRIORITY 0x8 +#define SSOVF_SELFTEST_ARG ("selftest") + /* * In Cavium OcteonTX SoC, all accesses to the device registers are * implictly strongly ordered. So, The relaxed version of IO operation is @@ -128,6 +91,46 @@ #define ssovf_read64 rte_read64_relaxed #define ssovf_write64 rte_write64_relaxed +/* ARM64 specific functions */ +#if defined(RTE_ARCH_ARM64) +#define ssovf_load_pair(val0, val1, addr) ({ \ + asm volatile( \ + "ldp %x[x0], %x[x1], [%x[p1]]" \ + :[x0]"=r"(val0), [x1]"=r"(val1) \ + :[p1]"r"(addr) \ + ); }) + +#define ssovf_store_pair(val0, val1, addr) ({ \ + asm volatile( \ + "stp %x[x0], %x[x1], [%x[p1]]" \ + ::[x0]"r"(val0), [x1]"r"(val1), [p1]"r"(addr) \ + ); }) +#else /* Un optimized functions for building on non arm64 arch */ + +#define ssovf_load_pair(val0, val1, addr) \ +do { \ + val0 = rte_read64(addr); \ + val1 = rte_read64(((uint8_t *)addr) + 8); \ +} while (0) + +#define ssovf_store_pair(val0, val1, addr) \ +do { \ + rte_write64(val0, addr); \ + rte_write64(val1, (((uint8_t *)addr) + 8)); \ +} while (0) +#endif + +struct ssovf_info { + uint16_t domain; /* Domain id */ + uint8_t total_ssovfs; /* Total sso groups available in domain */ + uint8_t total_ssowvfs;/* Total sso hws available in domain */ +}; + +enum ssovf_type { + OCTEONTX_SSO_GROUP, /* SSO group vf */ + OCTEONTX_SSO_HWS, /* SSO hardware workslot vf */ +}; + struct ssovf_evdev { uint8_t max_event_queues; uint8_t max_event_ports; @@ -156,4 +159,31 @@ ssovf_pmd_priv(const struct rte_eventdev *eventdev) return eventdev->data->dev_private; } +extern int otx_logtype_ssovf; + +uint16_t ssows_enq(void *port, const struct rte_event *ev); +uint16_t ssows_enq_burst(void *port, + const struct rte_event ev[], uint16_t nb_events); +uint16_t ssows_enq_new_burst(void *port, + const struct rte_event ev[], uint16_t nb_events); +uint16_t ssows_enq_fwd_burst(void *port, + const struct rte_event ev[], uint16_t nb_events); +uint16_t ssows_deq(void *port, struct rte_event *ev, uint64_t timeout_ticks); +uint16_t ssows_deq_burst(void *port, struct rte_event ev[], + uint16_t nb_events, uint64_t timeout_ticks); +uint16_t ssows_deq_timeout(void *port, struct rte_event *ev, + uint64_t timeout_ticks); +uint16_t ssows_deq_timeout_burst(void *port, struct rte_event ev[], + uint16_t nb_events, uint64_t timeout_ticks); + +typedef void (*ssows_handle_event_t)(void *arg, struct rte_event ev); +void ssows_flush_events(struct ssows *ws, uint8_t queue_id, + ssows_handle_event_t fn, void *arg); +void ssows_reset(struct ssows *ws); +uint16_t sso_event_tx_adapter_enqueue(void *port, + struct rte_event ev[], uint16_t nb_events); +int ssovf_info(struct ssovf_info *info); +void *ssovf_bar(enum ssovf_type, uint8_t id, uint8_t bar); +int test_eventdev_octeontx(void); + #endif /* __SSOVF_EVDEV_H__ */