X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fevent%2Focteontx2%2Fotx2_evdev.h;h=96e5799be12f766b36cce75bc67f34873fd5d3e7;hb=bbf19e89b87cab524a91f76a89347538a038ceae;hp=d0f5b3fcf0950d5b839a5a035f1f6bb496c4cdbc;hpb=52f2fcb3e29adbe7f9deb3090df7436b1652c20d;p=dpdk.git diff --git a/drivers/event/octeontx2/otx2_evdev.h b/drivers/event/octeontx2/otx2_evdev.h index d0f5b3fcf0..96e5799be1 100644 --- a/drivers/event/octeontx2/otx2_evdev.h +++ b/drivers/event/octeontx2/otx2_evdev.h @@ -6,7 +6,7 @@ #define __OTX2_EVDEV_H__ #include -#include +#include #include #include @@ -80,6 +80,7 @@ #define OTX2_SSOW_GET_BASE_ADDR(_GW) ((_GW) - SSOW_LF_GWS_OP_GET_WORK) #define OTX2_SSOW_TT_FROM_TAG(x) (((x) >> 32) & SSO_TT_EMPTY) +#define OTX2_SSOW_GRP_FROM_TAG(x) (((x) >> 36) & 0x3ff) #define NSEC2USEC(__ns) ((__ns) / 1E3) #define USEC2NSEC(__us) ((__us) * 1E3) @@ -169,25 +170,24 @@ struct otx2_sso_evdev { uintptr_t wqp_op; \ uintptr_t swtag_flush_op; \ uintptr_t swtag_norm_op; \ - uintptr_t swtag_desched_op; \ - uint8_t cur_tt; \ - uint8_t cur_grp + uintptr_t swtag_desched_op; /* Event port aka GWS */ struct otx2_ssogws { /* Get Work Fastpath data */ OTX2_SSOGWS_OPS; - uint8_t swtag_req; + /* PTP timestamp */ + struct otx2_timesync_info *tstamp; void *lookup_mem; + uint8_t swtag_req; uint8_t port; /* Add Work Fastpath data */ uint64_t xaq_lmt __rte_cache_aligned; uint64_t *fc_mem; uintptr_t grps_base[OTX2_SSO_MAX_VHGRP]; - /* PTP timestamp */ - struct otx2_timesync_info *tstamp; /* Tx Fastpath data */ - uint8_t tx_adptr_data[] __rte_cache_aligned; + uint64_t base __rte_cache_aligned; + uint8_t tx_adptr_data[]; } __rte_cache_aligned; struct otx2_ssogws_state { @@ -197,18 +197,19 @@ struct otx2_ssogws_state { struct otx2_ssogws_dual { /* Get Work Fastpath data */ struct otx2_ssogws_state ws_state[2]; /* Ping and Pong */ + /* PTP timestamp */ + struct otx2_timesync_info *tstamp; + void *lookup_mem; uint8_t swtag_req; uint8_t vws; /* Ping pong bit */ - void *lookup_mem; uint8_t port; /* Add Work Fastpath data */ uint64_t xaq_lmt __rte_cache_aligned; uint64_t *fc_mem; uintptr_t grps_base[OTX2_SSO_MAX_VHGRP]; - /* PTP timestamp */ - struct otx2_timesync_info *tstamp; /* Tx Fastpath data */ - uint8_t tx_adptr_data[] __rte_cache_aligned; + uint64_t base[2] __rte_cache_aligned; + uint8_t tx_adptr_data[]; } __rte_cache_aligned; static inline struct otx2_sso_evdev * @@ -217,6 +218,18 @@ sso_pmd_priv(const struct rte_eventdev *event_dev) return event_dev->data->dev_private; } +struct otx2_ssogws_cookie { + const struct rte_eventdev *event_dev; + bool configured; +}; + +static inline struct otx2_ssogws_cookie * +ssogws_get_cookie(void *ws) +{ + return (struct otx2_ssogws_cookie *) + ((uint8_t *)ws - RTE_CACHE_LINE_SIZE); +} + static const union mbuf_initializer mbuf_init = { .fields = { .data_off = RTE_PKTMBUF_HEADROOM,