X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fevent%2Focteontx2%2Fotx2_tim_worker.c;h=4b5cfdc7258f78433071d3feef60202d8eb6b31d;hb=8716f9942a408a79a114ac0496e4e7d55bc9944c;hp=409575ec42ad7b91864918dc4b5276536222561f;hpb=80999bac03474f9b27f626a9d3e581f85736c491;p=dpdk.git

diff --git a/drivers/event/octeontx2/otx2_tim_worker.c b/drivers/event/octeontx2/otx2_tim_worker.c
index 409575ec42..4b5cfdc725 100644
--- a/drivers/event/octeontx2/otx2_tim_worker.c
+++ b/drivers/event/octeontx2/otx2_tim_worker.c
@@ -38,6 +38,23 @@ tim_format_event(const struct rte_event_timer * const tim,
 	entry->wqe = tim->ev.u64;
 }
 
+static inline void
+tim_sync_start_cyc(struct otx2_tim_ring *tim_ring)
+{
+	uint64_t cur_cyc = rte_rdtsc();
+	uint32_t real_bkt;
+
+	if (cur_cyc - tim_ring->last_updt_cyc > tim_ring->tot_int) {
+		real_bkt = otx2_read64(tim_ring->base + TIM_LF_RING_REL) >> 44;
+		cur_cyc = rte_rdtsc();
+
+		tim_ring->ring_start_cyc = cur_cyc -
+						(real_bkt * tim_ring->tck_int);
+		tim_ring->last_updt_cyc = cur_cyc;
+	}
+
+}
+
 static __rte_always_inline uint16_t
 tim_timer_arm_burst(const struct rte_event_timer_adapter *adptr,
 		    struct rte_event_timer **tim,
@@ -49,6 +66,7 @@ tim_timer_arm_burst(const struct rte_event_timer_adapter *adptr,
 	uint16_t index;
 	int ret;
 
+	tim_sync_start_cyc(tim_ring);
 	for (index = 0; index < nb_timers; index++) {
 		if (tim_arm_checks(tim_ring, tim[index]))
 			break;
@@ -69,10 +87,56 @@ tim_timer_arm_burst(const struct rte_event_timer_adapter *adptr,
 		}
 	}
 
+	if (flags & OTX2_TIM_ENA_STATS)
+		__atomic_fetch_add(&tim_ring->arm_cnt, index, __ATOMIC_RELAXED);
+
 	return index;
 }
 
-#define FP(_name, _f3, _f2, _f1, _flags)				  \
+static __rte_always_inline uint16_t
+tim_timer_arm_tmo_brst(const struct rte_event_timer_adapter *adptr,
+		       struct rte_event_timer **tim,
+		       const uint64_t timeout_tick,
+		       const uint16_t nb_timers, const uint8_t flags)
+{
+	struct otx2_tim_ent entry[OTX2_TIM_MAX_BURST] __rte_cache_aligned;
+	struct otx2_tim_ring *tim_ring = adptr->data->adapter_priv;
+	uint16_t set_timers = 0;
+	uint16_t arr_idx = 0;
+	uint16_t idx;
+	int ret;
+
+	if (unlikely(!timeout_tick || timeout_tick >= tim_ring->nb_bkts)) {
+		const enum rte_event_timer_state state = timeout_tick ?
+			RTE_EVENT_TIMER_ERROR_TOOLATE :
+			RTE_EVENT_TIMER_ERROR_TOOEARLY;
+		for (idx = 0; idx < nb_timers; idx++)
+			tim[idx]->state = state;
+
+		rte_errno = EINVAL;
+		return 0;
+	}
+
+	tim_sync_start_cyc(tim_ring);
+	while (arr_idx < nb_timers) {
+		for (idx = 0; idx < OTX2_TIM_MAX_BURST && (arr_idx < nb_timers);
+		     idx++, arr_idx++) {
+			tim_format_event(tim[arr_idx], &entry[idx]);
+		}
+		ret = tim_add_entry_brst(tim_ring, timeout_tick,
+					 &tim[set_timers], entry, idx, flags);
+		set_timers += ret;
+		if (ret != idx)
+			break;
+	}
+	if (flags & OTX2_TIM_ENA_STATS)
+		__atomic_fetch_add(&tim_ring->arm_cnt, set_timers,
+				   __ATOMIC_RELAXED);
+
+	return set_timers;
+}
+
+#define FP(_name, _f4, _f3, _f2, _f1, _flags)				\
 uint16_t __rte_noinline							  \
 otx2_tim_arm_burst_ ## _name(const struct rte_event_timer_adapter *adptr, \
 			     struct rte_event_timer **tim,		  \
@@ -82,3 +146,46 @@ otx2_tim_arm_burst_ ## _name(const struct rte_event_timer_adapter *adptr, \
 }
 TIM_ARM_FASTPATH_MODES
 #undef FP
+
+#define FP(_name, _f3, _f2, _f1, _flags)				\
+uint16_t __rte_noinline							\
+otx2_tim_arm_tmo_tick_burst_ ## _name(					\
+			const struct rte_event_timer_adapter *adptr,	\
+				      struct rte_event_timer **tim,	\
+				      const uint64_t timeout_tick,	\
+				      const uint16_t nb_timers)		\
+{									\
+	return tim_timer_arm_tmo_brst(adptr, tim, timeout_tick,		\
+			nb_timers, _flags);				\
+}
+TIM_ARM_TMO_FASTPATH_MODES
+#undef FP
+
+uint16_t
+otx2_tim_timer_cancel_burst(const struct rte_event_timer_adapter *adptr,
+			    struct rte_event_timer **tim,
+			    const uint16_t nb_timers)
+{
+	uint16_t index;
+	int ret;
+
+	RTE_SET_USED(adptr);
+	for (index = 0; index < nb_timers; index++) {
+		if (tim[index]->state == RTE_EVENT_TIMER_CANCELED) {
+			rte_errno = EALREADY;
+			break;
+		}
+
+		if (tim[index]->state != RTE_EVENT_TIMER_ARMED) {
+			rte_errno = EINVAL;
+			break;
+		}
+		ret = tim_rm_entry(tim[index]);
+		if (ret) {
+			rte_errno = -ret;
+			break;
+		}
+	}
+
+	return index;
+}