X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fmempool%2Focteontx%2Focteontx_fpavf.h;h=e27c4377e2694739aad8178d719bc7111050b8a3;hb=b8b4c54ef9b03a4774fa82b4ec7a811d0900c0ab;hp=c4b3adcbbcea9040697e978ee7d28b52e6120d99;hpb=aaf4363e1e9e518c034c7ff9938a2faefde9854d;p=dpdk.git diff --git a/drivers/mempool/octeontx/octeontx_fpavf.h b/drivers/mempool/octeontx/octeontx_fpavf.h index c4b3adcbbc..e27c4377e2 100644 --- a/drivers/mempool/octeontx/octeontx_fpavf.h +++ b/drivers/mempool/octeontx/octeontx_fpavf.h @@ -14,6 +14,7 @@ #define FPA_VF_MAX 32 #define FPA_GPOOL_MASK (FPA_VF_MAX-1) +#define FPA_GAURA_SHIFT 4 /* FPA VF register offsets */ #define FPA_VF_INT(x) (0x200ULL | ((x) << 22)) @@ -36,6 +37,7 @@ #define FPA_VF_FREE_ADDRS_S(x, y, z) \ ((x) | (((y) & 0x1ff) << 3) | ((((z) & 1)) << 14)) +#define FPA_AURA_IDX(gpool) (gpool << FPA_GAURA_SHIFT) /* FPA VF register offsets from VF_BAR4, size 2 MByte */ #define FPA_VF_MSIX_VEC_ADDR 0x00000 #define FPA_VF_MSIX_VEC_CTL 0x00008 @@ -48,7 +50,7 @@ #define OCTEONTX_FPAVF_BUF_OFFSET 128 /* - * In Cavium OcteonTX SoC, all accesses to the device registers are + * In Cavium OCTEON TX SoC, all accesses to the device registers are * implicitly strongly ordered. So, the relaxed version of IO operation is * safe to use with out any IO memory barriers. */ @@ -86,8 +88,10 @@ do { \ uintptr_t octeontx_fpa_bufpool_create(unsigned int object_size, unsigned int object_count, - unsigned int buf_offset, char **va_start, - int node); + unsigned int buf_offset, int node); +int +octeontx_fpavf_pool_set_range(uintptr_t handle, unsigned long memsz, + void *memva, uint16_t gpool); int octeontx_fpa_bufpool_destroy(uintptr_t handle, int node); int @@ -100,4 +104,11 @@ octeontx_fpa_bufpool_gpool(uintptr_t handle) { return (uint8_t)handle & FPA_GPOOL_MASK; } + +static __rte_always_inline uint16_t +octeontx_fpa_bufpool_gaura(uintptr_t handle) +{ + return octeontx_fpa_bufpool_gpool(handle) << FPA_GAURA_SHIFT; +} + #endif /* __OCTEONTX_FPAVF_H__ */