X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fmempool%2Focteontx2%2Fotx2_mempool.c;h=fb630fecf86d43f0447c41a40ee87080277c9694;hb=392bf9084dd02219738f34f6930851032e1ce32f;hp=1bcb86cf47dc1a84891a4e6cea33eba5968ee402;hpb=50b95c3ea7af13243a10a48189fe7e0bb0183398;p=dpdk.git

diff --git a/drivers/mempool/octeontx2/otx2_mempool.c b/drivers/mempool/octeontx2/otx2_mempool.c
index 1bcb86cf47..fb630fecf8 100644
--- a/drivers/mempool/octeontx2/otx2_mempool.c
+++ b/drivers/mempool/octeontx2/otx2_mempool.c
@@ -7,6 +7,7 @@
 #include <rte_common.h>
 #include <rte_eal.h>
 #include <rte_io.h>
+#include <rte_kvargs.h>
 #include <rte_malloc.h>
 #include <rte_mbuf_pool_ops.h>
 #include <rte_pci.h>
@@ -105,8 +106,24 @@ npa_lf_init(struct otx2_npa_lf *lf, uintptr_t base, uint8_t aura_sz,
 		goto bmap_free;
 	}
 
+	/* Allocate memory for nap_aura_lim memory */
+	lf->aura_lim = rte_zmalloc("npa_aura_lim_mem",
+			sizeof(struct npa_aura_lim) * nr_pools, 0);
+	if (lf->aura_lim == NULL) {
+		rc = -ENOMEM;
+		goto qint_free;
+	}
+
+	/* Init aura start & end limits */
+	for (i = 0; i < nr_pools; i++) {
+		lf->aura_lim[i].ptr_start = UINT64_MAX;
+		lf->aura_lim[i].ptr_end = 0x0ull;
+	}
+
 	return 0;
 
+qint_free:
+	rte_free(lf->npa_qint_mem);
 bmap_free:
 	rte_bitmap_free(lf->npa_bmp);
 bmap_mem_free:
@@ -123,6 +140,7 @@ npa_lf_fini(struct otx2_npa_lf *lf)
 	if (!lf)
 		return NPA_LF_ERR_PARAM;
 
+	rte_free(lf->aura_lim);
 	rte_free(lf->npa_qint_mem);
 	rte_bitmap_free(lf->npa_bmp);
 	rte_free(lf->npa_bmp_mem);
@@ -142,6 +160,43 @@ otx2_aura_size_to_u32(uint8_t val)
 	return 1 << (val + 6);
 }
 
+static int
+parse_max_pools(const char *key, const char *value, void *extra_args)
+{
+	RTE_SET_USED(key);
+	uint32_t val;
+
+	val = atoi(value);
+	if (val < otx2_aura_size_to_u32(NPA_AURA_SZ_128))
+		val = 128;
+	if (val > otx2_aura_size_to_u32(NPA_AURA_SZ_1M))
+		val = BIT_ULL(20);
+
+	*(uint8_t *)extra_args = rte_log2_u32(val) - 6;
+	return 0;
+}
+
+#define OTX2_MAX_POOLS "max_pools"
+
+static uint8_t
+otx2_parse_aura_size(struct rte_devargs *devargs)
+{
+	uint8_t aura_sz = NPA_AURA_SZ_128;
+	struct rte_kvargs *kvlist;
+
+	if (devargs == NULL)
+		goto exit;
+	kvlist = rte_kvargs_parse(devargs->args, NULL);
+	if (kvlist == NULL)
+		goto exit;
+
+	rte_kvargs_process(kvlist, OTX2_MAX_POOLS, &parse_max_pools, &aura_sz);
+	otx2_parse_common_devargs(kvlist);
+	rte_kvargs_free(kvlist);
+exit:
+	return aura_sz;
+}
+
 static inline int
 npa_lf_attach(struct otx2_mbox *mbox)
 {
@@ -234,7 +289,7 @@ otx2_npa_lf_init(struct rte_pci_device *pci_dev, void *otx2_dev)
 		if (rc)
 			goto npa_detach;
 
-		aura_sz = NPA_AURA_SZ_128;
+		aura_sz = otx2_parse_aura_size(pci_dev->device.devargs);
 		nr_pools = otx2_aura_size_to_u32(aura_sz);
 
 		lf = &dev->npalf;
@@ -389,7 +444,7 @@ static const struct rte_pci_id pci_npa_map[] = {
 
 static struct rte_pci_driver pci_npa = {
 	.id_table = pci_npa_map,
-	.drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_IOVA_AS_VA,
+	.drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_NEED_IOVA_AS_VA,
 	.probe = npa_probe,
 	.remove = npa_remove,
 };
@@ -397,3 +452,6 @@ static struct rte_pci_driver pci_npa = {
 RTE_PMD_REGISTER_PCI(mempool_octeontx2, pci_npa);
 RTE_PMD_REGISTER_PCI_TABLE(mempool_octeontx2, pci_npa_map);
 RTE_PMD_REGISTER_KMOD_DEP(mempool_octeontx2, "vfio-pci");
+RTE_PMD_REGISTER_PARAM_STRING(mempool_octeontx2,
+			      OTX2_MAX_POOLS "=<128-1048576>"
+			      OTX2_NPA_LOCK_MASK "=<1-65535>");