X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fatlantic%2Fatl_types.h;h=c200a1fadb7951442667e392caaf05792470cc36;hb=ce07a121c7975e9a984365dc5f2a3fa2867696cc;hp=af24da3a5a548ca45ce32ec8450d6538549c9521;hpb=86d36773bd42bda39e7cadaa7dc067d67b833230;p=dpdk.git

diff --git a/drivers/net/atlantic/atl_types.h b/drivers/net/atlantic/atl_types.h
index af24da3a5a..c200a1fadb 100644
--- a/drivers/net/atlantic/atl_types.h
+++ b/drivers/net/atlantic/atl_types.h
@@ -9,7 +9,8 @@
 #include <inttypes.h>
 #include <string.h>
 #include <stdbool.h>
-
+#include <netinet/in.h>
+#include <pthread.h>
 
 typedef uint8_t		u8;
 typedef int8_t		s8;
@@ -22,6 +23,7 @@ typedef uint64_t	u64;
 #define min(a, b)	RTE_MIN(a, b)
 #define max(a, b)	RTE_MAX(a, b)
 
+#include "hw_atl/hw_atl_b0_internal.h"
 #include "hw_atl/hw_atl_utils.h"
 
 struct aq_hw_link_status_s {
@@ -50,8 +52,51 @@ struct aq_stats_s {
 	u64 dma_oct_tc;
 };
 
+struct aq_rss_parameters {
+	u16 base_cpu_number;
+	u16 indirection_table_size;
+	u16 hash_secret_key_size;
+	u32 hash_secret_key[HW_ATL_B0_RSS_HASHKEY_BITS / 8];
+	u8 indirection_table[HW_ATL_B0_RSS_REDIRECTION_MAX];
+};
+
+/* Macsec stuff */
+struct aq_macsec_config {
+	struct {
+		u32 macsec_enabled;
+		u32 encryption_enabled;
+		u32 replay_protection_enabled;
+	} common;
+
+	struct {
+		u32 idx;
+		u32 mac[2]; /* 6 bytes */
+	} txsc;
+
+	struct {
+		u32 idx;
+		u32 an; /* association number on the local side */
+		u32 pn; /* packet number on the local side */
+		u32 key[4]; /* 128 bit key */
+	} txsa;
+
+	struct {
+		u32 mac[2]; /* 6 bytes */
+		u32 pi;
+	} rxsc;
+
+	struct {
+		u32 idx;
+		u32 an; /* association number on the remote side */
+		u32 pn; /* packet number on the remote side */
+		u32 key[4]; /* 128 bit key */
+	} rxsa;
+};
+
 struct aq_hw_cfg_s {
 	bool is_lro;
+	bool is_rss;
+	unsigned int num_rss_queues;
 	int wol;
 
 	int link_speed_msk;
@@ -59,27 +104,42 @@ struct aq_hw_cfg_s {
 	int irq_mask;
 	unsigned int vecs;
 
+	bool vlan_strip;
+	uint32_t vlan_filter[HW_ATL_B0_MAX_VLAN_IDS];
 	uint32_t flow_control;
+
+	struct aq_rss_parameters aq_rss;
+	struct aq_macsec_config aq_macsec;
 };
 
 struct aq_hw_s {
+	u16 device_id;
+	u16 vendor_id;
+	bool adapter_stopped;
+
 	u8 rbl_enabled:1;
 	struct aq_hw_cfg_s *aq_nic_cfg;
 	const struct aq_fw_ops *aq_fw_ops;
 	void *mmio;
 
 	struct aq_hw_link_status_s aq_link_status;
+	bool is_autoneg;
 
 	struct hw_aq_atl_utils_mbox mbox;
 	struct hw_atl_stats_s last_stats;
 	struct aq_stats_s curr_stats;
 
+	u32 caps_lo;
+
+	u64 speed;
 	unsigned int chip_features;
 	u32 fw_ver_actual;
 	u32 mbox_addr;
 	u32 rpc_addr;
 	u32 rpc_tid;
 	struct hw_aq_atl_utils_fw_rpc rpc;
+
+	pthread_mutex_t mbox_mutex;
 };
 
 struct aq_fw_ops {
@@ -112,13 +172,61 @@ struct aq_fw_ops {
 	int (*get_eee_rate)(struct aq_hw_s *self, u32 *rate,
 			u32 *supported_rates);
 
+	int (*get_flow_control)(struct aq_hw_s *self, u32 *fc);
 	int (*set_flow_control)(struct aq_hw_s *self);
 
 	int (*led_control)(struct aq_hw_s *self, u32 mode);
 
-	int (*get_eeprom)(struct aq_hw_s *self, u32 *data, u32 len);
+	int (*get_eeprom)(struct aq_hw_s *self, int dev_addr,
+			  u32 *data, u32 len, u32 offset);
+
+	int (*set_eeprom)(struct aq_hw_s *self, int dev_addr,
+			  u32 *data, u32 len, u32 offset);
+
+	int (*send_macsec_req)(struct aq_hw_s *self,
+			       struct macsec_msg_fw_request *req,
+			       struct macsec_msg_fw_response *response);
+};
 
-	int (*set_eeprom)(struct aq_hw_s *self, u32 *data, u32 len);
+struct atl_sw_stats {
+	u64 crcerrs;
+	u64 errbc;
+	u64 mspdc;
+	u64 mpctotal;
+	u64 mpc[8];
+	u64 mlfc;
+	u64 mrfc;
+	u64 rlec;
+	u64 lxontxc;
+	u64 lxonrxc;
+	u64 lxofftxc;
+	u64 lxoffrxc;
+	u64 pxontxc[8];
+	u64 pxonrxc[8];
+	u64 pxofftxc[8];
+	u64 pxoffrxc[8];
+	u64 gprc;
+	u64 bprc;
+	u64 mprc;
+	u64 gptc;
+	u64 gorc;
+	u64 gotc;
+	u64 tor;
+	u64 tpr;
+	u64 tpt;
+	u64 mptc;
+	u64 bptc;
+	u64 xec;
+	u64 fccrc;
+	u64 ldpcec;
+	u64 pcrc8ec;
+
+	u64 rx_nombuf;
+	u64 q_ipackets[RTE_ETHDEV_QUEUE_STAT_CNTRS];
+	u64 q_opackets[RTE_ETHDEV_QUEUE_STAT_CNTRS];
+	u64 q_ibytes[RTE_ETHDEV_QUEUE_STAT_CNTRS];
+	u64 q_obytes[RTE_ETHDEV_QUEUE_STAT_CNTRS];
+	u64 q_errors[RTE_ETHDEV_QUEUE_STAT_CNTRS];
 };
 
 #endif