X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fatlantic%2Fhw_atl%2Fhw_atl_utils_fw2x.c;h=55dc728d321e015fe95efcc30081d5aeff26f227;hb=4b701523742e3753d58949846ac4eeebc6d5a78f;hp=e07ed5e3a8c9abf8f9040b77379549003be557b3;hpb=921eb6b8ce31f2f3fde943f1547856fe0aaee538;p=dpdk.git diff --git a/drivers/net/atlantic/hw_atl/hw_atl_utils_fw2x.c b/drivers/net/atlantic/hw_atl/hw_atl_utils_fw2x.c index e07ed5e3a8..55dc728d32 100644 --- a/drivers/net/atlantic/hw_atl/hw_atl_utils_fw2x.c +++ b/drivers/net/atlantic/hw_atl/hw_atl_utils_fw2x.c @@ -6,6 +6,7 @@ */ #include +#include #include "../atl_hw_regs.h" #include "../atl_types.h" @@ -34,7 +35,6 @@ #define HAL_ATLANTIC_WOL_FILTERS_COUNT 8 #define HAL_ATLANTIC_UTILS_FW2X_MSG_WOL 0x0E -#define HW_ATL_FW_FEATURE_EEPROM 0x03010025 #define HW_ATL_FW_FEATURE_LED 0x03010026 struct fw2x_msg_wol_pattern { @@ -218,19 +218,21 @@ int aq_fw2x_get_mac_permanent(struct aq_hw_s *self, u8 *mac) u32 mac_addr[2] = { 0 }; u32 efuse_addr = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_EFUSE_ADDR); + pthread_mutex_lock(&self->mbox_mutex); + if (efuse_addr != 0) { err = hw_atl_utils_fw_downld_dwords(self, efuse_addr + (40U * 4U), mac_addr, ARRAY_SIZE(mac_addr)); if (err) - return err; + goto exit; mac_addr[0] = rte_constant_bswap32(mac_addr[0]); mac_addr[1] = rte_constant_bswap32(mac_addr[1]); } - ether_addr_copy((struct ether_addr *)mac_addr, - (struct ether_addr *)mac); + rte_ether_addr_copy((struct rte_ether_addr *)mac_addr, + (struct rte_ether_addr *)mac); if ((mac[0] & 0x01U) || ((mac[0] | mac[1] | mac[2]) == 0x00U)) { unsigned int rnd = (uint32_t)rte_rand(); @@ -253,6 +255,10 @@ int aq_fw2x_get_mac_permanent(struct aq_hw_s *self, u8 *mac) h >>= 8; mac[0] = (u8)(0xFFU & h); } + +exit: + pthread_mutex_unlock(&self->mbox_mutex); + return err; } @@ -262,6 +268,9 @@ static int aq_fw2x_update_stats(struct aq_hw_s *self) u32 mpi_opts = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR); u32 orig_stats_val = mpi_opts & BIT(CAPS_HI_STATISTICS); + + pthread_mutex_lock(&self->mbox_mutex); + /* Toggle statistics bit for FW to update */ mpi_opts = mpi_opts ^ BIT(CAPS_HI_STATISTICS); aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR, mpi_opts); @@ -272,9 +281,15 @@ static int aq_fw2x_update_stats(struct aq_hw_s *self) BIT(CAPS_HI_STATISTICS)), 1U, 10000U); if (err) - return err; + goto exit; + + err = hw_atl_utils_update_stats(self); + +exit: + pthread_mutex_unlock(&self->mbox_mutex); + + return err; - return hw_atl_utils_update_stats(self); } static int aq_fw2x_get_temp(struct aq_hw_s *self, int *temp) @@ -284,6 +299,8 @@ static int aq_fw2x_get_temp(struct aq_hw_s *self, int *temp) u32 temp_val = mpi_opts & BIT(CAPS_HI_TEMPERATURE); u32 temp_res; + pthread_mutex_lock(&self->mbox_mutex); + /* Toggle statistics bit for FW to 0x36C.18 (CAPS_HI_TEMPERATURE) */ mpi_opts = mpi_opts ^ BIT(CAPS_HI_TEMPERATURE); aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR, mpi_opts); @@ -299,6 +316,9 @@ static int aq_fw2x_get_temp(struct aq_hw_s *self, int *temp) &temp_res, sizeof(temp_res) / sizeof(u32)); + + pthread_mutex_unlock(&self->mbox_mutex); + if (err) return err; @@ -513,9 +533,11 @@ static int aq_fw2x_get_eeprom(struct aq_hw_s *self, int dev_addr, u32 mpi_opts; int err = 0; - if (self->fw_ver_actual < HW_ATL_FW_FEATURE_EEPROM) + if ((self->caps_lo & BIT(CAPS_LO_SMBUS_READ)) == 0) return -EOPNOTSUPP; + pthread_mutex_lock(&self->mbox_mutex); + request.msg_id = 0; request.device_id = dev_addr; request.address = offset; @@ -527,7 +549,7 @@ static int aq_fw2x_get_eeprom(struct aq_hw_s *self, int dev_addr, sizeof(request) / sizeof(u32)); if (err < 0) - return err; + goto exit; /* Toggle 0x368.CAPS_LO_SMBUS_READ bit */ mpi_opts = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL_ADDR); @@ -542,17 +564,19 @@ static int aq_fw2x_get_eeprom(struct aq_hw_s *self, int dev_addr, 10U, 10000U); if (err < 0) - return err; + goto exit; err = hw_atl_utils_fw_downld_dwords(self, self->rpc_addr + sizeof(u32), &result, sizeof(result) / sizeof(u32)); if (err < 0) - return err; + goto exit; - if (result) - return -EIO; + if (result) { + err = -EIO; + goto exit; + } if (num_dwords) { err = hw_atl_utils_fw_downld_dwords(self, @@ -561,7 +585,7 @@ static int aq_fw2x_get_eeprom(struct aq_hw_s *self, int dev_addr, num_dwords); if (err < 0) - return err; + goto exit; } if (bytes_remains) { @@ -574,13 +598,16 @@ static int aq_fw2x_get_eeprom(struct aq_hw_s *self, int dev_addr, 1); if (err < 0) - return err; + goto exit; rte_memcpy((u8 *)data + len - bytes_remains, &val, bytes_remains); } - return 0; +exit: + pthread_mutex_unlock(&self->mbox_mutex); + + return err; } @@ -591,7 +618,7 @@ static int aq_fw2x_set_eeprom(struct aq_hw_s *self, int dev_addr, u32 mpi_opts, result = 0; int err = 0; - if (self->fw_ver_actual < HW_ATL_FW_FEATURE_EEPROM) + if ((self->caps_lo & BIT(CAPS_LO_SMBUS_WRITE)) == 0) return -EOPNOTSUPP; request.msg_id = 0; @@ -599,13 +626,15 @@ static int aq_fw2x_set_eeprom(struct aq_hw_s *self, int dev_addr, request.address = offset; request.length = len; + pthread_mutex_lock(&self->mbox_mutex); + /* Write SMBUS request to cfg memory */ err = hw_atl_utils_fw_upload_dwords(self, self->rpc_addr, (u32 *)(void *)&request, sizeof(request) / sizeof(u32)); if (err < 0) - return err; + goto exit; /* Write SMBUS data to cfg memory */ u32 num_dwords = len / sizeof(u32); @@ -618,7 +647,7 @@ static int aq_fw2x_set_eeprom(struct aq_hw_s *self, int dev_addr, num_dwords); if (err < 0) - return err; + goto exit; } if (bytes_remains) { @@ -634,7 +663,7 @@ static int aq_fw2x_set_eeprom(struct aq_hw_s *self, int dev_addr, 1); if (err < 0) - return err; + goto exit; } /* Toggle 0x368.CAPS_LO_SMBUS_WRITE bit */ @@ -649,7 +678,7 @@ static int aq_fw2x_set_eeprom(struct aq_hw_s *self, int dev_addr, 10U, 10000U); if (err < 0) - return err; + goto exit; /* Read status of write operation */ err = hw_atl_utils_fw_downld_dwords(self, self->rpc_addr + sizeof(u32), @@ -657,12 +686,17 @@ static int aq_fw2x_set_eeprom(struct aq_hw_s *self, int dev_addr, sizeof(result) / sizeof(u32)); if (err < 0) - return err; + goto exit; - if (result) - return -EIO; + if (result) { + err = -EIO; + goto exit; + } - return 0; +exit: + pthread_mutex_unlock(&self->mbox_mutex); + + return err; } static int aq_fw2x_send_macsec_request(struct aq_hw_s *self, @@ -672,19 +706,21 @@ static int aq_fw2x_send_macsec_request(struct aq_hw_s *self, int err = 0; u32 mpi_opts = 0; - if (!response || !response) + if (!req || !response) return 0; if ((self->caps_lo & BIT(CAPS_LO_MACSEC)) == 0) return -EOPNOTSUPP; + pthread_mutex_lock(&self->mbox_mutex); + /* Write macsec request to cfg memory */ err = hw_atl_utils_fw_upload_dwords(self, self->rpc_addr, (u32 *)(void *)req, RTE_ALIGN(sizeof(*req) / sizeof(u32), sizeof(u32))); if (err < 0) - return err; + goto exit; /* Toggle 0x368.CAPS_LO_MACSEC bit */ mpi_opts = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL_ADDR); @@ -698,13 +734,16 @@ static int aq_fw2x_send_macsec_request(struct aq_hw_s *self, 1000U, 10000U); if (err < 0) - return err; + goto exit; /* Read status of write operation */ err = hw_atl_utils_fw_downld_dwords(self, self->rpc_addr + sizeof(u32), (u32 *)(void *)response, RTE_ALIGN(sizeof(*response) / sizeof(u32), sizeof(u32))); +exit: + pthread_mutex_unlock(&self->mbox_mutex); + return err; }