X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Faxgbe%2Faxgbe_common.h;h=34f60f1568b36cf221bc15821f8b76c410752d08;hb=411d23b9eafbeae373bc1f78064ec2a8771a2772;hp=64c7a7fa18dd341163b36b5efb6d835c8c298095;hpb=7784d0d3d0d9807c3db1a786b0190e660ec3fd86;p=dpdk.git

diff --git a/drivers/net/axgbe/axgbe_common.h b/drivers/net/axgbe/axgbe_common.h
index 64c7a7fa18..34f60f1568 100644
--- a/drivers/net/axgbe/axgbe_common.h
+++ b/drivers/net/axgbe/axgbe_common.h
@@ -34,7 +34,6 @@
 #include <rte_ethdev.h>
 #include <rte_dev.h>
 #include <rte_errno.h>
-#include <rte_dev.h>
 #include <rte_ethdev_pci.h>
 #include <rte_common.h>
 #include <rte_cycles.h>
@@ -1247,6 +1246,10 @@
 #define MDIO_VEND2_AN_STAT		0x8002
 #endif
 
+#ifndef MDIO_VEND2_PMA_CDR_CONTROL
+#define MDIO_VEND2_PMA_CDR_CONTROL	0x8056
+#endif
+
 #ifndef MDIO_CTRL1_SPEED1G
 #define MDIO_CTRL1_SPEED1G		(MDIO_CTRL1_SPEED10G & ~BMCR_SPEED100)
 #endif
@@ -1294,6 +1297,10 @@
 #define AXGBE_AN_CL37_PCS_MODE_SGMII	0x04
 #define AXGBE_AN_CL37_TX_CONFIG_MASK	0x08
 
+#define AXGBE_PMA_CDR_TRACK_EN_MASK	0x01
+#define AXGBE_PMA_CDR_TRACK_EN_OFF	0x00
+#define AXGBE_PMA_CDR_TRACK_EN_ON	0x01
+
 /*generic*/
 #define __iomem
 
@@ -1344,9 +1351,9 @@ do {									\
 
 #define SET_BITS_LE(_var, _index, _width, _val)				\
 do {									\
-	(_var) &= rte_cpu_to_le_32(~(((0x1 << (_width)) - 1) << (_index)));\
+	(_var) &= rte_cpu_to_le_32(~(((0x1U << (_width)) - 1) << (_index)));\
 	(_var) |= rte_cpu_to_le_32((((_val) &				\
-			      ((0x1 << (_width)) - 1)) << (_index)));	\
+			      ((0x1U << (_width)) - 1)) << (_index)));	\
 } while (0)
 
 /* Bit setting and getting macros based on register fields