X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Faxgbe%2Faxgbe_ethdev.c;h=9cb4818af11f0621e3a9ef41ed1a1efcc61ca817;hb=05b405d581486651305551a9f7295f40388d95db;hp=39087f36f04f3b00c2c8ac8d29b8f551d001d718;hpb=0607dadf98c71bdc96ea7b54eda26f1b667be1f6;p=dpdk.git diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c index 39087f36f0..9cb4818af1 100644 --- a/drivers/net/axgbe/axgbe_ethdev.c +++ b/drivers/net/axgbe/axgbe_ethdev.c @@ -13,9 +13,10 @@ static int eth_axgbe_dev_init(struct rte_eth_dev *eth_dev); static int axgbe_dev_configure(struct rte_eth_dev *dev); static int axgbe_dev_start(struct rte_eth_dev *dev); -static void axgbe_dev_stop(struct rte_eth_dev *dev); +static int axgbe_dev_stop(struct rte_eth_dev *dev); static void axgbe_dev_interrupt_handler(void *param); static int axgbe_dev_close(struct rte_eth_dev *dev); +static int axgbe_dev_reset(struct rte_eth_dev *dev); static int axgbe_dev_promiscuous_enable(struct rte_eth_dev *dev); static int axgbe_dev_promiscuous_disable(struct rte_eth_dev *dev); static int axgbe_dev_allmulticast_enable(struct rte_eth_dev *dev); @@ -109,6 +110,11 @@ axgbe_set_tstamp_time(struct axgbe_port *pdata, unsigned int sec, static void axgbe_update_tstamp_addend(struct axgbe_port *pdata, unsigned int addend); +static int + axgbe_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vid, int on); +static int axgbe_vlan_tpid_set(struct rte_eth_dev *dev, + enum rte_vlan_type vlan_type, uint16_t tpid); +static int axgbe_vlan_offload_set(struct rte_eth_dev *dev, int mask); struct axgbe_xstats { char name[RTE_ETH_XSTATS_NAME_SIZE]; @@ -215,6 +221,7 @@ static const struct eth_dev_ops axgbe_eth_dev_ops = { .dev_start = axgbe_dev_start, .dev_stop = axgbe_dev_stop, .dev_close = axgbe_dev_close, + .dev_reset = axgbe_dev_reset, .promiscuous_enable = axgbe_dev_promiscuous_enable, .promiscuous_disable = axgbe_dev_promiscuous_disable, .allmulticast_enable = axgbe_dev_allmulticast_enable, @@ -250,6 +257,9 @@ static const struct eth_dev_ops axgbe_eth_dev_ops = { .txq_info_get = axgbe_txq_info_get, .dev_supported_ptypes_get = axgbe_dev_supported_ptypes_get, .mtu_set = axgb_mtu_set, + .vlan_filter_set = axgbe_vlan_filter_set, + .vlan_tpid_set = axgbe_vlan_tpid_set, + .vlan_offload_set = axgbe_vlan_offload_set, .timesync_enable = axgbe_timesync_enable, .timesync_disable = axgbe_timesync_disable, .timesync_read_rx_timestamp = axgbe_timesync_read_rx_timestamp, @@ -257,6 +267,7 @@ static const struct eth_dev_ops axgbe_eth_dev_ops = { .timesync_adjust_time = axgbe_timesync_adjust_time, .timesync_read_time = axgbe_timesync_read_time, .timesync_write_time = axgbe_timesync_write_time, + .fw_version_get = axgbe_dev_fw_version_get, }; static int axgbe_phy_reset(struct axgbe_port *pdata) @@ -386,7 +397,7 @@ axgbe_dev_start(struct rte_eth_dev *dev) } /* Stop device: disable rx and tx functions to allow for reconfiguring. */ -static void +static int axgbe_dev_stop(struct rte_eth_dev *dev) { struct axgbe_port *pdata = dev->data->dev_private; @@ -396,7 +407,7 @@ axgbe_dev_stop(struct rte_eth_dev *dev) rte_intr_disable(&pdata->pci_dev->intr_handle); if (rte_bit_relaxed_get32(AXGBE_STOPPED, &pdata->dev_state)) - return; + return 0; rte_bit_relaxed_set32(AXGBE_STOPPED, &pdata->dev_state); axgbe_dev_disable_tx(dev); @@ -406,6 +417,8 @@ axgbe_dev_stop(struct rte_eth_dev *dev) pdata->hw_if.exit(pdata); memset(&dev->data->dev_link, 0, sizeof(struct rte_eth_link)); rte_bit_relaxed_set32(AXGBE_DOWN, &pdata->dev_state); + + return 0; } static int @@ -616,6 +629,20 @@ axgbe_dev_rss_hash_conf_get(struct rte_eth_dev *dev, return 0; } +static int +axgbe_dev_reset(struct rte_eth_dev *dev) +{ + int ret = 0; + + ret = axgbe_dev_close(dev); + if (ret) + return ret; + + ret = eth_axgbe_dev_init(dev); + + return ret; +} + static void axgbe_dev_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index) { @@ -1102,22 +1129,33 @@ axgbe_dev_stats_get(struct rte_eth_dev *dev, for (i = 0; i < dev->data->nb_rx_queues; i++) { rxq = dev->data->rx_queues[i]; - stats->q_ipackets[i] = rxq->pkts; - stats->ipackets += rxq->pkts; - stats->q_ibytes[i] = rxq->bytes; - stats->ibytes += rxq->bytes; - stats->rx_nombuf += rxq->rx_mbuf_alloc_failed; - stats->q_errors[i] = rxq->errors + rxq->rx_mbuf_alloc_failed; - stats->ierrors += rxq->errors; + if (rxq) { + stats->q_ipackets[i] = rxq->pkts; + stats->ipackets += rxq->pkts; + stats->q_ibytes[i] = rxq->bytes; + stats->ibytes += rxq->bytes; + stats->rx_nombuf += rxq->rx_mbuf_alloc_failed; + stats->q_errors[i] = rxq->errors + + rxq->rx_mbuf_alloc_failed; + stats->ierrors += rxq->errors; + } else { + PMD_DRV_LOG(DEBUG, "Rx queue not setup for port %d\n", + dev->data->port_id); + } } for (i = 0; i < dev->data->nb_tx_queues; i++) { txq = dev->data->tx_queues[i]; - stats->q_opackets[i] = txq->pkts; - stats->opackets += txq->pkts; - stats->q_obytes[i] = txq->bytes; - stats->obytes += txq->bytes; - stats->oerrors += txq->errors; + if (txq) { + stats->q_opackets[i] = txq->pkts; + stats->opackets += txq->pkts; + stats->q_obytes[i] = txq->bytes; + stats->obytes += txq->bytes; + stats->oerrors += txq->errors; + } else { + PMD_DRV_LOG(DEBUG, "Tx queue not setup for port %d\n", + dev->data->port_id); + } } return 0; @@ -1132,16 +1170,26 @@ axgbe_dev_stats_reset(struct rte_eth_dev *dev) for (i = 0; i < dev->data->nb_rx_queues; i++) { rxq = dev->data->rx_queues[i]; - rxq->pkts = 0; - rxq->bytes = 0; - rxq->errors = 0; - rxq->rx_mbuf_alloc_failed = 0; + if (rxq) { + rxq->pkts = 0; + rxq->bytes = 0; + rxq->errors = 0; + rxq->rx_mbuf_alloc_failed = 0; + } else { + PMD_DRV_LOG(DEBUG, "Rx queue not setup for port %d\n", + dev->data->port_id); + } } for (i = 0; i < dev->data->nb_tx_queues; i++) { txq = dev->data->tx_queues[i]; - txq->pkts = 0; - txq->bytes = 0; - txq->errors = 0; + if (txq) { + txq->pkts = 0; + txq->bytes = 0; + txq->errors = 0; + } else { + PMD_DRV_LOG(DEBUG, "Tx queue not setup for port %d\n", + dev->data->port_id); + } } return 0; @@ -1161,6 +1209,9 @@ axgbe_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) dev_info->speed_capa = ETH_LINK_SPEED_10G; dev_info->rx_offload_capa = + DEV_RX_OFFLOAD_VLAN_STRIP | + DEV_RX_OFFLOAD_VLAN_FILTER | + DEV_RX_OFFLOAD_VLAN_EXTEND | DEV_RX_OFFLOAD_IPV4_CKSUM | DEV_RX_OFFLOAD_UDP_CKSUM | DEV_RX_OFFLOAD_TCP_CKSUM | @@ -1169,6 +1220,8 @@ axgbe_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) DEV_RX_OFFLOAD_KEEP_CRC; dev_info->tx_offload_capa = + DEV_TX_OFFLOAD_VLAN_INSERT | + DEV_TX_OFFLOAD_QINQ_INSERT | DEV_TX_OFFLOAD_IPV4_CKSUM | DEV_TX_OFFLOAD_UDP_CKSUM | DEV_TX_OFFLOAD_TCP_CKSUM; @@ -1437,7 +1490,7 @@ static int axgb_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) dev->data->port_id); return -EBUSY; } - if (frame_size > RTE_ETHER_MAX_LEN) { + if (frame_size > AXGBE_ETH_MAX_LEN) { dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME; val = 1; @@ -1754,14 +1807,163 @@ axgbe_timesync_read_tx_timestamp(struct rte_eth_dev *dev, return 0; } +static int +axgbe_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vid, int on) +{ + struct axgbe_port *pdata = dev->data->dev_private; + unsigned long vid_bit, vid_idx; + + vid_bit = VLAN_TABLE_BIT(vid); + vid_idx = VLAN_TABLE_IDX(vid); + + if (on) { + PMD_DRV_LOG(DEBUG, "Set VLAN vid=%d for device = %s\n", + vid, pdata->eth_dev->device->name); + pdata->active_vlans[vid_idx] |= vid_bit; + } else { + PMD_DRV_LOG(DEBUG, "Reset VLAN vid=%d for device = %s\n", + vid, pdata->eth_dev->device->name); + pdata->active_vlans[vid_idx] &= ~vid_bit; + } + pdata->hw_if.update_vlan_hash_table(pdata); + return 0; +} + +static int +axgbe_vlan_tpid_set(struct rte_eth_dev *dev, + enum rte_vlan_type vlan_type, + uint16_t tpid) +{ + struct axgbe_port *pdata = dev->data->dev_private; + uint32_t reg = 0; + uint32_t qinq = 0; + + qinq = AXGMAC_IOREAD_BITS(pdata, MAC_VLANTR, EDVLP); + PMD_DRV_LOG(DEBUG, "EDVLP: qinq = 0x%x\n", qinq); + + switch (vlan_type) { + case ETH_VLAN_TYPE_INNER: + PMD_DRV_LOG(DEBUG, "ETH_VLAN_TYPE_INNER\n"); + if (qinq) { + if (tpid != 0x8100 && tpid != 0x88a8) + PMD_DRV_LOG(ERR, + "tag supported 0x8100/0x88A8\n"); + PMD_DRV_LOG(DEBUG, "qinq with inner tag\n"); + + /*Enable Inner VLAN Tag */ + AXGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, ERIVLT, 1); + reg = AXGMAC_IOREAD_BITS(pdata, MAC_VLANTR, ERIVLT); + PMD_DRV_LOG(DEBUG, "bit ERIVLT = 0x%x\n", reg); + + } else { + PMD_DRV_LOG(ERR, + "Inner type not supported in single tag\n"); + } + break; + case ETH_VLAN_TYPE_OUTER: + PMD_DRV_LOG(DEBUG, "ETH_VLAN_TYPE_OUTER\n"); + if (qinq) { + PMD_DRV_LOG(DEBUG, "double tagging is enabled\n"); + /*Enable outer VLAN tag*/ + AXGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, ERIVLT, 0); + reg = AXGMAC_IOREAD_BITS(pdata, MAC_VLANTR, ERIVLT); + PMD_DRV_LOG(DEBUG, "bit ERIVLT = 0x%x\n", reg); + + AXGMAC_IOWRITE_BITS(pdata, MAC_VLANIR, CSVL, 1); + reg = AXGMAC_IOREAD_BITS(pdata, MAC_VLANIR, CSVL); + PMD_DRV_LOG(DEBUG, "bit CSVL = 0x%x\n", reg); + } else { + if (tpid != 0x8100 && tpid != 0x88a8) + PMD_DRV_LOG(ERR, + "tag supported 0x8100/0x88A8\n"); + } + break; + case ETH_VLAN_TYPE_MAX: + PMD_DRV_LOG(ERR, "ETH_VLAN_TYPE_MAX\n"); + break; + case ETH_VLAN_TYPE_UNKNOWN: + PMD_DRV_LOG(ERR, "ETH_VLAN_TYPE_UNKNOWN\n"); + break; + } + return 0; +} + +static void axgbe_vlan_extend_enable(struct axgbe_port *pdata) +{ + int qinq = 0; + + AXGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, EDVLP, 1); + qinq = AXGMAC_IOREAD_BITS(pdata, MAC_VLANTR, EDVLP); + PMD_DRV_LOG(DEBUG, "vlan double tag enabled EDVLP:qinq=0x%x\n", qinq); +} + +static void axgbe_vlan_extend_disable(struct axgbe_port *pdata) +{ + int qinq = 0; + + AXGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, EDVLP, 0); + qinq = AXGMAC_IOREAD_BITS(pdata, MAC_VLANTR, EDVLP); + PMD_DRV_LOG(DEBUG, "vlan double tag disable EDVLP:qinq=0x%x\n", qinq); +} + +static int +axgbe_vlan_offload_set(struct rte_eth_dev *dev, int mask) +{ + struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode; + struct axgbe_port *pdata = dev->data->dev_private; + + /* Indicate that VLAN Tx CTAGs come from context descriptors */ + AXGMAC_IOWRITE_BITS(pdata, MAC_VLANIR, CSVL, 0); + AXGMAC_IOWRITE_BITS(pdata, MAC_VLANIR, VLTI, 1); + + if (mask & ETH_VLAN_STRIP_MASK) { + if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) { + PMD_DRV_LOG(DEBUG, "Strip ON for device = %s\n", + pdata->eth_dev->device->name); + pdata->hw_if.enable_rx_vlan_stripping(pdata); + } else { + PMD_DRV_LOG(DEBUG, "Strip OFF for device = %s\n", + pdata->eth_dev->device->name); + pdata->hw_if.disable_rx_vlan_stripping(pdata); + } + } + if (mask & ETH_VLAN_FILTER_MASK) { + if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER) { + PMD_DRV_LOG(DEBUG, "Filter ON for device = %s\n", + pdata->eth_dev->device->name); + pdata->hw_if.enable_rx_vlan_filtering(pdata); + } else { + PMD_DRV_LOG(DEBUG, "Filter OFF for device = %s\n", + pdata->eth_dev->device->name); + pdata->hw_if.disable_rx_vlan_filtering(pdata); + } + } + if (mask & ETH_VLAN_EXTEND_MASK) { + if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_EXTEND) { + PMD_DRV_LOG(DEBUG, "enabling vlan extended mode\n"); + axgbe_vlan_extend_enable(pdata); + /* Set global registers with default ethertype*/ + axgbe_vlan_tpid_set(dev, ETH_VLAN_TYPE_OUTER, + RTE_ETHER_TYPE_VLAN); + axgbe_vlan_tpid_set(dev, ETH_VLAN_TYPE_INNER, + RTE_ETHER_TYPE_VLAN); + } else { + PMD_DRV_LOG(DEBUG, "disabling vlan extended mode\n"); + axgbe_vlan_extend_disable(pdata); + } + } + return 0; +} + static void axgbe_get_all_hw_features(struct axgbe_port *pdata) { - unsigned int mac_hfr0, mac_hfr1, mac_hfr2; + unsigned int mac_hfr0, mac_hfr1, mac_hfr2, mac_hfr3; struct axgbe_hw_features *hw_feat = &pdata->hw_feat; mac_hfr0 = AXGMAC_IOREAD(pdata, MAC_HWF0R); mac_hfr1 = AXGMAC_IOREAD(pdata, MAC_HWF1R); mac_hfr2 = AXGMAC_IOREAD(pdata, MAC_HWF2R); + mac_hfr3 = AXGMAC_IOREAD(pdata, MAC_HWF3R); memset(hw_feat, 0, sizeof(*hw_feat)); @@ -1812,6 +2014,12 @@ static void axgbe_get_all_hw_features(struct axgbe_port *pdata) hw_feat->aux_snap_num = AXGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, AUXSNAPNUM); + /* Hardware feature register 3 */ + hw_feat->tx_q_vlan_tag_ins = AXGMAC_GET_BITS(mac_hfr3, + MAC_HWF3R, CBTISEL); + hw_feat->no_of_vlan_extn = AXGMAC_GET_BITS(mac_hfr3, + MAC_HWF3R, NRVF); + /* Translate the Hash Table size into actual number */ switch (hw_feat->hash_table_size) { case 0: @@ -1970,6 +2178,8 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev) if (rte_eal_process_type() != RTE_PROC_PRIMARY) return 0; + eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; + pdata = eth_dev->data->dev_private; /* initial state */ rte_bit_relaxed_set32(AXGBE_DOWN, &pdata->dev_state); @@ -2167,5 +2377,5 @@ static struct rte_pci_driver rte_axgbe_pmd = { RTE_PMD_REGISTER_PCI(net_axgbe, rte_axgbe_pmd); RTE_PMD_REGISTER_PCI_TABLE(net_axgbe, pci_id_axgbe_map); RTE_PMD_REGISTER_KMOD_DEP(net_axgbe, "* igb_uio | uio_pci_generic | vfio-pci"); -RTE_LOG_REGISTER(axgbe_logtype_init, pmd.net.axgbe.init, NOTICE); -RTE_LOG_REGISTER(axgbe_logtype_driver, pmd.net.axgbe.driver, NOTICE); +RTE_LOG_REGISTER_SUFFIX(axgbe_logtype_init, init, NOTICE); +RTE_LOG_REGISTER_SUFFIX(axgbe_logtype_driver, driver, NOTICE);