X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Faxgbe%2Faxgbe_rxtx.c;h=30c467db71708b34744e841c63e9b30d17e22d33;hb=27fb5dd2850c60b46660b93c2fe14da6841b142c;hp=b5a29a95fee77b33ca645f16783e7f163b439ad4;hpb=323e7b667f18376c60351282950b28d4d0cc6165;p=dpdk.git diff --git a/drivers/net/axgbe/axgbe_rxtx.c b/drivers/net/axgbe/axgbe_rxtx.c index b5a29a95fe..30c467db71 100644 --- a/drivers/net/axgbe/axgbe_rxtx.c +++ b/drivers/net/axgbe/axgbe_rxtx.c @@ -75,7 +75,7 @@ int axgbe_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, rxq->dma_tail_reg = (volatile uint32_t *)((uint8_t *)rxq->dma_regs + DMA_CH_RDTR_LO); if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC) - rxq->crc_len = ETHER_CRC_LEN; + rxq->crc_len = RTE_ETHER_CRC_LEN; else rxq->crc_len = 0; @@ -229,6 +229,7 @@ axgbe_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, (unsigned int)rxq->queue_id); rte_eth_devices[ rxq->port_id].data->rx_mbuf_alloc_failed++; + rxq->rx_mbuf_alloc_failed++; break; } pidx = idx + 1; @@ -306,6 +307,152 @@ err_set: return nb_rx; } + +uint16_t eth_axgbe_recv_scattered_pkts(void *rx_queue, + struct rte_mbuf **rx_pkts, uint16_t nb_pkts) +{ + PMD_INIT_FUNC_TRACE(); + uint16_t nb_rx = 0; + struct axgbe_rx_queue *rxq = rx_queue; + volatile union axgbe_rx_desc *desc; + + uint64_t old_dirty = rxq->dirty; + struct rte_mbuf *first_seg = NULL; + struct rte_mbuf *mbuf, *tmbuf; + unsigned int err; + uint32_t error_status; + uint16_t idx, pidx, data_len = 0, pkt_len = 0; + + idx = AXGBE_GET_DESC_IDX(rxq, rxq->cur); + while (nb_rx < nb_pkts) { + bool eop = 0; +next_desc: + if (unlikely(idx == rxq->nb_desc)) + idx = 0; + + desc = &rxq->desc[idx]; + + if (AXGMAC_GET_BITS_LE(desc->write.desc3, RX_NORMAL_DESC3, OWN)) + break; + + tmbuf = rte_mbuf_raw_alloc(rxq->mb_pool); + if (unlikely(!tmbuf)) { + PMD_DRV_LOG(ERR, "RX mbuf alloc failed port_id = %u" + " queue_id = %u\n", + (unsigned int)rxq->port_id, + (unsigned int)rxq->queue_id); + rte_eth_devices[rxq->port_id].data->rx_mbuf_alloc_failed++; + break; + } + + pidx = idx + 1; + if (unlikely(pidx == rxq->nb_desc)) + pidx = 0; + + rte_prefetch0(rxq->sw_ring[pidx]); + if ((pidx & 0x3) == 0) { + rte_prefetch0(&rxq->desc[pidx]); + rte_prefetch0(&rxq->sw_ring[pidx]); + } + + mbuf = rxq->sw_ring[idx]; + /* Check for any errors and free mbuf*/ + err = AXGMAC_GET_BITS_LE(desc->write.desc3, + RX_NORMAL_DESC3, ES); + error_status = 0; + if (unlikely(err)) { + error_status = desc->write.desc3 & AXGBE_ERR_STATUS; + if ((error_status != AXGBE_L3_CSUM_ERR) + && (error_status != AXGBE_L4_CSUM_ERR)) { + rxq->errors++; + rte_pktmbuf_free(mbuf); + goto err_set; + } + } + rte_prefetch1(rte_pktmbuf_mtod(mbuf, void *)); + + if (!AXGMAC_GET_BITS_LE(desc->write.desc3, + RX_NORMAL_DESC3, LD)) { + eop = 0; + pkt_len = rxq->buf_size; + data_len = pkt_len; + } else { + eop = 1; + pkt_len = AXGMAC_GET_BITS_LE(desc->write.desc3, + RX_NORMAL_DESC3, PL); + data_len = pkt_len - rxq->crc_len; + } + + if (first_seg != NULL) { + if (rte_pktmbuf_chain(first_seg, mbuf) != 0) + rte_mempool_put(rxq->mb_pool, + first_seg); + } else { + first_seg = mbuf; + } + + /* Get the RSS hash */ + if (AXGMAC_GET_BITS_LE(desc->write.desc3, RX_NORMAL_DESC3, RSV)) + mbuf->hash.rss = rte_le_to_cpu_32(desc->write.desc1); + + /* Mbuf populate */ + mbuf->data_off = RTE_PKTMBUF_HEADROOM; + mbuf->data_len = data_len; + +err_set: + rxq->cur++; + rxq->sw_ring[idx++] = tmbuf; + desc->read.baddr = + rte_cpu_to_le_64(rte_mbuf_data_iova_default(tmbuf)); + memset((void *)(&desc->read.desc2), 0, 8); + AXGMAC_SET_BITS_LE(desc->read.desc3, RX_NORMAL_DESC3, OWN, 1); + rxq->dirty++; + + if (!eop) { + rte_pktmbuf_free(mbuf); + goto next_desc; + } + + first_seg->pkt_len = pkt_len; + rxq->bytes += pkt_len; + mbuf->next = NULL; + + first_seg->port = rxq->port_id; + if (rxq->pdata->rx_csum_enable) { + mbuf->ol_flags = 0; + mbuf->ol_flags |= PKT_RX_IP_CKSUM_GOOD; + mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD; + if (unlikely(error_status == AXGBE_L3_CSUM_ERR)) { + mbuf->ol_flags &= ~PKT_RX_IP_CKSUM_GOOD; + mbuf->ol_flags |= PKT_RX_IP_CKSUM_BAD; + mbuf->ol_flags &= ~PKT_RX_L4_CKSUM_GOOD; + mbuf->ol_flags |= PKT_RX_L4_CKSUM_UNKNOWN; + } else if (unlikely(error_status + == AXGBE_L4_CSUM_ERR)) { + mbuf->ol_flags &= ~PKT_RX_L4_CKSUM_GOOD; + mbuf->ol_flags |= PKT_RX_L4_CKSUM_BAD; + } + } + + rx_pkts[nb_rx++] = first_seg; + + /* Setup receipt context for a new packet.*/ + first_seg = NULL; + } + + /* Save receive context.*/ + rxq->pkts += nb_rx; + + if (rxq->dirty != old_dirty) { + rte_wmb(); + idx = AXGBE_GET_DESC_IDX(rxq, rxq->dirty - 1); + AXGMAC_DMA_IOWRITE(rxq, DMA_CH_RDTR_LO, + low32_value(rxq->ring_phys_addr + + (idx * sizeof(union axgbe_rx_desc)))); + } + return nb_rx; +} + /* Tx Apis */ static void axgbe_tx_queue_release(struct axgbe_tx_queue *tx_queue) { @@ -342,7 +489,7 @@ int axgbe_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, const struct rte_memzone *tz; tx_desc = nb_desc; - pdata = (struct axgbe_port *)dev->data->dev_private; + pdata = dev->data->dev_private; /* * validate tx descriptors count @@ -672,3 +819,49 @@ void axgbe_dev_clear_queues(struct rte_eth_dev *dev) } } } + +int +axgbe_dev_rx_descriptor_status(void *rx_queue, uint16_t offset) +{ + struct axgbe_rx_queue *rxq = rx_queue; + volatile union axgbe_rx_desc *desc; + uint16_t idx; + + + if (unlikely(offset >= rxq->nb_desc)) + return -EINVAL; + + if (offset >= rxq->nb_desc - rxq->dirty) + return RTE_ETH_RX_DESC_UNAVAIL; + + idx = AXGBE_GET_DESC_IDX(rxq, rxq->cur); + desc = &rxq->desc[idx + offset]; + + if (!AXGMAC_GET_BITS_LE(desc->write.desc3, RX_NORMAL_DESC3, OWN)) + return RTE_ETH_RX_DESC_DONE; + + return RTE_ETH_RX_DESC_AVAIL; +} + +int +axgbe_dev_tx_descriptor_status(void *tx_queue, uint16_t offset) +{ + struct axgbe_tx_queue *txq = tx_queue; + volatile struct axgbe_tx_desc *desc; + uint16_t idx; + + + if (unlikely(offset >= txq->nb_desc)) + return -EINVAL; + + if (offset >= txq->nb_desc - txq->dirty) + return RTE_ETH_TX_DESC_UNAVAIL; + + idx = AXGBE_GET_DESC_IDX(txq, txq->dirty + txq->free_batch_cnt - 1); + desc = &txq->desc[idx + offset]; + + if (!AXGMAC_GET_BITS_LE(desc->desc3, TX_NORMAL_DESC3, OWN)) + return RTE_ETH_TX_DESC_DONE; + + return RTE_ETH_TX_DESC_FULL; +}