X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fbnxt%2Fbnxt_ethdev.c;h=a98f93ab295ca5dba9dcea3d7745185041165a60;hb=012bf708c20f4b23d055717e28f8de74887113d8;hp=1579d797ce191c42e7b79635c8d0779ec4b75537;hpb=6253a23491a4ad7dd38d89737ad72229b1dc8c1f;p=dpdk.git diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c index 1579d797ce..a98f93ab29 100644 --- a/drivers/net/bnxt/bnxt_ethdev.c +++ b/drivers/net/bnxt/bnxt_ethdev.c @@ -580,13 +580,14 @@ static int bnxt_register_fc_ctx_mem(struct bnxt *bp) return rc; } -static int bnxt_alloc_ctx_mem_buf(char *type, size_t size, +static int bnxt_alloc_ctx_mem_buf(struct bnxt *bp, char *type, size_t size, struct bnxt_ctx_mem_buf_info *ctx) { if (!ctx) return -EINVAL; - ctx->va = rte_zmalloc(type, size, 0); + ctx->va = rte_zmalloc_socket(type, size, 0, + bp->eth_dev->device->numa_node); if (ctx->va == NULL) return -ENOMEM; rte_mem_lock_page(ctx->va); @@ -610,7 +611,7 @@ static int bnxt_init_fc_ctx_mem(struct bnxt *bp) sprintf(type, "bnxt_rx_fc_in_" PCI_PRI_FMT, pdev->addr.domain, pdev->addr.bus, pdev->addr.devid, pdev->addr.function); /* 4 bytes for each counter-id */ - rc = bnxt_alloc_ctx_mem_buf(type, + rc = bnxt_alloc_ctx_mem_buf(bp, type, max_fc * 4, &bp->flow_stat->rx_fc_in_tbl); if (rc) @@ -619,7 +620,7 @@ static int bnxt_init_fc_ctx_mem(struct bnxt *bp) sprintf(type, "bnxt_rx_fc_out_" PCI_PRI_FMT, pdev->addr.domain, pdev->addr.bus, pdev->addr.devid, pdev->addr.function); /* 16 bytes for each counter - 8 bytes pkt_count, 8 bytes byte_count */ - rc = bnxt_alloc_ctx_mem_buf(type, + rc = bnxt_alloc_ctx_mem_buf(bp, type, max_fc * 16, &bp->flow_stat->rx_fc_out_tbl); if (rc) @@ -628,7 +629,7 @@ static int bnxt_init_fc_ctx_mem(struct bnxt *bp) sprintf(type, "bnxt_tx_fc_in_" PCI_PRI_FMT, pdev->addr.domain, pdev->addr.bus, pdev->addr.devid, pdev->addr.function); /* 4 bytes for each counter-id */ - rc = bnxt_alloc_ctx_mem_buf(type, + rc = bnxt_alloc_ctx_mem_buf(bp, type, max_fc * 4, &bp->flow_stat->tx_fc_in_tbl); if (rc) @@ -637,7 +638,7 @@ static int bnxt_init_fc_ctx_mem(struct bnxt *bp) sprintf(type, "bnxt_tx_fc_out_" PCI_PRI_FMT, pdev->addr.domain, pdev->addr.bus, pdev->addr.devid, pdev->addr.function); /* 16 bytes for each counter - 8 bytes pkt_count, 8 bytes byte_count */ - rc = bnxt_alloc_ctx_mem_buf(type, + rc = bnxt_alloc_ctx_mem_buf(bp, type, max_fc * 16, &bp->flow_stat->tx_fc_out_tbl); if (rc) @@ -807,6 +808,26 @@ skip_cosq_cfg: } } + for (j = 0; j < bp->tx_nr_rings; j++) { + struct bnxt_tx_queue *txq = bp->tx_queues[j]; + + if (!txq->tx_deferred_start) { + bp->eth_dev->data->tx_queue_state[j] = + RTE_ETH_QUEUE_STATE_STARTED; + txq->tx_started = true; + } + } + + for (j = 0; j < bp->rx_nr_rings; j++) { + struct bnxt_rx_queue *rxq = bp->rx_queues[j]; + + if (!rxq->rx_deferred_start) { + bp->eth_dev->data->rx_queue_state[j] = + RTE_ETH_QUEUE_STATE_STARTED; + rxq->rx_started = true; + } + } + rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0], 0, NULL); if (rc) { PMD_DRV_LOG(ERR, @@ -966,7 +987,7 @@ static int bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev, dev_info->max_rx_queues = max_rx_rings; dev_info->max_tx_queues = max_rx_rings; dev_info->reta_size = bnxt_rss_hash_tbl_size(bp); - dev_info->hash_key_size = 40; + dev_info->hash_key_size = HW_HASH_KEY_SIZE; max_vnics = bp->max_vnics; /* MTU specifics */ @@ -980,12 +1001,18 @@ static int bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev, dev_info->rx_offload_capa = BNXT_DEV_RX_OFFLOAD_SUPPORT; if (bp->flags & BNXT_FLAG_PTP_SUPPORTED) dev_info->rx_offload_capa |= DEV_RX_OFFLOAD_TIMESTAMP; + if (bp->vnic_cap_flags & BNXT_VNIC_CAP_VLAN_RX_STRIP) + dev_info->rx_offload_capa |= DEV_RX_OFFLOAD_VLAN_STRIP; dev_info->tx_queue_offload_capa = DEV_TX_OFFLOAD_MBUF_FAST_FREE; dev_info->tx_offload_capa = BNXT_DEV_TX_OFFLOAD_SUPPORT | dev_info->tx_queue_offload_capa; + if (bp->fw_cap & BNXT_FW_CAP_VLAN_TX_INSERT) + dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_VLAN_INSERT; dev_info->flow_type_rss_offloads = BNXT_ETH_RSS_SUPPORT; dev_info->speed_capa = bnxt_get_speed_capabilities(bp); + dev_info->dev_capa = RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP | + RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP; dev_info->default_rxconf = (struct rte_eth_rxconf) { .rx_thresh = { @@ -1008,7 +1035,6 @@ static int bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev, }; eth_dev->data->dev_conf.intr_conf.lsc = 1; - eth_dev->data->dev_conf.intr_conf.rxq = 1; dev_info->rx_desc_lim.nb_min = BNXT_MIN_RING_DESC; dev_info->rx_desc_lim.nb_max = BNXT_MAX_RX_RING_DESC; dev_info->tx_desc_lim.nb_min = BNXT_MIN_RING_DESC; @@ -1841,11 +1867,6 @@ out: if (new.link_status != eth_dev->data->dev_link.link_status || new.link_speed != eth_dev->data->dev_link.link_speed) { rte_eth_linkstatus_set(eth_dev, &new); - - rte_eth_dev_callback_process(eth_dev, - RTE_ETH_EVENT_INTR_LSC, - NULL); - bnxt_print_link_info(eth_dev); } @@ -2071,7 +2092,6 @@ static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev, if (rc) return rc; - /* Retrieve from the default VNIC */ if (!vnic) return -EINVAL; if (!vnic->rss_table) @@ -2153,7 +2173,8 @@ static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev, if (rss_conf->rss_key_len != HW_HASH_KEY_SIZE) { PMD_DRV_LOG(ERR, - "Invalid hashkey length, should be 16 bytes\n"); + "Invalid hashkey length, should be %d bytes\n", + HW_HASH_KEY_SIZE); return -EINVAL; } memcpy(vnic->rss_hash_key, rss_conf->rss_key, rss_conf->rss_key_len); @@ -2352,7 +2373,6 @@ bnxt_udp_tunnel_port_add_op(struct rte_eth_dev *eth_dev, } tunnel_type = HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN; - bp->vxlan_port_cnt++; break; case RTE_TUNNEL_TYPE_GENEVE: if (bp->geneve_port_cnt) { @@ -2367,7 +2387,6 @@ bnxt_udp_tunnel_port_add_op(struct rte_eth_dev *eth_dev, } tunnel_type = HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE; - bp->geneve_port_cnt++; break; default: PMD_DRV_LOG(ERR, "Tunnel type is not supported\n"); @@ -2375,6 +2394,18 @@ bnxt_udp_tunnel_port_add_op(struct rte_eth_dev *eth_dev, } rc = bnxt_hwrm_tunnel_dst_port_alloc(bp, udp_tunnel->udp_port, tunnel_type); + + if (rc != 0) + return rc; + + if (tunnel_type == + HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN) + bp->vxlan_port_cnt++; + + if (tunnel_type == + HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE) + bp->geneve_port_cnt++; + return rc; } @@ -3065,6 +3096,9 @@ int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu) if (!rc) eth_dev->data->dev_conf.rxmode.max_rx_pkt_len = new_pkt_size; + if (bnxt_hwrm_config_host_mtu(bp)) + PMD_DRV_LOG(WARNING, "Failed to configure host MTU\n"); + PMD_DRV_LOG(INFO, "New MTU is %d\n", new_mtu); return rc; @@ -3124,7 +3158,7 @@ bnxt_rx_queue_count_op(struct rte_eth_dev *dev, uint16_t rx_queue_id) { struct bnxt *bp = (struct bnxt *)dev->data->dev_private; struct bnxt_cp_ring_info *cpr; - uint32_t desc = 0, raw_cons; + uint32_t desc = 0, raw_cons, cp_ring_size; struct bnxt_rx_queue *rxq; struct rx_pkt_cmpl *rxcmp; int rc; @@ -3136,6 +3170,7 @@ bnxt_rx_queue_count_op(struct rte_eth_dev *dev, uint16_t rx_queue_id) rxq = dev->data->rx_queues[rx_queue_id]; cpr = rxq->cp_ring; raw_cons = cpr->cp_raw_cons; + cp_ring_size = cpr->cp_ring_struct->ring_size; while (1) { uint32_t agg_cnt, cons, cmpl_type; @@ -3143,7 +3178,7 @@ bnxt_rx_queue_count_op(struct rte_eth_dev *dev, uint16_t rx_queue_id) cons = RING_CMP(cpr->cp_ring_struct, raw_cons); rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons]; - if (!CMP_VALID(rxcmp, raw_cons, cpr->cp_ring_struct)) + if (!bnxt_cpr_cmp_valid(rxcmp, raw_cons, cp_ring_size)) break; cmpl_type = CMP_TYPE(rxcmp); @@ -3187,7 +3222,7 @@ bnxt_rx_descriptor_status_op(void *rx_queue, uint16_t offset) struct bnxt_rx_queue *rxq = rx_queue; struct bnxt_cp_ring_info *cpr; struct bnxt_rx_ring_info *rxr; - uint32_t desc, raw_cons; + uint32_t desc, raw_cons, cp_ring_size; struct bnxt *bp = rxq->bp; struct rx_pkt_cmpl *rxcmp; int rc; @@ -3201,6 +3236,7 @@ bnxt_rx_descriptor_status_op(void *rx_queue, uint16_t offset) rxr = rxq->rx_ring; cpr = rxq->cp_ring; + cp_ring_size = cpr->cp_ring_struct->ring_size; /* * For the vector receive case, the completion at the requested @@ -3217,7 +3253,7 @@ bnxt_rx_descriptor_status_op(void *rx_queue, uint16_t offset) cons = RING_CMP(cpr->cp_ring_struct, raw_cons); rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons]; - if (CMP_VALID(rxcmp, raw_cons, cpr->cp_ring_struct)) + if (bnxt_cpr_cmp_valid(rxcmp, raw_cons, cp_ring_size)) return RTE_ETH_RX_DESC_DONE; /* Check whether rx desc has an mbuf attached. */ @@ -3243,7 +3279,7 @@ bnxt_rx_descriptor_status_op(void *rx_queue, uint16_t offset) cons = RING_CMP(cpr->cp_ring_struct, raw_cons); rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons]; - if (!CMP_VALID(rxcmp, raw_cons, cpr->cp_ring_struct)) + if (!bnxt_cpr_cmp_valid(rxcmp, raw_cons, cp_ring_size)) break; cmpl_type = CMP_TYPE(rxcmp); @@ -3295,41 +3331,47 @@ static int bnxt_tx_descriptor_status_op(void *tx_queue, uint16_t offset) { struct bnxt_tx_queue *txq = (struct bnxt_tx_queue *)tx_queue; - struct bnxt_tx_ring_info *txr; - struct bnxt_cp_ring_info *cpr; - struct rte_mbuf **tx_buf; - struct tx_pkt_cmpl *txcmp; - uint32_t cons, cp_cons; + struct bnxt_cp_ring_info *cpr = txq->cp_ring; + uint32_t ring_mask, raw_cons, nb_tx_pkts = 0; + struct cmpl_base *cp_desc_ring; int rc; - if (!txq) - return -EINVAL; - rc = is_bnxt_in_error(txq->bp); if (rc) return rc; - cpr = txq->cp_ring; - txr = txq->tx_ring; - if (offset >= txq->nb_tx_desc) return -EINVAL; - cons = RING_CMP(cpr->cp_ring_struct, offset); - txcmp = (struct tx_pkt_cmpl *)&cpr->cp_desc_ring[cons]; - cp_cons = cpr->cp_raw_cons; + /* Return "desc done" if descriptor is available for use. */ + if (bnxt_tx_bds_in_hw(txq) <= offset) + return RTE_ETH_TX_DESC_DONE; - if (cons > cp_cons) { - if (CMPL_VALID(txcmp, cpr->valid)) - return RTE_ETH_TX_DESC_UNAVAIL; - } else { - if (CMPL_VALID(txcmp, !cpr->valid)) - return RTE_ETH_TX_DESC_UNAVAIL; + raw_cons = cpr->cp_raw_cons; + cp_desc_ring = cpr->cp_desc_ring; + ring_mask = cpr->cp_ring_struct->ring_mask; + + /* Check to see if hw has posted a completion for the descriptor. */ + while (1) { + struct tx_cmpl *txcmp; + uint32_t cons; + + cons = RING_CMPL(ring_mask, raw_cons); + txcmp = (struct tx_cmpl *)&cp_desc_ring[cons]; + + if (!bnxt_cpr_cmp_valid(txcmp, raw_cons, ring_mask + 1)) + break; + + if (CMP_TYPE(txcmp) == TX_CMPL_TYPE_TX_L2) + nb_tx_pkts += rte_le_to_cpu_32(txcmp->opaque); + + if (nb_tx_pkts > offset) + return RTE_ETH_TX_DESC_DONE; + + raw_cons = NEXT_RAW_CMP(raw_cons); } - tx_buf = &txr->tx_buf_ring[cons]; - if (*tx_buf == NULL) - return RTE_ETH_TX_DESC_DONE; + /* Descriptor is pending transmit, not yet completed by hardware. */ return RTE_ETH_TX_DESC_FULL; } @@ -4347,6 +4389,10 @@ err_start: err: bp->flags |= BNXT_FLAG_FATAL_ERROR; bnxt_uninit_resources(bp, false); + if (bp->eth_dev->data->dev_conf.intr_conf.rmv) + rte_eth_dev_callback_process(bp->eth_dev, + RTE_ETH_EVENT_INTR_RMV, + NULL); pthread_mutex_unlock(&bp->err_recovery_lock); PMD_DRV_LOG(ERR, "Failed to recover from FW reset\n"); } @@ -4421,11 +4467,11 @@ static int bnxt_fw_reset_all(struct bnxt *bp) int rc = 0; if (info->flags & BNXT_FLAG_ERROR_RECOVERY_HOST) { - /* Reset through master function driver */ + /* Reset through primary function driver */ for (i = 0; i < info->reg_array_cnt; i++) bnxt_write_fw_reset_reg(bp, i); /* Wait for time specified by FW after triggering reset */ - rte_delay_ms(info->master_func_wait_period_after_reset); + rte_delay_ms(info->primary_func_wait_period_after_reset); } else if (info->flags & BNXT_FLAG_ERROR_RECOVERY_CO_CPU) { /* Reset with the help of Kong processor */ rc = bnxt_hwrm_fw_reset(bp); @@ -4442,8 +4488,8 @@ static void bnxt_fw_reset_cb(void *arg) struct bnxt_error_recovery_info *info = bp->recovery_info; int rc = 0; - /* Only Master function can do FW reset */ - if (bnxt_is_master_func(bp) && + /* Only Primary function can do FW reset */ + if (bnxt_is_primary_func(bp) && bnxt_is_recovery_enabled(bp)) { rc = bnxt_fw_reset_all(bp); if (rc) { @@ -4471,8 +4517,8 @@ static void bnxt_fw_reset_cb(void *arg) * advertised by FW in HWRM_ERROR_RECOVERY_QCFG. * When the driver detects heartbeat stop or change in reset_counter, * it has to trigger a reset to recover from the error condition. - * A “master PF” is the function who will have the privilege to - * initiate the chimp reset. The master PF will be elected by the + * A “primary function” is the function who will have the privilege to + * initiate the chimp reset. The primary function will be elected by the * firmware and will be notified through async message. */ static void bnxt_check_fw_health(void *arg) @@ -4510,8 +4556,8 @@ reset: PMD_DRV_LOG(ERR, "Detected FW dead condition\n"); - if (bnxt_is_master_func(bp)) - wait_msec = info->master_func_wait_period; + if (bnxt_is_primary_func(bp)) + wait_msec = info->primary_func_wait_period; else wait_msec = info->normal_func_wait_period; @@ -4663,7 +4709,7 @@ static int bnxt_alloc_ctx_mem_blk(struct bnxt *bp, if (!mz) { mz = rte_memzone_reserve_aligned(mz_name, rmem->nr_pages * 8, - SOCKET_ID_ANY, + bp->eth_dev->device->numa_node, RTE_MEMZONE_2MB | RTE_MEMZONE_SIZE_HINT_ONLY | RTE_MEMZONE_IOVA_CONTIG, @@ -4686,7 +4732,7 @@ static int bnxt_alloc_ctx_mem_blk(struct bnxt *bp, if (!mz) { mz = rte_memzone_reserve_aligned(mz_name, mem_size, - SOCKET_ID_ANY, + bp->eth_dev->device->numa_node, RTE_MEMZONE_1GB | RTE_MEMZONE_SIZE_HINT_ONLY | RTE_MEMZONE_IOVA_CONTIG, @@ -4980,7 +5026,7 @@ static int bnxt_setup_mac_addr(struct rte_eth_dev *eth_dev) PMD_DRV_LOG(INFO, "VF MAC address not assigned by Host PF\n"); bnxt_eth_hw_addr_random(bp->mac_addr); PMD_DRV_LOG(INFO, - "Assign random MAC:%02X:%02X:%02X:%02X:%02X:%02X\n", + "Assign random MAC:" RTE_ETHER_ADDR_PRT_FMT "\n", bp->mac_addr[0], bp->mac_addr[1], bp->mac_addr[2], bp->mac_addr[3], bp->mac_addr[4], bp->mac_addr[5]); @@ -6134,7 +6180,7 @@ bnxt_uninit_resources(struct bnxt *bp, bool reconfig_dev) bp->pf->vf_req_buf = NULL; } - rc = bnxt_hwrm_func_driver_unregister(bp, 0); + rc = bnxt_hwrm_func_driver_unregister(bp); bp->flags &= ~BNXT_FLAG_REGISTERED; bnxt_free_ctx_mem(bp); if (!reconfig_dev) { @@ -6501,6 +6547,7 @@ static int bnxt_pci_remove(struct rte_pci_device *pci_dev) static struct rte_pci_driver bnxt_rte_pmd = { .id_table = bnxt_pci_id_map, .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC | + RTE_PCI_DRV_INTR_RMV | RTE_PCI_DRV_PROBE_AGAIN, /* Needed in case of VF-REPs * and OVS-DPDK */