X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fbnxt%2Fbnxt_hwrm.c;h=4022fafd175db1ace2d3e20526cf8fcb0c9c3260;hb=1e2f8aca2cc108559fb9d823fc88dc342048500d;hp=443553b54f0d119cf820743388cfe26df49f225c;hpb=0ac8e95d3c4eb4826c62e481c6c93823f43eb459;p=dpdk.git diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c index 443553b54f..4022fafd17 100644 --- a/drivers/net/bnxt/bnxt_hwrm.c +++ b/drivers/net/bnxt/bnxt_hwrm.c @@ -164,8 +164,9 @@ static int bnxt_hwrm_send_message(struct bnxt *bp, void *msg, rte_cpu_to_le_16(req->req_type) == HWRM_VER_GET) return -ETIMEDOUT; - PMD_DRV_LOG(ERR, "Error(timeout) sending msg 0x%04x\n", - req->req_type); + PMD_DRV_LOG(ERR, + "Error(timeout) sending msg 0x%04x, seq_id %d\n", + req->req_type, req->seq_id); return -ETIMEDOUT; } return 0; @@ -221,6 +222,8 @@ static int bnxt_hwrm_send_message(struct bnxt *bp, void *msg, rc = -EINVAL; \ else if (rc == HWRM_ERR_CODE_CMD_NOT_SUPPORTED) \ rc = -ENOTSUP; \ + else if (rc == HWRM_ERR_CODE_HOT_RESET_PROGRESS) \ + rc = -EAGAIN; \ else if (rc > 0) \ rc = -EIO; \ return rc; \ @@ -249,6 +252,8 @@ static int bnxt_hwrm_send_message(struct bnxt *bp, void *msg, rc = -EINVAL; \ else if (rc == HWRM_ERR_CODE_CMD_NOT_SUPPORTED) \ rc = -ENOTSUP; \ + else if (rc == HWRM_ERR_CODE_HOT_RESET_PROGRESS) \ + rc = -EAGAIN; \ else if (rc > 0) \ rc = -EIO; \ return rc; \ @@ -744,6 +749,8 @@ static int __bnxt_hwrm_func_qcaps(struct bnxt *bp) } else { bp->max_vnics = 1; } + PMD_DRV_LOG(DEBUG, "Max l2_cntxts is %d vnics is %d\n", + bp->max_l2_ctx, bp->max_vnics); bp->max_stat_ctx = rte_le_to_cpu_16(resp->max_stat_ctx); if (BNXT_PF(bp)) { bp->pf.total_vnics = rte_le_to_cpu_16(resp->max_vnics); @@ -1102,7 +1109,7 @@ int bnxt_hwrm_ver_get(struct bnxt *bp, uint32_t timeout) dev_caps_cfg = rte_le_to_cpu_32(resp->dev_caps_cfg); if (bp->max_resp_len != max_resp_len) { - sprintf(type, "bnxt_hwrm_%04x:%02x:%02x:%02x", + sprintf(type, "bnxt_hwrm_" PCI_PRI_FMT, bp->pdev->addr.domain, bp->pdev->addr.bus, bp->pdev->addr.devid, bp->pdev->addr.function); @@ -1137,7 +1144,7 @@ int bnxt_hwrm_ver_get(struct bnxt *bp, uint32_t timeout) (dev_caps_cfg & HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SHORT_CMD_REQUIRED)) || bp->hwrm_max_ext_req_len > HWRM_MAX_REQ_LEN) { - sprintf(type, "bnxt_hwrm_short_%04x:%02x:%02x:%02x", + sprintf(type, "bnxt_hwrm_short_" PCI_PRI_FMT, bp->pdev->addr.domain, bp->pdev->addr.bus, bp->pdev->addr.devid, bp->pdev->addr.function); @@ -1169,10 +1176,17 @@ int bnxt_hwrm_ver_get(struct bnxt *bp, uint32_t timeout) PMD_DRV_LOG(DEBUG, "FW supports Trusted VFs\n"); if (dev_caps_cfg & HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_CFA_ADV_FLOW_MGNT_SUPPORTED) { - bp->flags |= BNXT_FLAG_ADV_FLOW_MGMT; + bp->fw_cap |= BNXT_FW_CAP_ADV_FLOW_MGMT; PMD_DRV_LOG(DEBUG, "FW supports advanced flow management\n"); } + if (dev_caps_cfg & + HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_ADV_FLOW_COUNTERS_SUPPORTED) { + PMD_DRV_LOG(DEBUG, "FW supports advanced flow counters\n"); + bp->fw_cap |= BNXT_FW_CAP_ADV_FLOW_COUNTERS; + } + + error: HWRM_UNLOCK(); return rc; @@ -2261,7 +2275,8 @@ int bnxt_hwrm_func_qstats_tx_drop(struct bnxt *bp, uint16_t fid, } int bnxt_hwrm_func_qstats(struct bnxt *bp, uint16_t fid, - struct rte_eth_stats *stats) + struct rte_eth_stats *stats, + struct hwrm_func_qstats_output *func_qstats) { int rc = 0; struct hwrm_func_qstats_input req = {.req_type = 0}; @@ -2274,6 +2289,12 @@ int bnxt_hwrm_func_qstats(struct bnxt *bp, uint16_t fid, rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB); HWRM_CHECK_RESULT(); + if (func_qstats) + memcpy(func_qstats, resp, + sizeof(struct hwrm_func_qstats_output)); + + if (!stats) + goto exit; stats->ipackets = rte_le_to_cpu_64(resp->rx_ucast_pkts); stats->ipackets += rte_le_to_cpu_64(resp->rx_mcast_pkts); @@ -2293,6 +2314,7 @@ int bnxt_hwrm_func_qstats(struct bnxt *bp, uint16_t fid, stats->ierrors = rte_le_to_cpu_64(resp->rx_drop_pkts); stats->oerrors = rte_le_to_cpu_64(resp->tx_discard_pkts); +exit: HWRM_UNLOCK(); return rc; @@ -2455,13 +2477,6 @@ void bnxt_free_hwrm_rx_ring(struct bnxt *bp, int queue_index) if (BNXT_HAS_RING_GRPS(bp)) bp->grp_info[queue_index].rx_fw_ring_id = INVALID_HW_RING_ID; - memset(rxr->rx_desc_ring, 0, - rxr->rx_ring_struct->ring_size * - sizeof(*rxr->rx_desc_ring)); - memset(rxr->rx_buf_ring, 0, - rxr->rx_ring_struct->ring_size * - sizeof(*rxr->rx_buf_ring)); - rxr->rx_prod = 0; } ring = rxr->ag_ring_struct; if (ring->fw_ring_id != INVALID_HW_RING_ID) { @@ -2469,11 +2484,6 @@ void bnxt_free_hwrm_rx_ring(struct bnxt *bp, int queue_index) BNXT_CHIP_THOR(bp) ? HWRM_RING_FREE_INPUT_RING_TYPE_RX_AGG : HWRM_RING_FREE_INPUT_RING_TYPE_RX); - ring->fw_ring_id = INVALID_HW_RING_ID; - memset(rxr->ag_buf_ring, 0, - rxr->ag_ring_struct->ring_size * - sizeof(*rxr->ag_buf_ring)); - rxr->ag_prod = 0; if (BNXT_HAS_RING_GRPS(bp)) bp->grp_info[queue_index].ag_fw_ring_id = INVALID_HW_RING_ID; @@ -2557,7 +2567,7 @@ int bnxt_alloc_hwrm_resources(struct bnxt *bp) struct rte_pci_device *pdev = bp->pdev; char type[RTE_MEMZONE_NAMESIZE]; - sprintf(type, "bnxt_hwrm_%04x:%02x:%02x:%02x", pdev->addr.domain, + sprintf(type, "bnxt_hwrm_" PCI_PRI_FMT, pdev->addr.domain, pdev->addr.bus, pdev->addr.devid, pdev->addr.function); bp->max_resp_len = HWRM_MAX_RESP_LEN; bp->hwrm_cmd_resp_addr = rte_malloc(type, bp->max_resp_len, 0); @@ -2753,6 +2763,10 @@ static uint16_t bnxt_parse_eth_link_speed(uint32_t conf_link_speed) eth_link_speed = HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB; break; + case ETH_LINK_SPEED_200G: + eth_link_speed = + HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_200GB; + break; default: PMD_DRV_LOG(ERR, "Unsupported link speed %d; default to AUTO\n", @@ -2765,7 +2779,8 @@ static uint16_t bnxt_parse_eth_link_speed(uint32_t conf_link_speed) #define BNXT_SUPPORTED_SPEEDS (ETH_LINK_SPEED_100M | ETH_LINK_SPEED_100M_HD | \ ETH_LINK_SPEED_1G | ETH_LINK_SPEED_2_5G | \ ETH_LINK_SPEED_10G | ETH_LINK_SPEED_20G | ETH_LINK_SPEED_25G | \ - ETH_LINK_SPEED_40G | ETH_LINK_SPEED_50G | ETH_LINK_SPEED_100G) + ETH_LINK_SPEED_40G | ETH_LINK_SPEED_50G | \ + ETH_LINK_SPEED_100G | ETH_LINK_SPEED_200G) static int bnxt_valid_link_speed(uint32_t link_speed, uint16_t port_id) { @@ -2831,6 +2846,8 @@ bnxt_parse_eth_link_speed_mask(struct bnxt *bp, uint32_t link_speed) ret |= HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB; if (link_speed & ETH_LINK_SPEED_100G) ret |= HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100GB; + if (link_speed & ETH_LINK_SPEED_200G) + ret |= HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_200GB; return ret; } @@ -2866,6 +2883,9 @@ static uint32_t bnxt_parse_hw_link_speed(uint16_t hw_link_speed) case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100GB: eth_link_speed = ETH_SPEED_NUM_100G; break; + case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_200GB: + eth_link_speed = ETH_SPEED_NUM_200G; + break; case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2GB: default: PMD_DRV_LOG(ERR, "HWRM link speed %d not defined\n", @@ -3010,6 +3030,8 @@ int bnxt_hwrm_func_qcfg(struct bnxt *bp, uint16_t *mtu) struct hwrm_func_qcfg_output *resp = bp->hwrm_cmd_resp_addr; uint16_t flags; int rc = 0; + bp->func_svif = BNXT_SVIF_INVALID; + uint16_t svif_info; HWRM_PREP(&req, HWRM_FUNC_QCFG, BNXT_USE_CHIMP_MB); req.fid = rte_cpu_to_le_16(0xffff); @@ -3020,6 +3042,12 @@ int bnxt_hwrm_func_qcfg(struct bnxt *bp, uint16_t *mtu) /* Hard Coded.. 0xfff VLAN ID mask */ bp->vlan = rte_le_to_cpu_16(resp->vlan) & 0xfff; + + svif_info = rte_le_to_cpu_16(resp->svif_info); + if (svif_info & HWRM_FUNC_QCFG_OUTPUT_SVIF_INFO_SVIF_VALID) + bp->func_svif = svif_info & + HWRM_FUNC_QCFG_OUTPUT_SVIF_INFO_SVIF_MASK; + flags = rte_le_to_cpu_16(resp->flags); if (BNXT_PF(bp) && (flags & HWRM_FUNC_QCFG_OUTPUT_FLAGS_MULTI_HOST)) bp->flags |= BNXT_FLAG_MULTI_HOST; @@ -3056,6 +3084,35 @@ int bnxt_hwrm_func_qcfg(struct bnxt *bp, uint16_t *mtu) return rc; } +int bnxt_hwrm_port_mac_qcfg(struct bnxt *bp) +{ + struct hwrm_port_mac_qcfg_input req = {0}; + struct hwrm_port_mac_qcfg_output *resp = bp->hwrm_cmd_resp_addr; + uint16_t port_svif_info; + int rc; + + bp->port_svif = BNXT_SVIF_INVALID; + + if (!BNXT_PF(bp)) + return 0; + + HWRM_PREP(&req, HWRM_PORT_MAC_QCFG, BNXT_USE_CHIMP_MB); + + rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB); + + HWRM_CHECK_RESULT(); + + port_svif_info = rte_le_to_cpu_16(resp->port_svif_info); + if (port_svif_info & + HWRM_PORT_MAC_QCFG_OUTPUT_PORT_SVIF_INFO_PORT_SVIF_VALID) + bp->port_svif = port_svif_info & + HWRM_PORT_MAC_QCFG_OUTPUT_PORT_SVIF_INFO_PORT_SVIF_MASK; + + HWRM_UNLOCK(); + + return 0; +} + static void copy_func_cfg_to_qcaps(struct hwrm_func_cfg_input *fcfg, struct hwrm_func_qcaps_output *qcaps) { @@ -3843,17 +3900,17 @@ int bnxt_hwrm_port_led_qcaps(struct bnxt *bp) if (resp->num_leds > 0 && resp->num_leds < BNXT_MAX_LED) { unsigned int i; - bp->num_leds = resp->num_leds; + bp->leds->num_leds = resp->num_leds; memcpy(bp->leds, &resp->led0_id, - sizeof(bp->leds[0]) * bp->num_leds); - for (i = 0; i < bp->num_leds; i++) { + sizeof(bp->leds[0]) * bp->leds->num_leds); + for (i = 0; i < bp->leds->num_leds; i++) { struct bnxt_led_info *led = &bp->leds[i]; uint16_t caps = led->led_state_caps; if (!led->led_group_id || !BNXT_LED_ALT_BLINK_CAP(caps)) { - bp->num_leds = 0; + bp->leds->num_leds = 0; break; } } @@ -3873,7 +3930,7 @@ int bnxt_hwrm_port_led_cfg(struct bnxt *bp, bool led_on) uint16_t duration = 0; int rc, i; - if (!bp->num_leds || BNXT_VF(bp)) + if (!bp->leds->num_leds || BNXT_VF(bp)) return -EOPNOTSUPP; HWRM_PREP(&req, HWRM_PORT_LED_CFG, BNXT_USE_CHIMP_MB); @@ -3883,9 +3940,9 @@ int bnxt_hwrm_port_led_cfg(struct bnxt *bp, bool led_on) duration = rte_cpu_to_le_16(500); } req.port_id = bp->pf.port_id; - req.num_leds = bp->num_leds; + req.num_leds = bp->leds->num_leds; led_cfg = (struct bnxt_led_cfg *)&req.led0_id; - for (i = 0; i < bp->num_leds; i++, led_cfg++) { + for (i = 0; i < bp->leds->num_leds; i++, led_cfg++) { req.enables |= BNXT_LED_DFLT_ENABLES(i); led_cfg->led_id = bp->leds[i].led_id; led_cfg->led_state = led_state; @@ -4648,7 +4705,7 @@ int bnxt_hwrm_func_backing_store_qcaps(struct bnxt *bp) struct bnxt_ctx_pg_info *ctx_pg; struct bnxt_ctx_mem_info *ctx; int total_alloc_len; - int rc, i; + int rc, i, tqm_rings; if (!BNXT_CHIP_THOR(bp) || bp->hwrm_spec_code < HWRM_VERSION_1_9_2 || @@ -4668,17 +4725,6 @@ int bnxt_hwrm_func_backing_store_qcaps(struct bnxt *bp) goto ctx_err; } - ctx_pg = rte_malloc("bnxt_ctx_pg_mem", - sizeof(*ctx_pg) * BNXT_MAX_Q, - RTE_CACHE_LINE_SIZE); - if (!ctx_pg) { - rc = -ENOMEM; - goto ctx_err; - } - for (i = 0; i < BNXT_MAX_Q; i++, ctx_pg++) - ctx->tqm_mem[i] = ctx_pg; - - bp->ctx = ctx; ctx->qp_max_entries = rte_le_to_cpu_32(resp->qp_max_entries); ctx->qp_min_qp1_entries = rte_le_to_cpu_16(resp->qp_min_qp1_entries); @@ -4714,6 +4760,24 @@ int bnxt_hwrm_func_backing_store_qcaps(struct bnxt *bp) ctx->mrav_entry_size = rte_le_to_cpu_16(resp->mrav_entry_size); ctx->tim_entry_size = rte_le_to_cpu_16(resp->tim_entry_size); ctx->tim_max_entries = rte_le_to_cpu_32(resp->tim_max_entries); + ctx->tqm_fp_rings_count = resp->tqm_fp_rings_count; + + if (!ctx->tqm_fp_rings_count) + ctx->tqm_fp_rings_count = bp->max_q; + + tqm_rings = ctx->tqm_fp_rings_count + 1; + + ctx_pg = rte_malloc("bnxt_ctx_pg_mem", + sizeof(*ctx_pg) * tqm_rings, + RTE_CACHE_LINE_SIZE); + if (!ctx_pg) { + rc = -ENOMEM; + goto ctx_err; + } + for (i = 0; i < tqm_rings; i++, ctx_pg++) + ctx->tqm_mem[i] = ctx_pg; + + bp->ctx = ctx; ctx_err: HWRM_UNLOCK(); return rc; @@ -5021,16 +5085,6 @@ int bnxt_hwrm_error_recovery_qcfg(struct bnxt *bp) if (!(bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY)) return 0; - if (!info) { - info = rte_zmalloc("bnxt_hwrm_error_recovery_qcfg", - sizeof(*info), 0); - bp->recovery_info = info; - if (info == NULL) - return -ENOMEM; - } else { - memset(info, 0, sizeof(*info)); - } - HWRM_PREP(&req, HWRM_ERROR_RECOVERY_QCFG, BNXT_USE_CHIMP_MB); rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB); @@ -5174,7 +5228,7 @@ int bnxt_hwrm_cfa_adv_flow_mgmt_qcaps(struct bnxt *bp) uint32_t flags = 0; int rc = 0; - if (!(bp->flags & BNXT_FLAG_ADV_FLOW_MGMT)) + if (!(bp->fw_cap & BNXT_FW_CAP_ADV_FLOW_MGMT)) return rc; if (!(BNXT_PF(bp) || BNXT_VF_IS_TRUSTED(bp))) { @@ -5197,3 +5251,158 @@ int bnxt_hwrm_cfa_adv_flow_mgmt_qcaps(struct bnxt *bp) return rc; } + +int bnxt_hwrm_cfa_counter_qcaps(struct bnxt *bp, uint16_t *max_fc) +{ + int rc = 0; + + struct hwrm_cfa_counter_qcaps_input req = {0}; + struct hwrm_cfa_counter_qcaps_output *resp = bp->hwrm_cmd_resp_addr; + + if (!(BNXT_PF(bp) || BNXT_VF_IS_TRUSTED(bp))) { + PMD_DRV_LOG(DEBUG, + "Not a PF or trusted VF. Command not supported\n"); + return 0; + } + + HWRM_PREP(&req, HWRM_CFA_COUNTER_QCAPS, BNXT_USE_KONG(bp)); + req.target_id = rte_cpu_to_le_16(bp->fw_fid); + rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_KONG(bp)); + + HWRM_CHECK_RESULT(); + if (max_fc) + *max_fc = rte_le_to_cpu_16(resp->max_rx_fc); + HWRM_UNLOCK(); + + return 0; +} + +int bnxt_hwrm_ctx_rgtr(struct bnxt *bp, rte_iova_t dma_addr, uint16_t *ctx_id) +{ + int rc = 0; + struct hwrm_cfa_ctx_mem_rgtr_input req = {.req_type = 0 }; + struct hwrm_cfa_ctx_mem_rgtr_output *resp = bp->hwrm_cmd_resp_addr; + + if (!(BNXT_PF(bp) || BNXT_VF_IS_TRUSTED(bp))) { + PMD_DRV_LOG(DEBUG, + "Not a PF or trusted VF. Command not supported\n"); + return 0; + } + + HWRM_PREP(&req, HWRM_CFA_CTX_MEM_RGTR, BNXT_USE_KONG(bp)); + + req.page_level = HWRM_CFA_CTX_MEM_RGTR_INPUT_PAGE_LEVEL_LVL_0; + req.page_size = HWRM_CFA_CTX_MEM_RGTR_INPUT_PAGE_SIZE_2M; + req.page_dir = rte_cpu_to_le_64(dma_addr); + + rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_KONG(bp)); + + HWRM_CHECK_RESULT(); + if (ctx_id) { + *ctx_id = rte_le_to_cpu_16(resp->ctx_id); + PMD_DRV_LOG(DEBUG, "ctx_id = %d\n", *ctx_id); + } + HWRM_UNLOCK(); + + return 0; +} + +int bnxt_hwrm_ctx_unrgtr(struct bnxt *bp, uint16_t ctx_id) +{ + int rc = 0; + struct hwrm_cfa_ctx_mem_unrgtr_input req = {.req_type = 0 }; + struct hwrm_cfa_ctx_mem_unrgtr_output *resp = bp->hwrm_cmd_resp_addr; + + if (!(BNXT_PF(bp) || BNXT_VF_IS_TRUSTED(bp))) { + PMD_DRV_LOG(DEBUG, + "Not a PF or trusted VF. Command not supported\n"); + return 0; + } + + HWRM_PREP(&req, HWRM_CFA_CTX_MEM_UNRGTR, BNXT_USE_KONG(bp)); + + req.ctx_id = rte_cpu_to_le_16(ctx_id); + + rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_KONG(bp)); + + HWRM_CHECK_RESULT(); + HWRM_UNLOCK(); + + return rc; +} + +int bnxt_hwrm_cfa_counter_cfg(struct bnxt *bp, enum bnxt_flow_dir dir, + uint16_t cntr, uint16_t ctx_id, + uint32_t num_entries, bool enable) +{ + struct hwrm_cfa_counter_cfg_input req = {0}; + struct hwrm_cfa_counter_cfg_output *resp = bp->hwrm_cmd_resp_addr; + uint16_t flags = 0; + int rc; + + if (!(BNXT_PF(bp) || BNXT_VF_IS_TRUSTED(bp))) { + PMD_DRV_LOG(DEBUG, + "Not a PF or trusted VF. Command not supported\n"); + return 0; + } + + HWRM_PREP(&req, HWRM_CFA_COUNTER_CFG, BNXT_USE_KONG(bp)); + + req.target_id = rte_cpu_to_le_16(bp->fw_fid); + req.counter_type = rte_cpu_to_le_16(cntr); + flags = enable ? HWRM_CFA_COUNTER_CFG_INPUT_FLAGS_CFG_MODE_ENABLE : + HWRM_CFA_COUNTER_CFG_INPUT_FLAGS_CFG_MODE_DISABLE; + flags |= HWRM_CFA_COUNTER_CFG_INPUT_FLAGS_DATA_TRANSFER_MODE_PULL; + if (dir == BNXT_DIR_RX) + flags |= HWRM_CFA_COUNTER_CFG_INPUT_FLAGS_PATH_RX; + else if (dir == BNXT_DIR_TX) + flags |= HWRM_CFA_COUNTER_CFG_INPUT_FLAGS_PATH_TX; + req.flags = rte_cpu_to_le_16(flags); + req.ctx_id = rte_cpu_to_le_16(ctx_id); + req.num_entries = rte_cpu_to_le_32(num_entries); + + rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_KONG(bp)); + HWRM_CHECK_RESULT(); + HWRM_UNLOCK(); + + return 0; +} + +int bnxt_hwrm_cfa_counter_qstats(struct bnxt *bp, + enum bnxt_flow_dir dir, + uint16_t cntr, + uint16_t num_entries) +{ + struct hwrm_cfa_counter_qstats_output *resp = bp->hwrm_cmd_resp_addr; + struct hwrm_cfa_counter_qstats_input req = {0}; + uint16_t flow_ctx_id = 0; + uint16_t flags = 0; + int rc = 0; + + if (!(BNXT_PF(bp) || BNXT_VF_IS_TRUSTED(bp))) { + PMD_DRV_LOG(DEBUG, + "Not a PF or trusted VF. Command not supported\n"); + return 0; + } + + if (dir == BNXT_DIR_RX) { + flow_ctx_id = bp->flow_stat->rx_fc_in_tbl.ctx_id; + flags = HWRM_CFA_COUNTER_QSTATS_INPUT_FLAGS_PATH_RX; + } else if (dir == BNXT_DIR_TX) { + flow_ctx_id = bp->flow_stat->tx_fc_in_tbl.ctx_id; + flags = HWRM_CFA_COUNTER_QSTATS_INPUT_FLAGS_PATH_TX; + } + + HWRM_PREP(&req, HWRM_CFA_COUNTER_QSTATS, BNXT_USE_KONG(bp)); + req.target_id = rte_cpu_to_le_16(bp->fw_fid); + req.counter_type = rte_cpu_to_le_16(cntr); + req.input_flow_ctx_id = rte_cpu_to_le_16(flow_ctx_id); + req.num_entries = rte_cpu_to_le_16(num_entries); + req.flags = rte_cpu_to_le_16(flags); + rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_KONG(bp)); + + HWRM_CHECK_RESULT(); + HWRM_UNLOCK(); + + return 0; +}