X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fbnxt%2Fbnxt_rxr.h;h=250033690706421fd645d68ab841a519a98d54af;hb=4b029f02de3a0ce9cdd9a3475b84ca2e42d74281;hp=76bf88d707bffb2b7d5b28fc41835a565edb2b80;hpb=b150a7e7ee66e6ac4c8d96edb614a920f3198900;p=dpdk.git

diff --git a/drivers/net/bnxt/bnxt_rxr.h b/drivers/net/bnxt/bnxt_rxr.h
index 76bf88d707..2500336907 100644
--- a/drivers/net/bnxt/bnxt_rxr.h
+++ b/drivers/net/bnxt/bnxt_rxr.h
@@ -167,6 +167,9 @@ static inline uint16_t bnxt_tpa_start_agg_id(struct bnxt *bp,
 
 #define BNXT_RX_POST_THRESH	32
 
+/* Number of descriptors to process per inner loop in vector mode. */
+#define RTE_BNXT_DESCS_PER_LOOP		4U
+
 enum pkt_hash_types {
 	PKT_HASH_TYPE_NONE,	/* Undefined type */
 	PKT_HASH_TYPE_L2,	/* Input: src_MAC, dest_MAC */
@@ -181,20 +184,17 @@ struct bnxt_tpa_info {
 	struct rx_tpa_v2_abuf_cmpl	agg_arr[TPA_MAX_NUM_SEGS];
 };
 
-struct bnxt_sw_rx_bd {
-	struct rte_mbuf		*mbuf; /* data associated with RX descriptor */
-};
-
 struct bnxt_rx_ring_info {
 	uint16_t		rx_prod;
 	uint16_t		ag_prod;
+	uint16_t                rx_cons; /* Needed for representor */
 	struct bnxt_db_info     rx_db;
 	struct bnxt_db_info     ag_db;
 
 	struct rx_prod_pkt_bd	*rx_desc_ring;
 	struct rx_prod_pkt_bd	*ag_desc_ring;
-	struct bnxt_sw_rx_bd	*rx_buf_ring; /* sw ring */
-	struct bnxt_sw_rx_bd	*ag_buf_ring; /* sw ring */
+	struct rte_mbuf		**rx_buf_ring; /* sw ring */
+	struct rte_mbuf		**ag_buf_ring; /* sw ring */
 
 	rte_iova_t		rx_desc_mapping;
 	rte_iova_t		ag_desc_mapping;
@@ -220,10 +220,33 @@ int bnxt_init_one_rx_ring(struct bnxt_rx_queue *rxq);
 int bnxt_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
 int bnxt_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
 
-#ifdef RTE_ARCH_X86
+#if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)
 uint16_t bnxt_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
 			    uint16_t nb_pkts);
 int bnxt_rxq_vec_setup(struct bnxt_rx_queue *rxq);
 #endif
 
+void bnxt_set_mark_in_mbuf(struct bnxt *bp,
+			   struct rx_pkt_cmpl_hi *rxcmp1,
+			   struct rte_mbuf *mbuf);
+
+#define BNXT_RX_META_CFA_CODE_SHIFT		19
+#define BNXT_CFA_CODE_META_SHIFT		16
+#define BNXT_RX_META_CFA_CODE_INT_ACT_REC_BIT	0x8000000
+#define BNXT_RX_META_CFA_CODE_EEM_BIT		0x4000000
+#define BNXT_CFA_META_FMT_MASK			0x70
+#define BNXT_CFA_META_FMT_SHFT			4
+#define BNXT_CFA_META_FMT_EM_EEM_SHFT		1
+#define BNXT_CFA_META_FMT_EEM			3
+#define BNXT_CFA_META_EEM_TCAM_SHIFT		31
+#define BNXT_CFA_META_EM_TEST(x) ((x) >> BNXT_CFA_META_EEM_TCAM_SHIFT)
+
+#define BNXT_PTYPE_TBL_DIM	128
+extern uint32_t bnxt_ptype_table[BNXT_PTYPE_TBL_DIM];
+
+#define BNXT_OL_FLAGS_TBL_DIM	32
+extern uint32_t bnxt_ol_flags_table[BNXT_OL_FLAGS_TBL_DIM];
+
+#define BNXT_OL_FLAGS_ERR_TBL_DIM 16
+extern uint32_t bnxt_ol_flags_err_table[BNXT_OL_FLAGS_ERR_TBL_DIM];
 #endif