X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fbnxt%2Fbnxt_rxr.h;h=3fc901fdf0ca87ac9b7ec5220197337ecb7ddc88;hb=d424af43e6c32aec83be8f1380271ff33ed0b89a;hp=3815a219910856eb22aa3aceebb31cccb12e0181;hpb=637e34befd9cf51999ef01387b831abdd643589c;p=dpdk.git

diff --git a/drivers/net/bnxt/bnxt_rxr.h b/drivers/net/bnxt/bnxt_rxr.h
index 3815a21991..3fc901fdf0 100644
--- a/drivers/net/bnxt/bnxt_rxr.h
+++ b/drivers/net/bnxt/bnxt_rxr.h
@@ -5,89 +5,61 @@
 
 #ifndef _BNXT_RXR_H_
 #define _BNXT_RXR_H_
+#include "hsi_struct_def_dpdk.h"
 
-#define B_RX_DB(db, prod)						\
-		(*(uint32_t *)db = (DB_KEY_RX | prod))
+#define BNXT_TPA_START_AGG_ID_PRE_TH(cmp) \
+	((rte_le_to_cpu_16((cmp)->agg_id) & RX_TPA_START_CMPL_AGG_ID_MASK) >> \
+	 RX_TPA_START_CMPL_AGG_ID_SFT)
 
-#define BNXT_TPA_L4_SIZE(x)	\
-	{ \
-		typeof(x) hdr_info = (x); \
-		(((hdr_info) & 0xf8000000) ? ((hdr_info) >> 27) : 32) \
-	}
+#define BNXT_TPA_START_AGG_ID_TH(cmp) \
+	rte_le_to_cpu_16((cmp)->agg_id)
 
-#define BNXT_TPA_INNER_L3_OFF(hdr_info)	\
-	(((hdr_info) >> 18) & 0x1ff)
+static inline uint16_t bnxt_tpa_start_agg_id(struct bnxt *bp,
+					     struct rx_tpa_start_cmpl *cmp)
+{
+	if (BNXT_CHIP_THOR(bp))
+		return BNXT_TPA_START_AGG_ID_TH(cmp);
+	else
+		return BNXT_TPA_START_AGG_ID_PRE_TH(cmp);
+}
 
-#define BNXT_TPA_INNER_L2_OFF(hdr_info)	\
-	(((hdr_info) >> 9) & 0x1ff)
+#define BNXT_TPA_END_AGG_BUFS(cmp) \
+	(((cmp)->agg_bufs_v1 & RX_TPA_END_CMPL_AGG_BUFS_MASK) \
+	 >> RX_TPA_END_CMPL_AGG_BUFS_SFT)
 
-#define BNXT_TPA_OUTER_L3_OFF(hdr_info)	\
-	((hdr_info) & 0x1ff)
+#define BNXT_TPA_END_AGG_BUFS_TH(cmp) \
+	((cmp)->tpa_agg_bufs)
 
-#define RX_CMP_L4_CS_BITS	\
-	rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_L4_CS_CALC | \
-			 RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC)
+#define BNXT_TPA_END_AGG_ID(cmp) \
+	(((cmp)->agg_id & RX_TPA_END_CMPL_AGG_ID_MASK) >> \
+	 RX_TPA_END_CMPL_AGG_ID_SFT)
 
-#define RX_CMP_L4_CS_ERR_BITS	\
-	rte_cpu_to_le_32(RX_PKT_CMPL_ERRORS_L4_CS_ERROR | \
-			 RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR)
-
-#define RX_CMP_L4_CS_OK(rxcmp1)						\
-	    (((rxcmp1)->flags2 & RX_CMP_L4_CS_BITS) &&		\
-	     !((rxcmp1)->errors_v2 & RX_CMP_L4_CS_ERR_BITS))
-
-#define RX_CMP_L4_CS_UNKNOWN(rxcmp1)					\
-	    !((rxcmp1)->flags2 & RX_CMP_L4_CS_BITS)
-
-#define RX_CMP_IP_CS_ERR_BITS	\
-	rte_cpu_to_le_32(RX_PKT_CMPL_ERRORS_IP_CS_ERROR | \
-			 RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR)
-
-#define RX_CMP_IP_CS_BITS	\
-	rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_IP_CS_CALC | \
-			 RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC)
-
-#define RX_CMP_IP_CS_OK(rxcmp1)						\
-		(((rxcmp1)->flags2 & RX_CMP_IP_CS_BITS) &&	\
-		!((rxcmp1)->errors_v2 & RX_CMP_IP_CS_ERR_BITS))
-
-#define RX_CMP_IP_CS_UNKNOWN(rxcmp1)					\
-		!((rxcmp1)->flags2 & RX_CMP_IP_CS_BITS)
+#define BNXT_TPA_END_AGG_ID_TH(cmp) \
+	rte_le_to_cpu_16((cmp)->agg_id)
 
 #define BNXT_RX_POST_THRESH	32
 
-enum pkt_hash_types {
-	PKT_HASH_TYPE_NONE,	/* Undefined type */
-	PKT_HASH_TYPE_L2,	/* Input: src_MAC, dest_MAC */
-	PKT_HASH_TYPE_L3,	/* Input: src_IP, dst_IP */
-	PKT_HASH_TYPE_L4,	/* Input: src_IP, dst_IP, src_port, dst_port */
-};
+/* Number of descriptors to process per inner loop in vector mode. */
+#define RTE_BNXT_DESCS_PER_LOOP		4U
 
 struct bnxt_tpa_info {
-	struct rte_mbuf		*mbuf;
+	struct rte_mbuf			*mbuf;
 	uint16_t			len;
-	unsigned short		gso_type;
-	uint32_t			flags2;
-	uint32_t			metadata;
-	enum pkt_hash_types	hash_type;
-	uint32_t			rss_hash;
-	uint32_t			hdr_info;
-};
-
-struct bnxt_sw_rx_bd {
-	struct rte_mbuf		*mbuf; /* data associated with RX descriptor */
+	uint32_t			agg_count;
+	struct rx_tpa_v2_abuf_cmpl	agg_arr[TPA_MAX_NUM_SEGS];
 };
 
 struct bnxt_rx_ring_info {
 	uint16_t		rx_prod;
 	uint16_t		ag_prod;
-	void			*rx_doorbell;
-	void			*ag_doorbell;
+	uint16_t                rx_cons; /* Needed for representor */
+	struct bnxt_db_info     rx_db;
+	struct bnxt_db_info     ag_db;
 
 	struct rx_prod_pkt_bd	*rx_desc_ring;
 	struct rx_prod_pkt_bd	*ag_desc_ring;
-	struct bnxt_sw_rx_bd	*rx_buf_ring; /* sw ring */
-	struct bnxt_sw_rx_bd	*ag_buf_ring; /* sw ring */
+	struct rte_mbuf		**rx_buf_ring; /* sw ring */
+	struct rte_mbuf		**ag_buf_ring; /* sw ring */
 
 	rte_iova_t		rx_desc_mapping;
 	rte_iova_t		ag_desc_mapping;
@@ -110,4 +82,44 @@ int bnxt_init_rx_ring_struct(struct bnxt_rx_queue *rxq, unsigned int socket_id);
 int bnxt_init_one_rx_ring(struct bnxt_rx_queue *rxq);
 int bnxt_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
 int bnxt_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
+
+#if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)
+uint16_t bnxt_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
+			    uint16_t nb_pkts);
+int bnxt_rxq_vec_setup(struct bnxt_rx_queue *rxq);
+#endif
+
+void bnxt_set_mark_in_mbuf(struct bnxt *bp,
+			   struct rx_pkt_cmpl_hi *rxcmp1,
+			   struct rte_mbuf *mbuf);
+
+typedef uint32_t bnxt_cfa_code_dynfield_t;
+extern int bnxt_cfa_code_dynfield_offset;
+
+static inline bnxt_cfa_code_dynfield_t *
+bnxt_cfa_code_dynfield(struct rte_mbuf *mbuf)
+{
+	return RTE_MBUF_DYNFIELD(mbuf,
+		bnxt_cfa_code_dynfield_offset, bnxt_cfa_code_dynfield_t *);
+}
+
+#define BNXT_RX_META_CFA_CODE_SHIFT		19
+#define BNXT_CFA_CODE_META_SHIFT		16
+#define BNXT_RX_META_CFA_CODE_INT_ACT_REC_BIT	0x8000000
+#define BNXT_RX_META_CFA_CODE_EEM_BIT		0x4000000
+#define BNXT_CFA_META_FMT_MASK			0x70
+#define BNXT_CFA_META_FMT_SHFT			4
+#define BNXT_CFA_META_FMT_EM_EEM_SHFT		1
+#define BNXT_CFA_META_FMT_EEM			3
+#define BNXT_CFA_META_EEM_TCAM_SHIFT		31
+#define BNXT_CFA_META_EM_TEST(x) ((x) >> BNXT_CFA_META_EEM_TCAM_SHIFT)
+
+#define BNXT_PTYPE_TBL_DIM	128
+extern uint32_t bnxt_ptype_table[BNXT_PTYPE_TBL_DIM];
+
+#define BNXT_OL_FLAGS_TBL_DIM	32
+extern uint32_t bnxt_ol_flags_table[BNXT_OL_FLAGS_TBL_DIM];
+
+#define BNXT_OL_FLAGS_ERR_TBL_DIM 16
+extern uint32_t bnxt_ol_flags_err_table[BNXT_OL_FLAGS_ERR_TBL_DIM];
 #endif