X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fbnxt%2Fbnxt_txq.h;h=42d37f7c7ffc6c62fc5e131f697a14d5750a4e0e;hb=3127f99274b679124658afdbfc49210730c50617;hp=a1ab3f39af5533dddad65341ed4c112108eb059f;hpb=1e18ec58ed5c142d3ff37324c88a32d03abf9ec9;p=dpdk.git

diff --git a/drivers/net/bnxt/bnxt_txq.h b/drivers/net/bnxt/bnxt_txq.h
index a1ab3f39af..42d37f7c7f 100644
--- a/drivers/net/bnxt/bnxt_txq.h
+++ b/drivers/net/bnxt/bnxt_txq.h
@@ -6,30 +6,25 @@
 #ifndef _BNXT_TXQ_H_
 #define _BNXT_TXQ_H_
 
+/* Maximum transmit burst for vector mode.  */
+#define RTE_BNXT_MAX_TX_BURST		64U
+
 struct bnxt_tx_ring_info;
 struct bnxt_cp_ring_info;
 struct bnxt_tx_queue {
 	uint16_t		nb_tx_desc;    /* number of TX descriptors */
 	uint16_t		tx_free_thresh;/* minimum TX before freeing */
-	/** Index to last TX descriptor to have been cleaned. */
-	uint16_t		last_desc_cleaned;
-	/** Total number of TX descriptors ready to be allocated. */
-	uint16_t		tx_next_dd; /* next desc to scan for DD bit */
-	uint16_t		tx_next_rs; /* next desc to set RS bit */
 	uint16_t		queue_id; /* TX queue index */
-	uint16_t		reg_idx; /* TX queue register index */
 	uint16_t		port_id; /* Device port identifier */
 	uint8_t			pthresh; /* Prefetch threshold register */
 	uint8_t			hthresh; /* Host threshold register */
 	uint8_t			wthresh; /* Write-back threshold reg */
-	uint32_t		ctx_curr; /* Hardware context states */
 	uint8_t			tx_deferred_start; /* not in global dev start */
 	uint8_t			tx_started; /* TX queue is started */
 
 	struct bnxt		*bp;
 	int			index;
 	int			tx_wake_thresh;
-	uint32_t                tx_cfa_action;
 	uint32_t		vfr_tx_cfa_action;
 	struct bnxt_tx_ring_info	*tx_ring;
 
@@ -37,6 +32,7 @@ struct bnxt_tx_queue {
 	struct bnxt_cp_ring_info	*cp_ring;
 	const struct rte_memzone *mz;
 	struct rte_mbuf **free;
+	uint64_t offloads;
 };
 
 void bnxt_free_txq_stats(struct bnxt_tx_queue *txq);