X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fbnxt%2Fbnxt_vnic.c;h=26253a7e17f2ebf862ce4fd078b2226fc60aeff8;hb=250e2ed8d85d038ce864052ebd6f9af51db40df2;hp=104342e13be084604a95006f0647acea7cbcd770;hpb=b7e5f647e24b52b3f6c73dd3be56f8907abedc70;p=dpdk.git

diff --git a/drivers/net/bnxt/bnxt_vnic.c b/drivers/net/bnxt/bnxt_vnic.c
index 104342e13b..26253a7e17 100644
--- a/drivers/net/bnxt/bnxt_vnic.c
+++ b/drivers/net/bnxt/bnxt_vnic.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2014-2018 Broadcom
+ * Copyright(c) 2014-2021 Broadcom
  * All rights reserved.
  */
 
@@ -16,7 +16,7 @@
  * VNIC Functions
  */
 
-void prandom_bytes(void *dest_ptr, size_t len)
+void bnxt_prandom_bytes(void *dest_ptr, size_t len)
 {
 	char *dest = (char *)dest_ptr;
 	uint64_t rb;
@@ -78,6 +78,9 @@ void bnxt_free_all_vnics(struct bnxt *bp)
 	struct bnxt_vnic_info *vnic;
 	unsigned int i;
 
+	if (bp->vnic_info == NULL)
+		return;
+
 	for (i = 0; i < bp->max_vnics; i++) {
 		vnic = &bp->vnic_info[i];
 		STAILQ_INSERT_TAIL(&bp->free_vnic_list, vnic, next);
@@ -126,8 +129,8 @@ int bnxt_alloc_vnic_attributes(struct bnxt *bp)
 	entry_length = HW_HASH_KEY_SIZE +
 		       BNXT_MAX_MC_ADDRS * RTE_ETHER_ADDR_LEN;
 
-	if (BNXT_CHIP_THOR(bp))
-		rss_table_size = BNXT_RSS_TBL_SIZE_THOR *
+	if (BNXT_CHIP_P5(bp))
+		rss_table_size = BNXT_RSS_TBL_SIZE_P5 *
 				 2 * sizeof(*vnic->rss_table);
 	else
 		rss_table_size = HW_HASH_INDEX_SIZE * sizeof(*vnic->rss_table);
@@ -136,13 +139,14 @@ int bnxt_alloc_vnic_attributes(struct bnxt *bp)
 
 	max_vnics = bp->max_vnics;
 	snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
-		 "bnxt_%04x:%02x:%02x:%02x_vnicattr", pdev->addr.domain,
+		 "bnxt_" PCI_PRI_FMT "_vnicattr", pdev->addr.domain,
 		 pdev->addr.bus, pdev->addr.devid, pdev->addr.function);
 	mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
 	mz = rte_memzone_lookup(mz_name);
 	if (!mz) {
 		mz = rte_memzone_reserve(mz_name,
-				entry_length * max_vnics, SOCKET_ID_ANY,
+				entry_length * max_vnics,
+				bp->eth_dev->device->numa_node,
 				RTE_MEMZONE_2MB |
 				RTE_MEMZONE_SIZE_HINT_ONLY |
 				RTE_MEMZONE_IOVA_CONTIG);
@@ -150,17 +154,6 @@ int bnxt_alloc_vnic_attributes(struct bnxt *bp)
 			return -ENOMEM;
 	}
 	mz_phys_addr = mz->iova;
-	if ((unsigned long)mz->addr == mz_phys_addr) {
-		PMD_DRV_LOG(DEBUG,
-			    "Memzone physical address same as virtual.\n");
-		PMD_DRV_LOG(DEBUG, "Using rte_mem_virt2iova()\n");
-		mz_phys_addr = rte_mem_virt2iova(mz->addr);
-		if (mz_phys_addr == RTE_BAD_IOVA) {
-			PMD_DRV_LOG(ERR,
-				    "unable to map to physical memory\n");
-			return -ENOMEM;
-		}
-	}
 
 	for (i = 0; i < max_vnics; i++) {
 		vnic = &bp->vnic_info[i];
@@ -180,7 +173,7 @@ int bnxt_alloc_vnic_attributes(struct bnxt *bp)
 				HW_HASH_KEY_SIZE);
 		vnic->mc_list_dma_addr = vnic->rss_hash_key_dma_addr +
 				HW_HASH_KEY_SIZE;
-		prandom_bytes(vnic->rss_hash_key, HW_HASH_KEY_SIZE);
+		bnxt_prandom_bytes(vnic->rss_hash_key, HW_HASH_KEY_SIZE);
 	}
 
 	return 0;
@@ -261,3 +254,69 @@ uint16_t bnxt_rte_to_hwrm_hash_types(uint64_t rte_type)
 
 	return hwrm_type;
 }
+
+int bnxt_rte_to_hwrm_hash_level(struct bnxt *bp, uint64_t hash_f, uint32_t lvl)
+{
+	uint32_t mode = HWRM_VNIC_RSS_CFG_INPUT_HASH_MODE_FLAGS_DEFAULT;
+	bool l3 = (hash_f & (ETH_RSS_IPV4 | ETH_RSS_IPV6));
+	bool l4 = (hash_f & (ETH_RSS_NONFRAG_IPV4_UDP |
+			     ETH_RSS_NONFRAG_IPV6_UDP |
+			     ETH_RSS_NONFRAG_IPV4_TCP |
+			     ETH_RSS_NONFRAG_IPV6_TCP));
+	bool l3_only = l3 && !l4;
+	bool l3_and_l4 = l3 && l4;
+
+	/* If FW has not advertised capability to configure outer/inner
+	 * RSS hashing , just log a message. HW will work in default RSS mode.
+	 */
+	if (!(bp->vnic_cap_flags & BNXT_VNIC_CAP_OUTER_RSS)) {
+		PMD_DRV_LOG(ERR, "RSS hash level cannot be configured\n");
+		return mode;
+	}
+
+	switch (lvl) {
+	case BNXT_RSS_LEVEL_INNERMOST:
+		if (l3_and_l4 || l4)
+			mode =
+			HWRM_VNIC_RSS_CFG_INPUT_HASH_MODE_FLAGS_INNERMOST_4;
+		else if (l3_only)
+			mode =
+			HWRM_VNIC_RSS_CFG_INPUT_HASH_MODE_FLAGS_INNERMOST_2;
+		break;
+	case BNXT_RSS_LEVEL_OUTERMOST:
+		if (l3_and_l4 || l4)
+			mode =
+			HWRM_VNIC_RSS_CFG_INPUT_HASH_MODE_FLAGS_OUTERMOST_4;
+		else if (l3_only)
+			mode =
+			HWRM_VNIC_RSS_CFG_INPUT_HASH_MODE_FLAGS_OUTERMOST_2;
+		break;
+	default:
+		mode = HWRM_VNIC_RSS_CFG_INPUT_HASH_MODE_FLAGS_DEFAULT;
+		break;
+	}
+
+	return mode;
+}
+
+uint64_t bnxt_hwrm_to_rte_rss_level(struct bnxt *bp, uint32_t mode)
+{
+	uint64_t rss_level = 0;
+
+	/* If FW has not advertised capability to configure inner/outer RSS
+	 * return default hash mode.
+	 */
+	if (!(bp->vnic_cap_flags & BNXT_VNIC_CAP_OUTER_RSS))
+		return ETH_RSS_LEVEL_PMD_DEFAULT;
+
+	if (mode == HWRM_VNIC_RSS_CFG_INPUT_HASH_MODE_FLAGS_OUTERMOST_2 ||
+	    mode == HWRM_VNIC_RSS_CFG_INPUT_HASH_MODE_FLAGS_OUTERMOST_4)
+		rss_level |= ETH_RSS_LEVEL_OUTERMOST;
+	else if (mode == HWRM_VNIC_RSS_CFG_INPUT_HASH_MODE_FLAGS_INNERMOST_2 ||
+		 mode == HWRM_VNIC_RSS_CFG_INPUT_HASH_MODE_FLAGS_INNERMOST_4)
+		rss_level |= ETH_RSS_LEVEL_INNERMOST;
+	else
+		rss_level |= ETH_RSS_LEVEL_PMD_DEFAULT;
+
+	return rss_level;
+}