X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fcnxk%2Fcnxk_ethdev.c;h=0311df373bfe6a46ecb1a55567a02c063c756858;hb=611c771c353458e33b34519a15801df756288c4b;hp=d4587f00ebdbe6cd90a3f9284f1612e636d8508b;hpb=89df2225c92c882ad8d6883be6efd507e4e77a54;p=dpdk.git

diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c
index d4587f00eb..0311df373b 100644
--- a/drivers/net/cnxk/cnxk_ethdev.c
+++ b/drivers/net/cnxk/cnxk_ethdev.c
@@ -37,6 +37,50 @@ nix_get_speed_capa(struct cnxk_eth_dev *dev)
 	return speed_capa;
 }
 
+static void
+nix_enable_mseg_on_jumbo(struct cnxk_eth_rxq_sp *rxq)
+{
+	struct rte_pktmbuf_pool_private *mbp_priv;
+	struct rte_eth_dev *eth_dev;
+	struct cnxk_eth_dev *dev;
+	uint32_t buffsz;
+
+	dev = rxq->dev;
+	eth_dev = dev->eth_dev;
+
+	/* Get rx buffer size */
+	mbp_priv = rte_mempool_get_priv(rxq->qconf.mp);
+	buffsz = mbp_priv->mbuf_data_room_size - RTE_PKTMBUF_HEADROOM;
+
+	if (eth_dev->data->dev_conf.rxmode.max_rx_pkt_len > buffsz) {
+		dev->rx_offloads |= DEV_RX_OFFLOAD_SCATTER;
+		dev->tx_offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
+	}
+}
+
+static int
+nix_recalc_mtu(struct rte_eth_dev *eth_dev)
+{
+	struct rte_eth_dev_data *data = eth_dev->data;
+	struct cnxk_eth_rxq_sp *rxq;
+	uint16_t mtu;
+	int rc;
+
+	rxq = ((struct cnxk_eth_rxq_sp *)data->rx_queues[0]) - 1;
+	/* Setup scatter mode if needed by jumbo */
+	nix_enable_mseg_on_jumbo(rxq);
+
+	/* Setup MTU based on max_rx_pkt_len */
+	mtu = data->dev_conf.rxmode.max_rx_pkt_len - CNXK_NIX_L2_OVERHEAD +
+				CNXK_NIX_MAX_VTAG_ACT_SIZE;
+
+	rc = cnxk_nix_mtu_set(eth_dev, mtu);
+	if (rc)
+		plt_err("Failed to set default MTU size, rc=%d", rc);
+
+	return rc;
+}
+
 uint64_t
 cnxk_nix_rxq_mbuf_setup(struct cnxk_eth_dev *dev)
 {
@@ -1002,6 +1046,12 @@ cnxk_nix_dev_start(struct rte_eth_dev *eth_dev)
 	struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
 	int rc, i;
 
+	if (eth_dev->data->nb_rx_queues != 0) {
+		rc = nix_recalc_mtu(eth_dev);
+		if (rc)
+			return rc;
+	}
+
 	/* Start rx queues */
 	for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
 		rc = cnxk_nix_rx_queue_start(eth_dev, i);
@@ -1046,6 +1096,10 @@ rx_disable:
 
 /* CNXK platform independent eth dev ops */
 struct eth_dev_ops cnxk_eth_dev_ops = {
+	.mtu_set = cnxk_nix_mtu_set,
+	.mac_addr_add = cnxk_nix_mac_addr_add,
+	.mac_addr_remove = cnxk_nix_mac_addr_del,
+	.mac_addr_set = cnxk_nix_mac_addr_set,
 	.dev_infos_get = cnxk_nix_info_get,
 	.link_update = cnxk_nix_link_update,
 	.tx_queue_release = cnxk_nix_tx_queue_release,
@@ -1055,6 +1109,12 @@ struct eth_dev_ops cnxk_eth_dev_ops = {
 	.rx_queue_start = cnxk_nix_rx_queue_start,
 	.rx_queue_stop = cnxk_nix_rx_queue_stop,
 	.dev_supported_ptypes_get = cnxk_nix_supported_ptypes_get,
+	.promiscuous_enable = cnxk_nix_promisc_enable,
+	.promiscuous_disable = cnxk_nix_promisc_disable,
+	.allmulticast_enable = cnxk_nix_allmulticast_enable,
+	.allmulticast_disable = cnxk_nix_allmulticast_disable,
+	.rx_burst_mode_get = cnxk_nix_rx_burst_mode_get,
+	.tx_burst_mode_get = cnxk_nix_tx_burst_mode_get,
 };
 
 static int