X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fcxgbe%2Fbase%2Ft4_hw.c;h=9217956b42da990fa8b7bc1fa2029c96e8bd52df;hb=be797cbf4582f3c474f208aeb3d1baa4001a6156;hp=71ad1cb0f2718f55b5b51daa55b013f474daeccd;hpb=902f389f9b4cad1feba320e8b779432eeb76cada;p=dpdk.git diff --git a/drivers/net/cxgbe/base/t4_hw.c b/drivers/net/cxgbe/base/t4_hw.c index 71ad1cb0f2..9217956b42 100644 --- a/drivers/net/cxgbe/base/t4_hw.c +++ b/drivers/net/cxgbe/base/t4_hw.c @@ -2517,6 +2517,10 @@ int t4_get_pfres(struct adapter *adapter) word = be32_to_cpu(rpl.type_to_neq); pfres->neq = G_FW_PFVF_CMD_NEQ(word); + + word = be32_to_cpu(rpl.r_caps_to_nethctrl); + pfres->nethctrl = G_FW_PFVF_CMD_NETHCTRL(word); + return 0; } @@ -4017,7 +4021,8 @@ int t4_set_params(struct adapter *adap, unsigned int mbox, unsigned int pf, int t4_alloc_vi_func(struct adapter *adap, unsigned int mbox, unsigned int port, unsigned int pf, unsigned int vf, unsigned int nmac, u8 *mac, unsigned int *rss_size, - unsigned int portfunc, unsigned int idstype) + unsigned int portfunc, unsigned int idstype, + u8 *vivld, u8 *vin) { int ret; struct fw_vi_cmd c; @@ -4055,6 +4060,10 @@ int t4_alloc_vi_func(struct adapter *adap, unsigned int mbox, } if (rss_size) *rss_size = G_FW_VI_CMD_RSSSIZE(be16_to_cpu(c.norss_rsssize)); + if (vivld) + *vivld = G_FW_VI_CMD_VFVLD(be32_to_cpu(c.alloc_to_len16)); + if (vin) + *vin = G_FW_VI_CMD_VIN(be32_to_cpu(c.alloc_to_len16)); return G_FW_VI_CMD_VIID(cpu_to_be16(c.type_to_viid)); } @@ -4075,10 +4084,10 @@ int t4_alloc_vi_func(struct adapter *adap, unsigned int mbox, */ int t4_alloc_vi(struct adapter *adap, unsigned int mbox, unsigned int port, unsigned int pf, unsigned int vf, unsigned int nmac, u8 *mac, - unsigned int *rss_size) + unsigned int *rss_size, u8 *vivld, u8 *vin) { return t4_alloc_vi_func(adap, mbox, port, pf, vf, nmac, mac, rss_size, - FW_VI_FUNC_ETH, 0); + FW_VI_FUNC_ETH, 0, vivld, vin); } /** @@ -5035,6 +5044,10 @@ int t4_prep_adapter(struct adapter *adapter) adapter->params.arch.mps_rplc_size = 128; adapter->params.arch.nchan = NCHAN; adapter->params.arch.vfcount = 128; + /* Congestion map is for 4 channels so that + * MPS can have 4 priority per port. + */ + adapter->params.arch.cng_ch_bits_log = 2; break; case CHELSIO_T6: adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T6, pl_rev); @@ -5044,6 +5057,10 @@ int t4_prep_adapter(struct adapter *adapter) adapter->params.arch.mps_rplc_size = 256; adapter->params.arch.nchan = 2; adapter->params.arch.vfcount = 256; + /* Congestion map is for 2 channels so that + * MPS can have 8 priority per port. + */ + adapter->params.arch.cng_ch_bits_log = 3; break; default: dev_err(adapter, "%s: Device %d is not supported\n", @@ -5210,8 +5227,8 @@ int t4_init_sge_params(struct adapter *adapter) */ int t4_init_tp_params(struct adapter *adap) { - int chan; - u32 v; + int chan, ret; + u32 param, v; v = t4_read_reg(adap, A_TP_TIMER_RESOLUTION); adap->params.tp.tre = G_TIMERRESOLUTION(v); @@ -5222,11 +5239,47 @@ int t4_init_tp_params(struct adapter *adap) adap->params.tp.tx_modq[chan] = chan; /* - * Cache the adapter's Compressed Filter Mode and global Incress + * Cache the adapter's Compressed Filter Mode/Mask and global Ingress * Configuration. */ - t4_read_indirect(adap, A_TP_PIO_ADDR, A_TP_PIO_DATA, - &adap->params.tp.vlan_pri_map, 1, A_TP_VLAN_PRI_MAP); + param = (V_FW_PARAMS_MNEM(FW_PARAMS_MNEM_DEV) | + V_FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DEV_FILTER) | + V_FW_PARAMS_PARAM_Y(FW_PARAM_DEV_FILTER_MODE_MASK)); + + /* Read current value */ + ret = t4_query_params(adap, adap->mbox, adap->pf, 0, + 1, ¶m, &v); + if (!ret) { + dev_info(adap, "Current filter mode/mask 0x%x:0x%x\n", + G_FW_PARAMS_PARAM_FILTER_MODE(v), + G_FW_PARAMS_PARAM_FILTER_MASK(v)); + adap->params.tp.vlan_pri_map = + G_FW_PARAMS_PARAM_FILTER_MODE(v); + adap->params.tp.filter_mask = + G_FW_PARAMS_PARAM_FILTER_MASK(v); + } else { + dev_info(adap, + "Failed to read filter mode/mask via fw api, using indirect-reg-read\n"); + + /* In case of older-fw (which doesn't expose the api + * FW_PARAM_DEV_FILTER_MODE_MASK) and newer-driver (which uses + * the fw api) combination, fall-back to older method of reading + * the filter mode from indirect-register + */ + t4_read_indirect(adap, A_TP_PIO_ADDR, A_TP_PIO_DATA, + &adap->params.tp.vlan_pri_map, 1, + A_TP_VLAN_PRI_MAP); + + /* With the older-fw and newer-driver combination we might run + * into an issue when user wants to use hash filter region but + * the filter_mask is zero, in this case filter_mask validation + * is tough. To avoid that we set the filter_mask same as filter + * mode, which will behave exactly as the older way of ignoring + * the filter mask validation. + */ + adap->params.tp.filter_mask = adap->params.tp.vlan_pri_map; + } + t4_read_indirect(adap, A_TP_PIO_ADDR, A_TP_PIO_DATA, &adap->params.tp.ingress_config, 1, A_TP_INGRESS_CONFIG); @@ -5253,13 +5306,7 @@ int t4_init_tp_params(struct adapter *adap) F_ETHERTYPE); adap->params.tp.macmatch_shift = t4_filter_field_shift(adap, F_MACMATCH); - - /* - * If TP_INGRESS_CONFIG.VNID == 0, then TP_VLAN_PRI_MAP.VNIC_ID - * represents the presense of an Outer VLAN instead of a VNIC ID. - */ - if ((adap->params.tp.ingress_config & F_VNIC) == 0) - adap->params.tp.vnic_shift = -1; + adap->params.tp.tos_shift = t4_filter_field_shift(adap, F_TOS); v = t4_read_reg(adap, LE_3_DB_HASH_MASK_GEN_IPV4_T6_A); adap->params.tp.hash_filter_mask = v; @@ -5352,6 +5399,7 @@ int t4_port_init(struct adapter *adap, int mbox, int pf, int vf) fw_port_cap32_t pcaps, acaps; enum fw_port_type port_type; struct fw_port_cmd cmd; + u8 vivld = 0, vin = 0; int ret, i, j = 0; int mdio_addr; u32 action; @@ -5423,7 +5471,8 @@ int t4_port_init(struct adapter *adap, int mbox, int pf, int vf) acaps = be32_to_cpu(cmd.u.info32.acaps32); } - ret = t4_alloc_vi(adap, mbox, j, pf, vf, 1, addr, &rss_size); + ret = t4_alloc_vi(adap, mbox, j, pf, vf, 1, addr, &rss_size, + &vivld, &vin); if (ret < 0) return ret; @@ -5432,6 +5481,18 @@ int t4_port_init(struct adapter *adap, int mbox, int pf, int vf) pi->rss_size = rss_size; t4_os_set_hw_addr(adap, i, addr); + /* If fw supports returning the VIN as part of FW_VI_CMD, + * save the returned values. + */ + if (adap->params.viid_smt_extn_support) { + pi->vivld = vivld; + pi->vin = vin; + } else { + /* Retrieve the values from VIID */ + pi->vivld = G_FW_VIID_VIVLD(pi->viid); + pi->vin = G_FW_VIID_VIN(pi->viid); + } + pi->port_type = port_type; pi->mdio_addr = mdio_addr; pi->mod_type = FW_PORT_MOD_TYPE_NA;