X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fcxgbe%2Fcxgbe.h;h=dbcbfaf68a30abc5b7ca20d9319897d4ff99cec4;hb=745b88360817c1003a9f5282cf899f790440b189;hp=ed1be3559f2c828263592343b3e6fbbd5c0d2cb8;hpb=fa0334374f9f35ab2f697e2029d08ed7235cfa91;p=dpdk.git diff --git a/drivers/net/cxgbe/cxgbe.h b/drivers/net/cxgbe/cxgbe.h index ed1be3559f..dbcbfaf68a 100644 --- a/drivers/net/cxgbe/cxgbe.h +++ b/drivers/net/cxgbe/cxgbe.h @@ -19,36 +19,60 @@ #define CXGBE_MAX_RX_PKTLEN (9000 + RTE_ETHER_HDR_LEN + \ RTE_ETHER_CRC_LEN) /* max pkt */ +/* The max frame size with default MTU */ +#define CXGBE_ETH_MAX_LEN (RTE_ETHER_MTU + \ + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN) + /* Max poll time is 100 * 100msec = 10 sec */ #define CXGBE_LINK_STATUS_POLL_MS 100 /* 100ms */ #define CXGBE_LINK_STATUS_POLL_CNT 100 /* Max number of times to poll */ #define CXGBE_DEFAULT_RSS_KEY_LEN 40 /* 320-bits */ -#define CXGBE_RSS_HF_IPV4_MASK (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | \ - ETH_RSS_NONFRAG_IPV4_OTHER) -#define CXGBE_RSS_HF_IPV6_MASK (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | \ - ETH_RSS_NONFRAG_IPV6_OTHER | \ - ETH_RSS_IPV6_EX) -#define CXGBE_RSS_HF_TCP_IPV6_MASK (ETH_RSS_NONFRAG_IPV6_TCP | \ - ETH_RSS_IPV6_TCP_EX) -#define CXGBE_RSS_HF_UDP_IPV6_MASK (ETH_RSS_NONFRAG_IPV6_UDP | \ - ETH_RSS_IPV6_UDP_EX) -#define CXGBE_RSS_HF_ALL (ETH_RSS_IP | ETH_RSS_TCP | ETH_RSS_UDP) +#define CXGBE_RSS_HF_IPV4_MASK (RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4 | \ + RTE_ETH_RSS_NONFRAG_IPV4_OTHER) +#define CXGBE_RSS_HF_IPV6_MASK (RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6 | \ + RTE_ETH_RSS_NONFRAG_IPV6_OTHER | \ + RTE_ETH_RSS_IPV6_EX) +#define CXGBE_RSS_HF_TCP_IPV6_MASK (RTE_ETH_RSS_NONFRAG_IPV6_TCP | \ + RTE_ETH_RSS_IPV6_TCP_EX) +#define CXGBE_RSS_HF_UDP_IPV6_MASK (RTE_ETH_RSS_NONFRAG_IPV6_UDP | \ + RTE_ETH_RSS_IPV6_UDP_EX) +#define CXGBE_RSS_HF_ALL (RTE_ETH_RSS_IP | RTE_ETH_RSS_TCP | RTE_ETH_RSS_UDP) /* Tx/Rx Offloads supported */ -#define CXGBE_TX_OFFLOADS (DEV_TX_OFFLOAD_VLAN_INSERT | \ - DEV_TX_OFFLOAD_IPV4_CKSUM | \ - DEV_TX_OFFLOAD_UDP_CKSUM | \ - DEV_TX_OFFLOAD_TCP_CKSUM | \ - DEV_TX_OFFLOAD_TCP_TSO) +#define CXGBE_TX_OFFLOADS (RTE_ETH_TX_OFFLOAD_VLAN_INSERT | \ + RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | \ + RTE_ETH_TX_OFFLOAD_UDP_CKSUM | \ + RTE_ETH_TX_OFFLOAD_TCP_CKSUM | \ + RTE_ETH_TX_OFFLOAD_TCP_TSO | \ + RTE_ETH_TX_OFFLOAD_MULTI_SEGS) + +#define CXGBE_RX_OFFLOADS (RTE_ETH_RX_OFFLOAD_VLAN_STRIP | \ + RTE_ETH_RX_OFFLOAD_IPV4_CKSUM | \ + RTE_ETH_RX_OFFLOAD_UDP_CKSUM | \ + RTE_ETH_RX_OFFLOAD_TCP_CKSUM | \ + RTE_ETH_RX_OFFLOAD_SCATTER | \ + RTE_ETH_RX_OFFLOAD_RSS_HASH) -#define CXGBE_RX_OFFLOADS (DEV_RX_OFFLOAD_VLAN_STRIP | \ - DEV_RX_OFFLOAD_IPV4_CKSUM | \ - DEV_RX_OFFLOAD_UDP_CKSUM | \ - DEV_RX_OFFLOAD_TCP_CKSUM | \ - DEV_RX_OFFLOAD_JUMBO_FRAME | \ - DEV_RX_OFFLOAD_SCATTER) +/* Devargs filtermode and filtermask representation */ +enum cxgbe_devargs_filter_mode_flags { + CXGBE_DEVARGS_FILTER_MODE_PHYSICAL_PORT = (1 << 0), + CXGBE_DEVARGS_FILTER_MODE_PF_VF = (1 << 1), + CXGBE_DEVARGS_FILTER_MODE_ETHERNET_DSTMAC = (1 << 2), + CXGBE_DEVARGS_FILTER_MODE_ETHERNET_ETHTYPE = (1 << 3), + CXGBE_DEVARGS_FILTER_MODE_VLAN_INNER = (1 << 4), + CXGBE_DEVARGS_FILTER_MODE_VLAN_OUTER = (1 << 5), + CXGBE_DEVARGS_FILTER_MODE_IP_TOS = (1 << 6), + CXGBE_DEVARGS_FILTER_MODE_IP_PROTOCOL = (1 << 7), + CXGBE_DEVARGS_FILTER_MODE_MAX = (1 << 8), +}; + +enum cxgbe_filter_vnic_mode { + CXGBE_FILTER_VNIC_MODE_NONE, + CXGBE_FILTER_VNIC_MODE_PFVF, + CXGBE_FILTER_VNIC_MODE_OVLAN, +}; /* Common PF and VF devargs */ #define CXGBE_DEVARG_CMN_KEEP_OVLAN "keep_ovlan" @@ -57,6 +81,10 @@ /* VF only devargs */ #define CXGBE_DEVARG_VF_FORCE_LINK_UP "force_link_up" +/* Filter Mode/Mask devargs */ +#define CXGBE_DEVARG_PF_FILTER_MODE "filtermode" +#define CXGBE_DEVARG_PF_FILTER_MASK "filtermask" + bool cxgbe_force_linkup(struct adapter *adap); int cxgbe_probe(struct adapter *adapter); int cxgbevf_probe(struct adapter *adapter); @@ -73,7 +101,8 @@ int cxgbe_poll_for_completion(struct sge_rspq *q, unsigned int us, int cxgbe_link_start(struct port_info *pi); int cxgbe_setup_sge_fwevtq(struct adapter *adapter); int cxgbe_setup_sge_ctrl_txq(struct adapter *adapter); -void cxgbe_cfg_queues(struct rte_eth_dev *eth_dev); +int cxgbe_cfg_queues(struct rte_eth_dev *eth_dev); +void cxgbe_cfg_queues_free(struct adapter *adapter); int cxgbe_cfg_queue_count(struct rte_eth_dev *eth_dev); int cxgbe_init_rss(struct adapter *adap); int cxgbe_setup_rss(struct port_info *pi);