X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fcxgbe%2Fcxgbe_compat.h;h=1551cbf56a738e6f1e1ae984adee79de088f6e10;hb=70280a3e33d9b699bb31f16854fed6270fca4e59;hp=3b871eeca9db51e41bc00e9a24b533ecfa7ea4ab;hpb=8318984927ff621c687be9299c52ddde3357734e;p=dpdk.git

diff --git a/drivers/net/cxgbe/cxgbe_compat.h b/drivers/net/cxgbe/cxgbe_compat.h
index 3b871eeca9..1551cbf56a 100644
--- a/drivers/net/cxgbe/cxgbe_compat.h
+++ b/drivers/net/cxgbe/cxgbe_compat.h
@@ -45,6 +45,7 @@
 #include <rte_cycles.h>
 #include <rte_spinlock.h>
 #include <rte_log.h>
+#include <rte_io.h>
 
 #define dev_printf(level, fmt, args...) \
 	RTE_LOG(level, PMD, "rte_cxgbe_pmd: " fmt, ## args)
@@ -119,8 +120,8 @@
 #define L1_CACHE_BYTES  BIT(L1_CACHE_SHIFT)
 
 #define PAGE_SHIFT  12
-#define ALIGN(x, a) (((x) + (a) - 1) & ~((a) - 1))
-#define PTR_ALIGN(p, a) ((typeof(p))ALIGN((unsigned long)(p), (a)))
+#define CXGBE_ALIGN(x, a) (((x) + (a) - 1) & ~((a) - 1))
+#define PTR_ALIGN(p, a) ((typeof(p))CXGBE_ALIGN((unsigned long)(p), (a)))
 
 #define VLAN_HLEN 4
 
@@ -178,7 +179,7 @@ typedef uint64_t  dma_addr_t;
 /*
  * round up val _p to a power of 2 size _s
  */
-#define roundup(_p, _s) (((unsigned long)(_p) + (_s - 1)) & ~(_s - 1))
+#define cxgbe_roundup(_p, _s) (((unsigned long)(_p) + (_s - 1)) & ~(_s - 1))
 
 #undef container_of
 #define container_of(ptr, type, member) ({ \
@@ -214,13 +215,13 @@ static inline uint8_t hweight32(uint32_t word32)
 } /* weight32 */
 
 /**
- * fls - find last (most-significant) bit set
+ * cxgbe_fls - find last (most-significant) bit set
  * @x: the word to search
  *
  * This is defined the same way as ffs.
- * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
+ * Note cxgbe_fls(0) = 0, cxgbe_fls(1) = 1, cxgbe_fls(0x80000000) = 32.
  */
-static inline int fls(int x)
+static inline int cxgbe_fls(int x)
 {
 	return x ? sizeof(x) * 8 - __builtin_clz(x) : 0;
 }
@@ -254,7 +255,7 @@ static inline unsigned long ilog2(unsigned long n)
 
 static inline void writel(unsigned int val, volatile void __iomem *addr)
 {
-	*(volatile unsigned int *)addr = val;
+	rte_write32(val, addr);
 }
 
 static inline void writeq(u64 val, volatile void __iomem *addr)
@@ -263,4 +264,9 @@ static inline void writeq(u64 val, volatile void __iomem *addr)
 	writel(val >> 32, (void *)((uintptr_t)addr + 4));
 }
 
+static inline void writel_relaxed(unsigned int val, volatile void __iomem *addr)
+{
+	rte_write32_relaxed(val, addr);
+}
+
 #endif /* _CXGBE_COMPAT_H_ */