X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fcxgbe%2Fcxgbe_main.c;h=922155b4fb6e8c756c4969b2fa44f81e3483c268;hb=6751f6deb798394da41467ee6e4cbd10d78ff156;hp=dad0a98356da55fe165d7f3e9e9f57e2c4372dd4;hpb=856505d303f40c3ed11210a7f74f8ae0755ea539;p=dpdk.git diff --git a/drivers/net/cxgbe/cxgbe_main.c b/drivers/net/cxgbe/cxgbe_main.c index dad0a98356..922155b4fb 100644 --- a/drivers/net/cxgbe/cxgbe_main.c +++ b/drivers/net/cxgbe/cxgbe_main.c @@ -1,7 +1,7 @@ /*- * BSD LICENSE * - * Copyright(c) 2014-2015 Chelsio Communications. + * Copyright(c) 2014-2016 Chelsio Communications. * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -200,7 +200,7 @@ int cxgb4_set_rspq_intr_params(struct sge_rspq *q, unsigned int us, static inline bool is_x_1g_port(const struct link_config *lc) { - return ((lc->supported & FW_PORT_CAP_SPEED_1G) != 0); + return (lc->supported & FW_PORT_CAP_SPEED_1G) != 0; } static inline bool is_x_10g_port(const struct link_config *lc) @@ -355,7 +355,7 @@ static int init_rss(struct adapter *adap) for_each_port(adap, i) { struct port_info *pi = adap2pinfo(adap, i); - pi->rss = rte_zmalloc(NULL, pi->rss_size, 0); + pi->rss = rte_zmalloc(NULL, pi->rss_size * sizeof(u16), 0); if (!pi->rss) return -ENOMEM; } @@ -383,7 +383,8 @@ static void print_port_info(struct adapter *adap) if (bufp != buf) --bufp; sprintf(bufp, "BASE-%s", - t4_get_port_type_description(pi->port_type)); + t4_get_port_type_description( + (enum fw_port_type)pi->port_type)); dev_info(adap, " " PCI_PRI_FMT " Chelsio rev %d %s %s\n", @@ -410,7 +411,7 @@ static int adap_init0_tweaks(struct adapter *adapter) * Line Size, etc. The firmware default is for a 4KB Page Size and * 64B Cache Line Size ... */ - t4_fixup_host_params_compat(adapter, PAGE_SIZE, L1_CACHE_BYTES, + t4_fixup_host_params_compat(adapter, CXGBE_PAGE_SIZE, L1_CACHE_BYTES, T5_LAST_REV); /* @@ -421,6 +422,13 @@ static int adap_init0_tweaks(struct adapter *adapter) t4_set_reg_field(adapter, A_SGE_CONTROL, V_PKTSHIFT(M_PKTSHIFT), V_PKTSHIFT(rx_dma_offset)); + t4_set_reg_field(adapter, A_SGE_FLM_CFG, + V_CREDITCNT(M_CREDITCNT) | M_CREDITCNTPACKING, + V_CREDITCNT(3) | V_CREDITCNTPACKING(1)); + + t4_set_reg_field(adapter, A_SGE_CONTROL2, V_IDMAARBROUNDROBIN(1U), + V_IDMAARBROUNDROBIN(1U)); + /* * Don't include the "IP Pseudo Header" in CPL_RX_PKT checksums: Linux * adds the pseudo header itself. @@ -629,7 +637,7 @@ static int adap_init0(struct adapter *adap) dev_err(adap, "Failed to restart. Exit.\n"); goto bye; } - state &= ~DEV_STATE_INIT; + state = (enum dev_state)((unsigned)state & ~DEV_STATE_INIT); } t4_get_fw_version(adap, &adap->params.fw_vers); @@ -847,12 +855,16 @@ int link_start(struct port_info *pi) { struct adapter *adapter = pi->adapter; int ret; + unsigned int mtu; + + mtu = pi->eth_dev->data->dev_conf.rxmode.max_rx_pkt_len - + (ETHER_HDR_LEN + ETHER_CRC_LEN); /* * We do not set address filters and promiscuity here, the stack does * that step explicitly. */ - ret = t4_set_rxmode(adapter, adapter->mbox, pi->viid, 1500, -1, -1, + ret = t4_set_rxmode(adapter, adapter->mbox, pi->viid, mtu, -1, -1, -1, 1, true); if (ret == 0) { ret = t4_change_mac(adapter, adapter->mbox, pi->viid, @@ -1099,7 +1111,7 @@ int cxgbe_probe(struct adapter *adapter) qpp = 1 << ((t4_read_reg(adapter, A_SGE_EGRESS_QUEUES_PER_PAGE_PF) >> s_qpp) & M_QUEUESPERPAGEPF0); - num_seg = PAGE_SIZE / UDBS_SEG_SIZE; + num_seg = CXGBE_PAGE_SIZE / UDBS_SEG_SIZE; if (qpp > num_seg) dev_warn(adapter, "Incorrect SGE EGRESS QUEUES_PER_PAGE configuration, continuing in debug mode\n"); @@ -1138,7 +1150,7 @@ int cxgbe_probe(struct adapter *adapter) */ /* reserve an ethdev entry */ - pi->eth_dev = rte_eth_dev_allocate(name, RTE_ETH_DEV_PCI); + pi->eth_dev = rte_eth_dev_allocate(name); if (!pi->eth_dev) goto out_free; @@ -1157,6 +1169,9 @@ allocate_mac: pi->eth_dev->dev_ops = adapter->eth_dev->dev_ops; pi->eth_dev->tx_pkt_burst = adapter->eth_dev->tx_pkt_burst; pi->eth_dev->rx_pkt_burst = adapter->eth_dev->rx_pkt_burst; + + rte_eth_copy_pci_info(pi->eth_dev, pi->eth_dev->pci_dev); + TAILQ_INIT(&pi->eth_dev->link_intr_cbs); pi->eth_dev->data->mac_addrs = rte_zmalloc(name,