X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fdpaa%2Fdpaa_rxtx.h;h=d9d7e04f5cdb11d974e85955111b956703b7aecf;hb=f593944fc988dfccebed62205fd0b88c60ed7d77;hp=6de70a796393521f3c111c85b2d1c4f800229ad4;hpb=55576ac26ee9f9eef51611ecd9f00f73e414cccb;p=dpdk.git

diff --git a/drivers/net/dpaa/dpaa_rxtx.h b/drivers/net/dpaa/dpaa_rxtx.h
index 6de70a7963..d9d7e04f5c 100644
--- a/drivers/net/dpaa/dpaa_rxtx.h
+++ b/drivers/net/dpaa/dpaa_rxtx.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
  *   Copyright 2016 Freescale Semiconductor, Inc. All rights reserved.
- *   Copyright 2017 NXP
+ *   Copyright 2017,2020 NXP
  *
  */
 
@@ -61,7 +61,7 @@
  *		0x8000 - Ethernet type
  *	ShimR & Logical Port ID 0x0000
  */
-#define DPAA_PARSE_MASK			0x00E044ED00800000
+#define DPAA_PARSE_MASK			0x00F044EF00800000
 #define DPAA_PARSE_VLAN_MASK		0x0000000000700000
 
 /* Parsed values (Little Endian) */
@@ -137,6 +137,23 @@
 			(0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_4_6)
 #define DPAA_PKT_TYPE_TUNNEL_6_4_TCP \
 			(0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_6_4)
+
+/* Checksum Errors */
+#define DPAA_PKT_IP_CSUM_ERR		0x0000400200000000
+#define DPAA_PKT_L4_CSUM_ERR		0x0010000000000000
+#define DPAA_PKT_TYPE_IPV4_CSUM_ERR \
+			(DPAA_PKT_IP_CSUM_ERR | DPAA_PKT_TYPE_IPV4)
+#define DPAA_PKT_TYPE_IPV6_CSUM_ERR \
+			(DPAA_PKT_IP_CSUM_ERR | DPAA_PKT_TYPE_IPV6)
+#define DPAA_PKT_TYPE_IPV4_TCP_CSUM_ERR \
+			(DPAA_PKT_L4_CSUM_ERR | DPAA_PKT_TYPE_IPV4_TCP)
+#define DPAA_PKT_TYPE_IPV6_TCP_CSUM_ERR \
+			(DPAA_PKT_L4_CSUM_ERR | DPAA_PKT_TYPE_IPV6_TCP)
+#define DPAA_PKT_TYPE_IPV4_UDP_CSUM_ERR \
+			(DPAA_PKT_L4_CSUM_ERR | DPAA_PKT_TYPE_IPV4_UDP)
+#define DPAA_PKT_TYPE_IPV6_UDP_CSUM_ERR \
+			(DPAA_PKT_L4_CSUM_ERR | DPAA_PKT_TYPE_IPV6_UDP)
+
 #define DPAA_PKT_L3_LEN_SHIFT	7
 
 /**
@@ -170,8 +187,8 @@ struct dpaa_eth_parse_results_t {
 			uint16_t      vlan:1;
 			uint16_t      ethernet:1;
 #endif
-		} __attribute__((__packed__));
-	 } __attribute__((__packed__));
+		} __rte_packed;
+	 } __rte_packed;
 	 union {
 		uint16_t              l3r;	/**< Layer 3 result */
 		struct {
@@ -198,8 +215,8 @@ struct dpaa_eth_parse_results_t {
 			uint16_t      first_ipv6:1;
 			uint16_t      first_ipv4:1;
 #endif
-		} __attribute__((__packed__));
-	 } __attribute__((__packed__));
+		} __rte_packed;
+	 } __rte_packed;
 	 union {
 		uint8_t               l4r;	/**< Layer 4 result */
 		struct{
@@ -214,8 +231,8 @@ struct dpaa_eth_parse_results_t {
 			uint8_t        l4_info_err:1;
 			uint8_t        l4_type:3;
 #endif
-		} __attribute__((__packed__));
-	 } __attribute__((__packed__));
+		} __rte_packed;
+	 } __rte_packed;
 	 uint8_t     cplan;		 /**< Classification plan id */
 	 uint16_t    nxthdr;		 /**< Next Header  */
 	 uint16_t    cksum;		 /**< Checksum */
@@ -231,7 +248,7 @@ struct dpaa_eth_parse_results_t {
 	 uint8_t     gre_off;		 /**< GRE offset */
 	 uint8_t     l4_off;		 /**< Layer 4 offset */
 	 uint8_t     nxthdr_off;	 /**< Parser end point */
-} __attribute__ ((__packed__));
+} __rte_packed;
 
 /* The structure is the Prepended Data to the Frame which is used by FMAN */
 struct annotations_t {
@@ -254,6 +271,8 @@ struct annotations_t {
 
 uint16_t dpaa_eth_queue_rx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs);
 
+uint16_t dpaa_eth_queue_tx_slow(void *q, struct rte_mbuf **bufs,
+				uint16_t nb_bufs);
 uint16_t dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs);
 
 uint16_t dpaa_eth_tx_drop_all(void *q  __rte_unused,
@@ -266,8 +285,12 @@ int dpaa_eth_mbuf_to_sg_fd(struct rte_mbuf *mbuf,
 			   struct qm_fd *fd,
 			   uint32_t bpid);
 
+uint16_t dpaa_free_mbuf(const struct qm_fd *fd);
 void dpaa_rx_cb(struct qman_fq **fq,
 		struct qm_dqrr_entry **dqrr, void **bufs, int num_bufs);
 
 void dpaa_rx_cb_prepare(struct qm_dqrr_entry *dq, void **bufs);
+
+void dpaa_rx_cb_no_prefetch(struct qman_fq **fq,
+		    struct qm_dqrr_entry **dqrr, void **bufs, int num_bufs);
 #endif