X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fe1000%2Fbase%2Fe1000_i210.c;h=277331c42c0aec9f9281cca05b3acbbc10346b86;hb=faaf69adb93e9a286e2506c448857c2dc2b7f225;hp=23f93472640a537b3bef5df15d5b214fa3f6b220;hpb=b4e5e60cbe64415d1aae9fb0194df7fa34223a7f;p=dpdk.git

diff --git a/drivers/net/e1000/base/e1000_i210.c b/drivers/net/e1000/base/e1000_i210.c
index 23f9347264..277331c42c 100644
--- a/drivers/net/e1000/base/e1000_i210.c
+++ b/drivers/net/e1000/base/e1000_i210.c
@@ -925,7 +925,7 @@ s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 data)
 STATIC s32 e1000_pll_workaround_i210(struct e1000_hw *hw)
 {
 	s32 ret_val;
-	u32 wuc, mdicnfg, ctrl_ext, reg_val;
+	u32 wuc, mdicnfg, ctrl, ctrl_ext, reg_val;
 	u16 nvm_word, phy_word, pci_word, tmp_nvm;
 	int i;
 
@@ -942,9 +942,9 @@ STATIC s32 e1000_pll_workaround_i210(struct e1000_hw *hw)
 		nvm_word = E1000_INVM_DEFAULT_AL;
 	tmp_nvm = nvm_word | E1000_INVM_PLL_WO_VAL;
 	for (i = 0; i < E1000_MAX_PLL_TRIES; i++) {
-		/* check current state */
-		hw->phy.ops.read_reg(hw, (E1000_PHY_PLL_FREQ_PAGE |
-				     E1000_PHY_PLL_FREQ_REG), &phy_word);
+		/* check current state directly from internal PHY */
+		e1000_read_phy_reg_gs40g(hw, (E1000_PHY_PLL_FREQ_PAGE |
+					 E1000_PHY_PLL_FREQ_REG), &phy_word);
 		if ((phy_word & E1000_PHY_PLL_UNCONF)
 		    != E1000_PHY_PLL_UNCONF) {
 			ret_val = E1000_SUCCESS;
@@ -952,14 +952,17 @@ STATIC s32 e1000_pll_workaround_i210(struct e1000_hw *hw)
 		} else {
 			ret_val = -E1000_ERR_PHY;
 		}
-		hw->phy.ops.reset(hw);
+		/* directly reset the internal PHY */
+		ctrl = E1000_READ_REG(hw, E1000_CTRL);
+		E1000_WRITE_REG(hw, E1000_CTRL, ctrl|E1000_CTRL_PHY_RST);
+
 		ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
 		ctrl_ext |= (E1000_CTRL_EXT_PHYPDEN | E1000_CTRL_EXT_SDLPE);
 		E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
 
 		E1000_WRITE_REG(hw, E1000_WUC, 0);
 		reg_val = (E1000_INVM_AUTOLOAD << 4) | (tmp_nvm << 16);
-		E1000_WRITE_REG(hw, E1000_EEARBC, reg_val);
+		E1000_WRITE_REG(hw, E1000_EEARBC_I210, reg_val);
 
 		e1000_read_pci_cfg(hw, E1000_PCI_PMCSR, &pci_word);
 		pci_word |= E1000_PCI_PMCSR_D3;
@@ -968,7 +971,7 @@ STATIC s32 e1000_pll_workaround_i210(struct e1000_hw *hw)
 		pci_word &= ~E1000_PCI_PMCSR_D3;
 		e1000_write_pci_cfg(hw, E1000_PCI_PMCSR, &pci_word);
 		reg_val = (E1000_INVM_AUTOLOAD << 4) | (nvm_word << 16);
-		E1000_WRITE_REG(hw, E1000_EEARBC, reg_val);
+		E1000_WRITE_REG(hw, E1000_EEARBC_I210, reg_val);
 
 		/* restore WUC register */
 		E1000_WRITE_REG(hw, E1000_WUC, wuc);