X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fe1000%2Fe1000_ethdev.h;h=4755a5f333fc269c4478a0ecd102891c524d3569;hb=cb71192486c34eada5b65c6c46d32afd05cc091b;hp=3e74cd8fe76321fa3ac8194bf12eaa661705604e;hpb=ae35fd61fce131989a5441eb7fc7272a15762be1;p=dpdk.git diff --git a/drivers/net/e1000/e1000_ethdev.h b/drivers/net/e1000/e1000_ethdev.h index 3e74cd8fe7..4755a5f333 100644 --- a/drivers/net/e1000/e1000_ethdev.h +++ b/drivers/net/e1000/e1000_ethdev.h @@ -35,6 +35,9 @@ #define IGB_MAX_RX_QUEUE_NUM 8 #define IGB_MAX_RX_QUEUE_NUM_82576 16 +#define E1000_I219_MAX_RX_QUEUE_NUM 2 +#define E1000_I219_MAX_TX_QUEUE_NUM 2 + #define E1000_SYN_FILTER_ENABLE 0x00000001 /* syn filter enable field */ #define E1000_SYN_FILTER_QUEUE 0x0000000E /* syn filter queue field */ #define E1000_SYN_FILTER_QUEUE_SHIFT 1 /* syn filter queue field */ @@ -92,7 +95,8 @@ * The overhead from MTU to max frame size. * Considering VLAN so a tag needs to be counted. */ -#define E1000_ETH_OVERHEAD (ETHER_HDR_LEN + ETHER_CRC_LEN + VLAN_TAG_SIZE) +#define E1000_ETH_OVERHEAD (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + \ + VLAN_TAG_SIZE) /* * Maximum number of Ring Descriptors. @@ -155,7 +159,7 @@ struct e1000_vfta { */ #define E1000_MAX_VF_MC_ENTRIES 30 struct e1000_vf_info { - uint8_t vf_mac_addresses[ETHER_ADDR_LEN]; + uint8_t vf_mac_addresses[RTE_ETHER_ADDR_LEN]; uint16_t vf_mc_hashes[E1000_MAX_VF_MC_ENTRIES]; uint16_t num_vf_mc_hashes; uint16_t default_vf_vlan_id; @@ -327,10 +331,28 @@ struct igb_eth_syn_filter_ele { struct rte_eth_syn_filter filter_info; }; +#define IGB_FLEX_FILTER_MAXLEN 128 /**< bytes to use in flex filter. */ +#define IGB_FLEX_FILTER_MASK_SIZE \ + (RTE_ALIGN(IGB_FLEX_FILTER_MAXLEN, CHAR_BIT) / CHAR_BIT) + /**< mask bytes in flex filter. */ + +/** + * A structure used to define the flex filter entry + * to support RTE_ETH_FILTER_FLEXIBLE data representation. + */ +struct igb_flex_filter { + uint16_t len; + uint8_t bytes[IGB_FLEX_FILTER_MAXLEN]; /**< flex bytes in big endian. */ + uint8_t mask[IGB_FLEX_FILTER_MASK_SIZE]; + /**< if mask bit is 1b, do not compare corresponding byte. */ + uint8_t priority; + uint16_t queue; /**< Queue assigned to when match. */ +}; + /* flex filter list structure */ struct igb_flex_filter_ele { TAILQ_ENTRY(igb_flex_filter_ele) entries; - struct rte_eth_flex_filter filter_info; + struct igb_flex_filter filter_info; }; /* rss filter list structure */ @@ -347,17 +369,17 @@ struct igb_flow_mem { }; TAILQ_HEAD(igb_ntuple_filter_list, igb_ntuple_filter_ele); -struct igb_ntuple_filter_list igb_filter_ntuple_list; +extern struct igb_ntuple_filter_list igb_filter_ntuple_list; TAILQ_HEAD(igb_ethertype_filter_list, igb_ethertype_filter_ele); -struct igb_ethertype_filter_list igb_filter_ethertype_list; +extern struct igb_ethertype_filter_list igb_filter_ethertype_list; TAILQ_HEAD(igb_syn_filter_list, igb_eth_syn_filter_ele); -struct igb_syn_filter_list igb_filter_syn_list; +extern struct igb_syn_filter_list igb_filter_syn_list; TAILQ_HEAD(igb_flex_filter_list, igb_flex_filter_ele); -struct igb_flex_filter_list igb_filter_flex_list; +extern struct igb_flex_filter_list igb_filter_flex_list; TAILQ_HEAD(igb_rss_filter_list, igb_rss_conf_ele); -struct igb_rss_filter_list igb_filter_rss_list; +extern struct igb_rss_filter_list igb_filter_rss_list; TAILQ_HEAD(igb_flow_mem_list, igb_flow_mem); -struct igb_flow_mem_list igb_flow_list; +extern struct igb_flow_mem_list igb_flow_list; extern const struct rte_flow_ops igb_flow_ops; @@ -511,7 +533,7 @@ int eth_igb_syn_filter_set(struct rte_eth_dev *dev, struct rte_eth_syn_filter *filter, bool add); int eth_igb_add_del_flex_filter(struct rte_eth_dev *dev, - struct rte_eth_flex_filter *filter, + struct igb_flex_filter *filter, bool add); int igb_rss_conf_init(struct rte_eth_dev *dev, struct igb_rte_flow_rss_conf *out, @@ -521,5 +543,6 @@ int igb_action_rss_same(const struct rte_flow_action_rss *comp, int igb_config_rss_filter(struct rte_eth_dev *dev, struct igb_rte_flow_rss_conf *conf, bool add); +void em_flush_desc_rings(struct rte_eth_dev *dev); #endif /* _E1000_ETHDEV_H_ */