X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fe1000%2Figb_ethdev.c;h=9e4aefe00ce2ccb90513dce60c1b97283e8a8446;hb=b142387b07600c320683255d237b9109299883d5;hp=52dc407061dbb2f99f67f30679269046dc67f8e5;hpb=cebe3d7b3d2066981d9179b52b79966e69e68fd7;p=dpdk.git diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c index 52dc407061..9e4aefe00c 100644 --- a/drivers/net/e1000/igb_ethdev.c +++ b/drivers/net/e1000/igb_ethdev.c @@ -8,6 +8,7 @@ #include #include +#include #include #include #include @@ -16,11 +17,10 @@ #include #include #include -#include +#include #include #include #include -#include #include #include @@ -42,8 +42,6 @@ #define IGB_DEFAULT_TX_HTHRESH 1 #define IGB_DEFAULT_TX_WTHRESH ((hw->mac.type == e1000_82576) ? 1 : 16) -#define IGB_HKEY_MAX_INDEX 10 - /* Bit shift and mask */ #define IGB_4_BIT_WIDTH (CHAR_BIT / 2) #define IGB_4_BIT_MASK RTE_LEN2MASK(IGB_4_BIT_WIDTH, uint8_t) @@ -71,16 +69,20 @@ #define E1000_VET_VET_EXT 0xFFFF0000 #define E1000_VET_VET_EXT_SHIFT 16 +/* MSI-X other interrupt vector */ +#define IGB_MSIX_OTHER_INTR_VEC 0 + static int eth_igb_configure(struct rte_eth_dev *dev); static int eth_igb_start(struct rte_eth_dev *dev); static void eth_igb_stop(struct rte_eth_dev *dev); static int eth_igb_dev_set_link_up(struct rte_eth_dev *dev); static int eth_igb_dev_set_link_down(struct rte_eth_dev *dev); -static void eth_igb_close(struct rte_eth_dev *dev); -static void eth_igb_promiscuous_enable(struct rte_eth_dev *dev); -static void eth_igb_promiscuous_disable(struct rte_eth_dev *dev); -static void eth_igb_allmulticast_enable(struct rte_eth_dev *dev); -static void eth_igb_allmulticast_disable(struct rte_eth_dev *dev); +static int eth_igb_close(struct rte_eth_dev *dev); +static int eth_igb_reset(struct rte_eth_dev *dev); +static int eth_igb_promiscuous_enable(struct rte_eth_dev *dev); +static int eth_igb_promiscuous_disable(struct rte_eth_dev *dev); +static int eth_igb_allmulticast_enable(struct rte_eth_dev *dev); +static int eth_igb_allmulticast_disable(struct rte_eth_dev *dev); static int eth_igb_link_update(struct rte_eth_dev *dev, int wait_to_complete); static int eth_igb_stats_get(struct rte_eth_dev *dev, @@ -96,14 +98,14 @@ static int eth_igb_xstats_get_names(struct rte_eth_dev *dev, static int eth_igb_xstats_get_names_by_id(struct rte_eth_dev *dev, struct rte_eth_xstat_name *xstats_names, const uint64_t *ids, unsigned int limit); -static void eth_igb_stats_reset(struct rte_eth_dev *dev); -static void eth_igb_xstats_reset(struct rte_eth_dev *dev); +static int eth_igb_stats_reset(struct rte_eth_dev *dev); +static int eth_igb_xstats_reset(struct rte_eth_dev *dev); static int eth_igb_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size); -static void eth_igb_infos_get(struct rte_eth_dev *dev, +static int eth_igb_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info); static const uint32_t *eth_igb_supported_ptypes_get(struct rte_eth_dev *dev); -static void eth_igbvf_infos_get(struct rte_eth_dev *dev, +static int eth_igbvf_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info); static int eth_igb_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf); @@ -140,24 +142,24 @@ static void igb_vlan_hw_extend_disable(struct rte_eth_dev *dev); static int eth_igb_led_on(struct rte_eth_dev *dev); static int eth_igb_led_off(struct rte_eth_dev *dev); -static void igb_intr_disable(struct e1000_hw *hw); +static void igb_intr_disable(struct rte_eth_dev *dev); static int igb_get_rx_buffer_size(struct e1000_hw *hw); static int eth_igb_rar_set(struct rte_eth_dev *dev, - struct ether_addr *mac_addr, + struct rte_ether_addr *mac_addr, uint32_t index, uint32_t pool); static void eth_igb_rar_clear(struct rte_eth_dev *dev, uint32_t index); -static void eth_igb_default_mac_addr_set(struct rte_eth_dev *dev, - struct ether_addr *addr); +static int eth_igb_default_mac_addr_set(struct rte_eth_dev *dev, + struct rte_ether_addr *addr); static void igbvf_intr_disable(struct e1000_hw *hw); static int igbvf_dev_configure(struct rte_eth_dev *dev); static int igbvf_dev_start(struct rte_eth_dev *dev); static void igbvf_dev_stop(struct rte_eth_dev *dev); -static void igbvf_dev_close(struct rte_eth_dev *dev); -static void igbvf_promiscuous_enable(struct rte_eth_dev *dev); -static void igbvf_promiscuous_disable(struct rte_eth_dev *dev); -static void igbvf_allmulticast_enable(struct rte_eth_dev *dev); -static void igbvf_allmulticast_disable(struct rte_eth_dev *dev); +static int igbvf_dev_close(struct rte_eth_dev *dev); +static int igbvf_promiscuous_enable(struct rte_eth_dev *dev); +static int igbvf_promiscuous_disable(struct rte_eth_dev *dev); +static int igbvf_allmulticast_enable(struct rte_eth_dev *dev); +static int igbvf_allmulticast_disable(struct rte_eth_dev *dev); static int eth_igbvf_link_update(struct e1000_hw *hw); static int eth_igbvf_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *rte_stats); @@ -166,13 +168,13 @@ static int eth_igbvf_xstats_get(struct rte_eth_dev *dev, static int eth_igbvf_xstats_get_names(struct rte_eth_dev *dev, struct rte_eth_xstat_name *xstats_names, unsigned limit); -static void eth_igbvf_stats_reset(struct rte_eth_dev *dev); +static int eth_igbvf_stats_reset(struct rte_eth_dev *dev); static int igbvf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on); static int igbvf_set_vfta(struct e1000_hw *hw, uint16_t vid, bool on); static void igbvf_set_vfta_all(struct rte_eth_dev *dev, bool on); -static void igbvf_default_mac_addr_set(struct rte_eth_dev *dev, - struct ether_addr *addr); +static int igbvf_default_mac_addr_set(struct rte_eth_dev *dev, + struct rte_ether_addr *addr); static int igbvf_get_reg_length(struct rte_eth_dev *dev); static int igbvf_get_regs(struct rte_eth_dev *dev, struct rte_dev_reg_info *regs); @@ -224,8 +226,12 @@ static int eth_igb_get_eeprom(struct rte_eth_dev *dev, struct rte_dev_eeprom_info *eeprom); static int eth_igb_set_eeprom(struct rte_eth_dev *dev, struct rte_dev_eeprom_info *eeprom); +static int eth_igb_get_module_info(struct rte_eth_dev *dev, + struct rte_eth_dev_module_info *modinfo); +static int eth_igb_get_module_eeprom(struct rte_eth_dev *dev, + struct rte_dev_eeprom_info *info); static int eth_igb_set_mc_addr_list(struct rte_eth_dev *dev, - struct ether_addr *mc_addr_set, + struct rte_ether_addr *mc_addr_set, uint32_t nb_mc_addr); static int igb_timesync_enable(struct rte_eth_dev *dev); static int igb_timesync_disable(struct rte_eth_dev *dev); @@ -350,6 +356,7 @@ static const struct eth_dev_ops eth_igb_ops = { .dev_set_link_up = eth_igb_dev_set_link_up, .dev_set_link_down = eth_igb_dev_set_link_down, .dev_close = eth_igb_close, + .dev_reset = eth_igb_reset, .promiscuous_enable = eth_igb_promiscuous_enable, .promiscuous_disable = eth_igb_promiscuous_disable, .allmulticast_enable = eth_igb_allmulticast_enable, @@ -373,10 +380,6 @@ static const struct eth_dev_ops eth_igb_ops = { .rx_queue_intr_enable = eth_igb_rx_queue_intr_enable, .rx_queue_intr_disable = eth_igb_rx_queue_intr_disable, .rx_queue_release = eth_igb_rx_queue_release, - .rx_queue_count = eth_igb_rx_queue_count, - .rx_descriptor_done = eth_igb_rx_descriptor_done, - .rx_descriptor_status = eth_igb_rx_descriptor_status, - .tx_descriptor_status = eth_igb_tx_descriptor_status, .tx_queue_setup = eth_igb_tx_queue_setup, .tx_queue_release = eth_igb_tx_queue_release, .tx_done_cleanup = eth_igb_tx_done_cleanup, @@ -403,6 +406,8 @@ static const struct eth_dev_ops eth_igb_ops = { .get_eeprom_length = eth_igb_get_eeprom_length, .get_eeprom = eth_igb_get_eeprom, .set_eeprom = eth_igb_set_eeprom, + .get_module_info = eth_igb_get_module_info, + .get_module_eeprom = eth_igb_get_module_eeprom, .timesync_adjust_time = igb_timesync_adjust_time, .timesync_read_time = igb_timesync_read_time, .timesync_write_time = igb_timesync_write_time, @@ -434,6 +439,7 @@ static const struct eth_dev_ops igbvf_eth_dev_ops = { .rx_queue_release = eth_igb_rx_queue_release, .tx_queue_setup = eth_igb_tx_queue_setup, .tx_queue_release = eth_igb_tx_queue_release, + .tx_done_cleanup = eth_igb_tx_done_cleanup, .set_mc_addr_list = eth_igb_set_mc_addr_list, .rxq_info_get = igb_rxq_info_get, .txq_info_get = igb_txq_info_get, @@ -522,57 +528,6 @@ static const struct rte_igb_xstats_name_off rte_igbvf_stats_strings[] = { #define IGBVF_NB_XSTATS (sizeof(rte_igbvf_stats_strings) / \ sizeof(rte_igbvf_stats_strings[0])) -/** - * Atomically reads the link status information from global - * structure rte_eth_dev. - * - * @param dev - * - Pointer to the structure rte_eth_dev to read from. - * - Pointer to the buffer to be saved with the link status. - * - * @return - * - On success, zero. - * - On failure, negative value. - */ -static inline int -rte_igb_dev_atomic_read_link_status(struct rte_eth_dev *dev, - struct rte_eth_link *link) -{ - struct rte_eth_link *dst = link; - struct rte_eth_link *src = &(dev->data->dev_link); - - if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst, - *(uint64_t *)src) == 0) - return -1; - - return 0; -} - -/** - * Atomically writes the link status information into global - * structure rte_eth_dev. - * - * @param dev - * - Pointer to the structure rte_eth_dev to read from. - * - Pointer to the buffer to be saved with the link status. - * - * @return - * - On success, zero. - * - On failure, negative value. - */ -static inline int -rte_igb_dev_atomic_write_link_status(struct rte_eth_dev *dev, - struct rte_eth_link *link) -{ - struct rte_eth_link *dst = &(dev->data->dev_link); - struct rte_eth_link *src = link; - - if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst, - *(uint64_t *)src) == 0) - return -1; - - return 0; -} static inline void igb_intr_enable(struct rte_eth_dev *dev) @@ -581,14 +536,31 @@ igb_intr_enable(struct rte_eth_dev *dev) E1000_DEV_PRIVATE_TO_INTR(dev->data->dev_private); struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); + struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); + struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; + + if (rte_intr_allow_others(intr_handle) && + dev->data->dev_conf.intr_conf.lsc != 0) { + E1000_WRITE_REG(hw, E1000_EIMS, 1 << IGB_MSIX_OTHER_INTR_VEC); + } E1000_WRITE_REG(hw, E1000_IMS, intr->mask); E1000_WRITE_FLUSH(hw); } static void -igb_intr_disable(struct e1000_hw *hw) +igb_intr_disable(struct rte_eth_dev *dev) { + struct e1000_hw *hw = + E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); + struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); + struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; + + if (rte_intr_allow_others(intr_handle) && + dev->data->dev_conf.intr_conf.lsc != 0) { + E1000_WRITE_REG(hw, E1000_EIMC, 1 << IGB_MSIX_OTHER_INTR_VEC); + } + E1000_WRITE_REG(hw, E1000_IMC, ~0); E1000_WRITE_FLUSH(hw); } @@ -775,6 +747,10 @@ eth_igb_dev_init(struct rte_eth_dev *eth_dev) uint32_t ctrl_ext; eth_dev->dev_ops = ð_igb_ops; + eth_dev->rx_queue_count = eth_igb_rx_queue_count; + eth_dev->rx_descriptor_done = eth_igb_rx_descriptor_done; + eth_dev->rx_descriptor_status = eth_igb_rx_descriptor_status; + eth_dev->tx_descriptor_status = eth_igb_tx_descriptor_status; eth_dev->rx_pkt_burst = ð_igb_recv_pkts; eth_dev->tx_pkt_burst = ð_igb_xmit_pkts; eth_dev->tx_pkt_prepare = ð_igb_prep_pkts; @@ -852,17 +828,23 @@ eth_igb_dev_init(struct rte_eth_dev *eth_dev) /* Allocate memory for storing MAC addresses */ eth_dev->data->mac_addrs = rte_zmalloc("e1000", - ETHER_ADDR_LEN * hw->mac.rar_entry_count, 0); + RTE_ETHER_ADDR_LEN * hw->mac.rar_entry_count, 0); if (eth_dev->data->mac_addrs == NULL) { PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to " "store MAC addresses", - ETHER_ADDR_LEN * hw->mac.rar_entry_count); + RTE_ETHER_ADDR_LEN * hw->mac.rar_entry_count); error = -ENOMEM; goto err_late; } /* Copy the permanent MAC address */ - ether_addr_copy((struct ether_addr *)hw->mac.addr, ð_dev->data->mac_addrs[0]); + rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.addr, + ð_dev->data->mac_addrs[0]); + + /* Pass the information to the rte_eth_dev_close() that it should also + * release the private port resources. + */ + eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE; /* initialize the vfta */ memset(shadow_vfta, 0, sizeof(*shadow_vfta)); @@ -907,6 +889,8 @@ eth_igb_dev_init(struct rte_eth_dev *eth_dev) /* enable support intr */ igb_intr_enable(eth_dev); + eth_igb_dev_set_link_down(eth_dev); + /* initialize filter info */ memset(filter_info, 0, sizeof(struct e1000_filter_info)); @@ -933,64 +917,12 @@ err_late: static int eth_igb_dev_uninit(struct rte_eth_dev *eth_dev) { - struct rte_pci_device *pci_dev; - struct rte_intr_handle *intr_handle; - struct e1000_hw *hw; - struct e1000_adapter *adapter = - E1000_DEV_PRIVATE(eth_dev->data->dev_private); - struct e1000_filter_info *filter_info = - E1000_DEV_PRIVATE_TO_FILTER_INFO(eth_dev->data->dev_private); - PMD_INIT_FUNC_TRACE(); if (rte_eal_process_type() != RTE_PROC_PRIMARY) - return -EPERM; - - hw = E1000_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private); - pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); - intr_handle = &pci_dev->intr_handle; - - if (adapter->stopped == 0) - eth_igb_close(eth_dev); - - eth_dev->dev_ops = NULL; - eth_dev->rx_pkt_burst = NULL; - eth_dev->tx_pkt_burst = NULL; - - /* Reset any pending lock */ - igb_reset_swfw_lock(hw); - - rte_free(eth_dev->data->mac_addrs); - eth_dev->data->mac_addrs = NULL; - - /* uninitialize PF if max_vfs not zero */ - igb_pf_host_uninit(eth_dev); - - /* disable uio intr before callback unregister */ - rte_intr_disable(intr_handle); - rte_intr_callback_unregister(intr_handle, - eth_igb_interrupt_handler, eth_dev); - - /* clear the SYN filter info */ - filter_info->syn_info = 0; - - /* clear the ethertype filters info */ - filter_info->ethertype_mask = 0; - memset(filter_info->ethertype_filters, 0, - E1000_MAX_ETQF_FILTERS * sizeof(struct igb_ethertype_filter)); - - /* clear the rss filter info */ - memset(&filter_info->rss_info, 0, - sizeof(struct igb_rte_flow_rss_conf)); - - /* remove all ntuple filters of the device */ - igb_ntuple_filter_uninit(eth_dev); - - /* remove all flex filters of the device */ - igb_flex_filter_uninit(eth_dev); + return 0; - /* clear all the filters list */ - igb_filterlist_flush(eth_dev); + eth_igb_close(eth_dev); return 0; } @@ -1008,11 +940,15 @@ eth_igbvf_dev_init(struct rte_eth_dev *eth_dev) struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private); int diag; - struct ether_addr *perm_addr = (struct ether_addr *)hw->mac.perm_addr; + struct rte_ether_addr *perm_addr = + (struct rte_ether_addr *)hw->mac.perm_addr; PMD_INIT_FUNC_TRACE(); eth_dev->dev_ops = &igbvf_eth_dev_ops; + eth_dev->rx_descriptor_done = eth_igb_rx_descriptor_done; + eth_dev->rx_descriptor_status = eth_igb_rx_descriptor_status; + eth_dev->tx_descriptor_status = eth_igb_tx_descriptor_status; eth_dev->rx_pkt_burst = ð_igb_recv_pkts; eth_dev->tx_pkt_burst = ð_igb_xmit_pkts; eth_dev->tx_pkt_prepare = ð_igb_prep_pkts; @@ -1051,19 +987,24 @@ eth_igbvf_dev_init(struct rte_eth_dev *eth_dev) diag = hw->mac.ops.reset_hw(hw); /* Allocate memory for storing MAC addresses */ - eth_dev->data->mac_addrs = rte_zmalloc("igbvf", ETHER_ADDR_LEN * + eth_dev->data->mac_addrs = rte_zmalloc("igbvf", RTE_ETHER_ADDR_LEN * hw->mac.rar_entry_count, 0); if (eth_dev->data->mac_addrs == NULL) { PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to store MAC " "addresses", - ETHER_ADDR_LEN * hw->mac.rar_entry_count); + RTE_ETHER_ADDR_LEN * hw->mac.rar_entry_count); return -ENOMEM; } + /* Pass the information to the rte_eth_dev_close() that it should also + * release the private port resources. + */ + eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE; + /* Generate a random MAC address, if none was assigned by PF. */ - if (is_zero_ether_addr(perm_addr)) { - eth_random_addr(perm_addr->addr_bytes); + if (rte_is_zero_ether_addr(perm_addr)) { + rte_eth_random_addr(perm_addr->addr_bytes); PMD_INIT_LOG(INFO, "\tVF MAC address not assigned by Host PF"); PMD_INIT_LOG(INFO, "\tAssign randomly generated MAC address " "%02x:%02x:%02x:%02x:%02x:%02x", @@ -1082,7 +1023,7 @@ eth_igbvf_dev_init(struct rte_eth_dev *eth_dev) return diag; } /* Copy the permanent MAC address */ - ether_addr_copy((struct ether_addr *) hw->mac.perm_addr, + rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.perm_addr, ð_dev->data->mac_addrs[0]); PMD_INIT_LOG(DEBUG, "port %d vendorID=0x%x deviceID=0x%x " @@ -1100,30 +1041,12 @@ eth_igbvf_dev_init(struct rte_eth_dev *eth_dev) static int eth_igbvf_dev_uninit(struct rte_eth_dev *eth_dev) { - struct e1000_adapter *adapter = - E1000_DEV_PRIVATE(eth_dev->data->dev_private); - struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); - PMD_INIT_FUNC_TRACE(); if (rte_eal_process_type() != RTE_PROC_PRIMARY) - return -EPERM; - - if (adapter->stopped == 0) - igbvf_dev_close(eth_dev); - - eth_dev->dev_ops = NULL; - eth_dev->rx_pkt_burst = NULL; - eth_dev->tx_pkt_burst = NULL; + return 0; - rte_free(eth_dev->data->mac_addrs); - eth_dev->data->mac_addrs = NULL; - - /* disable uio intr before callback unregister */ - rte_intr_disable(&pci_dev->intr_handle); - rte_intr_callback_unregister(&pci_dev->intr_handle, - eth_igbvf_interrupt_handler, - (void *)eth_dev); + igbvf_dev_close(eth_dev); return 0; } @@ -1142,8 +1065,7 @@ static int eth_igb_pci_remove(struct rte_pci_device *pci_dev) static struct rte_pci_driver rte_igb_pmd = { .id_table = pci_id_igb_map, - .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC | - RTE_PCI_DRV_IOVA_AS_VA, + .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC, .probe = eth_igb_pci_probe, .remove = eth_igb_pci_remove, }; @@ -1166,7 +1088,7 @@ static int eth_igbvf_pci_remove(struct rte_pci_device *pci_dev) */ static struct rte_pci_driver rte_igbvf_pmd = { .id_table = pci_id_igbvf_map, - .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_IOVA_AS_VA, + .drv_flags = RTE_PCI_DRV_NEED_MAPPING, .probe = eth_igbvf_pci_probe, .remove = eth_igbvf_pci_remove, }; @@ -1263,6 +1185,9 @@ eth_igb_configure(struct rte_eth_dev *dev) PMD_INIT_FUNC_TRACE(); + if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) + dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; + /* multipe queue mode checking */ ret = igb_check_mq_mode(dev); if (ret != 0) { @@ -1277,6 +1202,31 @@ eth_igb_configure(struct rte_eth_dev *dev) return 0; } +static void +eth_igb_rxtx_control(struct rte_eth_dev *dev, + bool enable) +{ + struct e1000_hw *hw = + E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); + uint32_t tctl, rctl; + + tctl = E1000_READ_REG(hw, E1000_TCTL); + rctl = E1000_READ_REG(hw, E1000_RCTL); + + if (enable) { + /* enable Tx/Rx */ + tctl |= E1000_TCTL_EN; + rctl |= E1000_RCTL_EN; + } else { + /* disable Tx/Rx */ + tctl &= ~E1000_TCTL_EN; + rctl &= ~E1000_RCTL_EN; + } + E1000_WRITE_REG(hw, E1000_TCTL, tctl); + E1000_WRITE_REG(hw, E1000_RCTL, rctl); + E1000_WRITE_FLUSH(hw); +} + static int eth_igb_start(struct rte_eth_dev *dev) { @@ -1323,7 +1273,8 @@ eth_igb_start(struct rte_eth_dev *dev) } adapter->stopped = 0; - E1000_WRITE_REG(hw, E1000_VET, ETHER_TYPE_VLAN << 16 | ETHER_TYPE_VLAN); + E1000_WRITE_REG(hw, E1000_VET, + RTE_ETHER_TYPE_VLAN << 16 | RTE_ETHER_TYPE_VLAN); ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT); /* Set PF Reset Done bit so PF/VF Mail Ops can work */ @@ -1480,6 +1431,9 @@ eth_igb_start(struct rte_eth_dev *dev) /* restore all types filter */ igb_filter_restore(dev); + eth_igb_rxtx_control(dev, true); + eth_igb_link_update(dev, 0); + PMD_INIT_LOG(DEBUG, "<<"); return 0; @@ -1504,8 +1458,15 @@ eth_igb_stop(struct rte_eth_dev *dev) struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); struct rte_eth_link link; struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; + struct e1000_adapter *adapter = + E1000_DEV_PRIVATE(dev->data->dev_private); + + if (adapter->stopped) + return; + + eth_igb_rxtx_control(dev, false); - igb_intr_disable(hw); + igb_intr_disable(dev); /* disable intr eventfd mapping */ rte_intr_disable(intr_handle); @@ -1513,8 +1474,9 @@ eth_igb_stop(struct rte_eth_dev *dev) igb_pf_reset_hw(hw); E1000_WRITE_REG(hw, E1000_WUC, 0); - /* Set bit for Go Link disconnect */ - if (hw->mac.type >= e1000_82580) { + /* Set bit for Go Link disconnect if PHY reset is not blocked */ + if (hw->mac.type >= e1000_82580 && + (e1000_check_reset_block(hw) != E1000_BLK_PHY_RESET)) { uint32_t phpm_reg; phpm_reg = E1000_READ_REG(hw, E1000_82580_PHY_POWER_MGMT); @@ -1529,7 +1491,7 @@ eth_igb_stop(struct rte_eth_dev *dev) /* clear the recorded link status */ memset(&link, 0, sizeof(link)); - rte_igb_dev_atomic_write_link_status(dev, &link); + rte_eth_linkstatus_set(dev, &link); if (!rte_intr_allow_others(intr_handle)) /* resume to the default handler */ @@ -1543,6 +1505,8 @@ eth_igb_stop(struct rte_eth_dev *dev) rte_free(intr_handle->intr_vec); intr_handle->intr_vec = NULL; } + + adapter->stopped = true; } static int @@ -1571,25 +1535,25 @@ eth_igb_dev_set_link_down(struct rte_eth_dev *dev) return 0; } -static void +static int eth_igb_close(struct rte_eth_dev *dev) { struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); - struct e1000_adapter *adapter = - E1000_DEV_PRIVATE(dev->data->dev_private); struct rte_eth_link link; struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; + struct e1000_filter_info *filter_info = + E1000_DEV_PRIVATE_TO_FILTER_INFO(dev->data->dev_private); eth_igb_stop(dev); - adapter->stopped = 1; e1000_phy_hw_reset(hw); igb_release_manageability(hw); igb_hw_control_release(hw); - /* Clear bit for Go Link disconnect */ - if (hw->mac.type >= e1000_82580) { + /* Clear bit for Go Link disconnect if PHY reset is not blocked */ + if (hw->mac.type >= e1000_82580 && + (e1000_check_reset_block(hw) != E1000_BLK_PHY_RESET)) { uint32_t phpm_reg; phpm_reg = E1000_READ_REG(hw, E1000_82580_PHY_POWER_MGMT); @@ -1605,9 +1569,72 @@ eth_igb_close(struct rte_eth_dev *dev) } memset(&link, 0, sizeof(link)); - rte_igb_dev_atomic_write_link_status(dev, &link); + rte_eth_linkstatus_set(dev, &link); + + dev->dev_ops = NULL; + dev->rx_pkt_burst = NULL; + dev->tx_pkt_burst = NULL; + + /* Reset any pending lock */ + igb_reset_swfw_lock(hw); + + /* uninitialize PF if max_vfs not zero */ + igb_pf_host_uninit(dev); + + rte_intr_callback_unregister(intr_handle, + eth_igb_interrupt_handler, dev); + + /* clear the SYN filter info */ + filter_info->syn_info = 0; + + /* clear the ethertype filters info */ + filter_info->ethertype_mask = 0; + memset(filter_info->ethertype_filters, 0, + E1000_MAX_ETQF_FILTERS * sizeof(struct igb_ethertype_filter)); + + /* clear the rss filter info */ + memset(&filter_info->rss_info, 0, + sizeof(struct igb_rte_flow_rss_conf)); + + /* remove all ntuple filters of the device */ + igb_ntuple_filter_uninit(dev); + + /* remove all flex filters of the device */ + igb_flex_filter_uninit(dev); + + /* clear all the filters list */ + igb_filterlist_flush(dev); + + return 0; +} + +/* + * Reset PF device. + */ +static int +eth_igb_reset(struct rte_eth_dev *dev) +{ + int ret; + + /* When a DPDK PMD PF begin to reset PF port, it should notify all + * its VF to make them align with it. The detailed notification + * mechanism is PMD specific and is currently not implemented. + * To avoid unexpected behavior in VF, currently reset of PF with + * SR-IOV activation is not supported. It might be supported later. + */ + if (dev->data->sriov.active) + return -ENOTSUP; + + ret = eth_igb_dev_uninit(dev); + if (ret) + return ret; + + ret = eth_igb_dev_init(dev); + + return ret; } + static int igb_get_rx_buffer_size(struct e1000_hw *hw) { @@ -1658,7 +1685,7 @@ igb_hardware_init(struct e1000_hw *hw) */ rx_buf_size = igb_get_rx_buffer_size(hw); - hw->fc.high_water = rx_buf_size - (ETHER_MAX_LEN * 2); + hw->fc.high_water = rx_buf_size - (RTE_ETHER_MAX_LEN * 2); hw->fc.low_water = hw->fc.high_water - 1500; hw->fc.pause_time = IGB_FC_PAUSE_TIME; hw->fc.send_xon = 1; @@ -1677,7 +1704,8 @@ igb_hardware_init(struct e1000_hw *hw) if (diag < 0) return diag; - E1000_WRITE_REG(hw, E1000_VET, ETHER_TYPE_VLAN << 16 | ETHER_TYPE_VLAN); + E1000_WRITE_REG(hw, E1000_VET, + RTE_ETHER_TYPE_VLAN << 16 | RTE_ETHER_TYPE_VLAN); e1000_get_phy_info(hw); e1000_check_for_link(hw); @@ -1741,10 +1769,10 @@ igb_read_stats_registers(struct e1000_hw *hw, struct e1000_hw_stats *stats) /* Workaround CRC bytes included in size, take away 4 bytes/packet */ stats->gorc += E1000_READ_REG(hw, E1000_GORCL); stats->gorc += ((uint64_t)E1000_READ_REG(hw, E1000_GORCH) << 32); - stats->gorc -= (stats->gprc - old_gprc) * ETHER_CRC_LEN; + stats->gorc -= (stats->gprc - old_gprc) * RTE_ETHER_CRC_LEN; stats->gotc += E1000_READ_REG(hw, E1000_GOTCL); stats->gotc += ((uint64_t)E1000_READ_REG(hw, E1000_GOTCH) << 32); - stats->gotc -= (stats->gptc - old_gptc) * ETHER_CRC_LEN; + stats->gotc -= (stats->gptc - old_gptc) * RTE_ETHER_CRC_LEN; stats->rnbc += E1000_READ_REG(hw, E1000_RNBC); stats->ruc += E1000_READ_REG(hw, E1000_RUC); @@ -1757,10 +1785,10 @@ igb_read_stats_registers(struct e1000_hw *hw, struct e1000_hw_stats *stats) stats->tor += E1000_READ_REG(hw, E1000_TORL); stats->tor += ((uint64_t)E1000_READ_REG(hw, E1000_TORH) << 32); - stats->tor -= (stats->tpr - old_tpr) * ETHER_CRC_LEN; + stats->tor -= (stats->tpr - old_tpr) * RTE_ETHER_CRC_LEN; stats->tot += E1000_READ_REG(hw, E1000_TOTL); stats->tot += ((uint64_t)E1000_READ_REG(hw, E1000_TOTH) << 32); - stats->tot -= (stats->tpt - old_tpt) * ETHER_CRC_LEN; + stats->tot -= (stats->tpt - old_tpt) * RTE_ETHER_CRC_LEN; stats->ptc64 += E1000_READ_REG(hw, E1000_PTC64); stats->ptc127 += E1000_READ_REG(hw, E1000_PTC127); @@ -1794,10 +1822,10 @@ igb_read_stats_registers(struct e1000_hw *hw, struct e1000_hw_stats *stats) stats->htcbdpc += E1000_READ_REG(hw, E1000_HTCBDPC); stats->hgorc += E1000_READ_REG(hw, E1000_HGORCL); stats->hgorc += ((uint64_t)E1000_READ_REG(hw, E1000_HGORCH) << 32); - stats->hgorc -= (stats->rpthc - old_rpthc) * ETHER_CRC_LEN; + stats->hgorc -= (stats->rpthc - old_rpthc) * RTE_ETHER_CRC_LEN; stats->hgotc += E1000_READ_REG(hw, E1000_HGOTCL); stats->hgotc += ((uint64_t)E1000_READ_REG(hw, E1000_HGOTCH) << 32); - stats->hgotc -= (stats->hgptc - old_hgptc) * ETHER_CRC_LEN; + stats->hgotc -= (stats->hgptc - old_hgptc) * RTE_ETHER_CRC_LEN; stats->lenerrs += E1000_READ_REG(hw, E1000_LENERRS); stats->scvpc += E1000_READ_REG(hw, E1000_SCVPC); stats->hrmpc += E1000_READ_REG(hw, E1000_HRMPC); @@ -1838,7 +1866,7 @@ eth_igb_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *rte_stats) return 0; } -static void +static int eth_igb_stats_reset(struct rte_eth_dev *dev) { struct e1000_hw_stats *hw_stats = @@ -1849,9 +1877,11 @@ eth_igb_stats_reset(struct rte_eth_dev *dev) /* Reset software totals */ memset(hw_stats, 0, sizeof(*hw_stats)); + + return 0; } -static void +static int eth_igb_xstats_reset(struct rte_eth_dev *dev) { struct e1000_hw_stats *stats = @@ -1862,6 +1892,8 @@ eth_igb_xstats_reset(struct rte_eth_dev *dev) /* Reset software totals */ memset(stats, 0, sizeof(*stats)); + + return 0; } static int eth_igb_xstats_get_names(__rte_unused struct rte_eth_dev *dev, @@ -1876,8 +1908,8 @@ static int eth_igb_xstats_get_names(__rte_unused struct rte_eth_dev *dev, /* Note: limit checked in rte_eth_xstats_names() */ for (i = 0; i < IGB_NB_XSTATS; i++) { - snprintf(xstats_names[i].name, sizeof(xstats_names[i].name), - "%s", rte_igb_stats_strings[i].name); + strlcpy(xstats_names[i].name, rte_igb_stats_strings[i].name, + sizeof(xstats_names[i].name)); } return IGB_NB_XSTATS; @@ -1894,9 +1926,9 @@ static int eth_igb_xstats_get_names_by_id(struct rte_eth_dev *dev, return IGB_NB_XSTATS; for (i = 0; i < IGB_NB_XSTATS; i++) - snprintf(xstats_names[i].name, - sizeof(xstats_names[i].name), - "%s", rte_igb_stats_strings[i].name); + strlcpy(xstats_names[i].name, + rte_igb_stats_strings[i].name, + sizeof(xstats_names[i].name)); return IGB_NB_XSTATS; @@ -2043,9 +2075,9 @@ static int eth_igbvf_xstats_get_names(__rte_unused struct rte_eth_dev *dev, if (xstats_names != NULL) for (i = 0; i < IGBVF_NB_XSTATS; i++) { - snprintf(xstats_names[i].name, - sizeof(xstats_names[i].name), "%s", - rte_igbvf_stats_strings[i].name); + strlcpy(xstats_names[i].name, + rte_igbvf_stats_strings[i].name, + sizeof(xstats_names[i].name)); } return IGBVF_NB_XSTATS; } @@ -2095,7 +2127,7 @@ eth_igbvf_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *rte_stats) return 0; } -static void +static int eth_igbvf_stats_reset(struct rte_eth_dev *dev) { struct e1000_vf_stats *hw_stats = (struct e1000_vf_stats*) @@ -2107,6 +2139,8 @@ eth_igbvf_stats_reset(struct rte_eth_dev *dev) /* reset HW current stats*/ memset(&hw_stats->gprc, 0, sizeof(*hw_stats) - offsetof(struct e1000_vf_stats, gprc)); + + return 0; } static int @@ -2161,27 +2195,20 @@ eth_igb_fw_version_get(struct rte_eth_dev *dev, char *fw_version, return 0; } -static void +static int eth_igb_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) { struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); - dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(dev); dev_info->min_rx_bufsize = 256; /* See BSIZE field of RCTL register. */ dev_info->max_rx_pktlen = 0x3FFF; /* See RLPML register. */ dev_info->max_mac_addrs = hw->mac.rar_entry_count; - dev_info->rx_offload_capa = - DEV_RX_OFFLOAD_VLAN_STRIP | - DEV_RX_OFFLOAD_IPV4_CKSUM | - DEV_RX_OFFLOAD_UDP_CKSUM | - DEV_RX_OFFLOAD_TCP_CKSUM; - dev_info->tx_offload_capa = - DEV_TX_OFFLOAD_VLAN_INSERT | - DEV_TX_OFFLOAD_IPV4_CKSUM | - DEV_TX_OFFLOAD_UDP_CKSUM | - DEV_TX_OFFLOAD_TCP_CKSUM | - DEV_TX_OFFLOAD_SCTP_CKSUM | - DEV_TX_OFFLOAD_TCP_TSO; + dev_info->rx_queue_offload_capa = igb_get_rx_queue_offloads_capa(dev); + dev_info->rx_offload_capa = igb_get_rx_port_offloads_capa(dev) | + dev_info->rx_queue_offload_capa; + dev_info->tx_queue_offload_capa = igb_get_tx_queue_offloads_capa(dev); + dev_info->tx_offload_capa = igb_get_tx_port_offloads_capa(dev) | + dev_info->tx_queue_offload_capa; switch (hw->mac.type) { case e1000_82575: @@ -2230,7 +2257,7 @@ eth_igb_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) default: /* Should not happen */ - break; + return -EINVAL; } dev_info->hash_key_size = IGB_HKEY_MAX_INDEX * sizeof(uint32_t); dev_info->reta_size = ETH_RSS_RETA_SIZE_128; @@ -2244,6 +2271,7 @@ eth_igb_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) }, .rx_free_thresh = IGB_DEFAULT_RX_FREE_THRESH, .rx_drop_en = 0, + .offloads = 0, }; dev_info->default_txconf = (struct rte_eth_txconf) { @@ -2252,7 +2280,7 @@ eth_igb_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) .hthresh = IGB_DEFAULT_TX_HTHRESH, .wthresh = IGB_DEFAULT_TX_WTHRESH, }, - .txq_flags = 0, + .offloads = 0, }; dev_info->rx_desc_lim = rx_desc_lim; @@ -2261,6 +2289,11 @@ eth_igb_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) dev_info->speed_capa = ETH_LINK_SPEED_10M_HD | ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M_HD | ETH_LINK_SPEED_100M | ETH_LINK_SPEED_1G; + + dev_info->max_mtu = dev_info->max_rx_pktlen - E1000_ETH_OVERHEAD; + dev_info->min_mtu = RTE_ETHER_MIN_MTU; + + return 0; } static const uint32_t * @@ -2290,19 +2323,14 @@ eth_igb_supported_ptypes_get(struct rte_eth_dev *dev) return NULL; } -static void +static int eth_igbvf_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) { struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); - dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(dev); dev_info->min_rx_bufsize = 256; /* See BSIZE field of RCTL register. */ dev_info->max_rx_pktlen = 0x3FFF; /* See RLPML register. */ dev_info->max_mac_addrs = hw->mac.rar_entry_count; - dev_info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP | - DEV_RX_OFFLOAD_IPV4_CKSUM | - DEV_RX_OFFLOAD_UDP_CKSUM | - DEV_RX_OFFLOAD_TCP_CKSUM; dev_info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT | DEV_TX_OFFLOAD_IPV4_CKSUM | DEV_TX_OFFLOAD_UDP_CKSUM | @@ -2320,9 +2348,16 @@ eth_igbvf_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) break; default: /* Should not happen */ - break; + return -EINVAL; } + dev_info->rx_queue_offload_capa = igb_get_rx_queue_offloads_capa(dev); + dev_info->rx_offload_capa = igb_get_rx_port_offloads_capa(dev) | + dev_info->rx_queue_offload_capa; + dev_info->tx_queue_offload_capa = igb_get_tx_queue_offloads_capa(dev); + dev_info->tx_offload_capa = igb_get_tx_port_offloads_capa(dev) | + dev_info->tx_queue_offload_capa; + dev_info->default_rxconf = (struct rte_eth_rxconf) { .rx_thresh = { .pthresh = IGB_DEFAULT_RX_PTHRESH, @@ -2331,6 +2366,7 @@ eth_igbvf_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) }, .rx_free_thresh = IGB_DEFAULT_RX_FREE_THRESH, .rx_drop_en = 0, + .offloads = 0, }; dev_info->default_txconf = (struct rte_eth_txconf) { @@ -2339,11 +2375,13 @@ eth_igbvf_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) .hthresh = IGB_DEFAULT_TX_HTHRESH, .wthresh = IGB_DEFAULT_TX_WTHRESH, }, - .txq_flags = 0, + .offloads = 0, }; dev_info->rx_desc_lim = rx_desc_lim; dev_info->tx_desc_lim = tx_desc_lim; + + return 0; } /* return 0 means link status changed, -1 means not changed */ @@ -2352,7 +2390,7 @@ eth_igb_link_update(struct rte_eth_dev *dev, int wait_to_complete) { struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); - struct rte_eth_link link, old; + struct rte_eth_link link; int link_check, count; link_check = 0; @@ -2393,8 +2431,6 @@ eth_igb_link_update(struct rte_eth_dev *dev, int wait_to_complete) rte_delay_ms(IGB_LINK_UPDATE_CHECK_INTERVAL); } memset(&link, 0, sizeof(link)); - rte_igb_dev_atomic_read_link_status(dev, &link); - old = link; /* Now we check if a transition has happened */ if (link_check) { @@ -2413,14 +2449,8 @@ eth_igb_link_update(struct rte_eth_dev *dev, int wait_to_complete) link.link_status = ETH_LINK_DOWN; link.link_autoneg = ETH_LINK_FIXED; } - rte_igb_dev_atomic_write_link_status(dev, &link); - /* not changed */ - if (old.link_status == link.link_status) - return -1; - - /* changed */ - return 0; + return rte_eth_linkstatus_set(dev, &link); } /* @@ -2491,7 +2521,7 @@ igb_release_manageability(struct e1000_hw *hw) } } -static void +static int eth_igb_promiscuous_enable(struct rte_eth_dev *dev) { struct e1000_hw *hw = @@ -2501,9 +2531,11 @@ eth_igb_promiscuous_enable(struct rte_eth_dev *dev) rctl = E1000_READ_REG(hw, E1000_RCTL); rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); E1000_WRITE_REG(hw, E1000_RCTL, rctl); + + return 0; } -static void +static int eth_igb_promiscuous_disable(struct rte_eth_dev *dev) { struct e1000_hw *hw = @@ -2517,9 +2549,11 @@ eth_igb_promiscuous_disable(struct rte_eth_dev *dev) else rctl &= (~E1000_RCTL_MPE); E1000_WRITE_REG(hw, E1000_RCTL, rctl); + + return 0; } -static void +static int eth_igb_allmulticast_enable(struct rte_eth_dev *dev) { struct e1000_hw *hw = @@ -2529,9 +2563,11 @@ eth_igb_allmulticast_enable(struct rte_eth_dev *dev) rctl = E1000_READ_REG(hw, E1000_RCTL); rctl |= E1000_RCTL_MPE; E1000_WRITE_REG(hw, E1000_RCTL, rctl); + + return 0; } -static void +static int eth_igb_allmulticast_disable(struct rte_eth_dev *dev) { struct e1000_hw *hw = @@ -2539,10 +2575,12 @@ eth_igb_allmulticast_disable(struct rte_eth_dev *dev) uint32_t rctl; if (dev->data->promiscuous == 1) - return; /* must remain in all_multicast mode */ + return 0; /* must remain in all_multicast mode */ rctl = E1000_READ_REG(hw, E1000_RCTL); rctl &= (~E1000_RCTL_MPE); E1000_WRITE_REG(hw, E1000_RCTL, rctl); + + return 0; } static int @@ -2674,7 +2712,7 @@ igb_vlan_hw_extend_disable(struct rte_eth_dev *dev) E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg); /* Update maximum packet length */ - if (dev->data->dev_conf.rxmode.jumbo_frame == 1) + if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) E1000_WRITE_REG(hw, E1000_RLPML, dev->data->dev_conf.rxmode.max_rx_pkt_len + VLAN_TAG_SIZE); @@ -2693,7 +2731,7 @@ igb_vlan_hw_extend_enable(struct rte_eth_dev *dev) E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg); /* Update maximum packet length */ - if (dev->data->dev_conf.rxmode.jumbo_frame == 1) + if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) E1000_WRITE_REG(hw, E1000_RLPML, dev->data->dev_conf.rxmode.max_rx_pkt_len + 2 * VLAN_TAG_SIZE); @@ -2702,22 +2740,25 @@ igb_vlan_hw_extend_enable(struct rte_eth_dev *dev) static int eth_igb_vlan_offload_set(struct rte_eth_dev *dev, int mask) { + struct rte_eth_rxmode *rxmode; + + rxmode = &dev->data->dev_conf.rxmode; if(mask & ETH_VLAN_STRIP_MASK){ - if (dev->data->dev_conf.rxmode.hw_vlan_strip) + if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) igb_vlan_hw_strip_enable(dev); else igb_vlan_hw_strip_disable(dev); } if(mask & ETH_VLAN_FILTER_MASK){ - if (dev->data->dev_conf.rxmode.hw_vlan_filter) + if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER) igb_vlan_hw_filter_enable(dev); else igb_vlan_hw_filter_disable(dev); } if(mask & ETH_VLAN_EXTEND_MASK){ - if (dev->data->dev_conf.rxmode.hw_vlan_extend) + if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_EXTEND) igb_vlan_hw_extend_enable(dev); else igb_vlan_hw_extend_disable(dev); @@ -2766,14 +2807,20 @@ eth_igb_lsc_interrupt_setup(struct rte_eth_dev *dev, uint8_t on) static int eth_igb_rxq_interrupt_setup(struct rte_eth_dev *dev) { uint32_t mask, regval; + int ret; struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); + struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); + struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; + int misc_shift = rte_intr_allow_others(intr_handle) ? 1 : 0; struct rte_eth_dev_info dev_info; memset(&dev_info, 0, sizeof(dev_info)); - eth_igb_infos_get(dev, &dev_info); + ret = eth_igb_infos_get(dev, &dev_info); + if (ret != 0) + return ret; - mask = 0xFFFFFFFF >> (32 - dev_info.max_rx_queues); + mask = (0xFFFFFFFF >> (32 - dev_info.max_rx_queues)) << misc_shift; regval = E1000_READ_REG(hw, E1000_EIMS); E1000_WRITE_REG(hw, E1000_EIMS, regval | mask); @@ -2800,7 +2847,7 @@ eth_igb_interrupt_get_status(struct rte_eth_dev *dev) struct e1000_interrupt *intr = E1000_DEV_PRIVATE_TO_INTR(dev->data->dev_private); - igb_intr_disable(hw); + igb_intr_disable(dev); /* read-on-clear nic registers here */ icr = E1000_READ_REG(hw, E1000_ICR); @@ -2835,7 +2882,6 @@ eth_igb_interrupt_action(struct rte_eth_dev *dev, struct e1000_interrupt *intr = E1000_DEV_PRIVATE_TO_INTR(dev->data->dev_private); struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); - uint32_t tctl, rctl; struct rte_eth_link link; int ret; @@ -2845,7 +2891,7 @@ eth_igb_interrupt_action(struct rte_eth_dev *dev, } igb_intr_enable(dev); - rte_intr_enable(intr_handle); + rte_intr_ack(intr_handle); if (intr->flags & E1000_FLAG_NEED_LINK_UPDATE) { intr->flags &= ~E1000_FLAG_NEED_LINK_UPDATE; @@ -2858,8 +2904,7 @@ eth_igb_interrupt_action(struct rte_eth_dev *dev, if (ret < 0) return 0; - memset(&link, 0, sizeof(link)); - rte_igb_dev_atomic_read_link_status(dev, &link); + rte_eth_linkstatus_get(dev, &link); if (link.link_status) { PMD_INIT_LOG(INFO, " Port %d: Link Up - speed %u Mbps - %s", @@ -2872,27 +2917,12 @@ eth_igb_interrupt_action(struct rte_eth_dev *dev, dev->data->port_id); } - PMD_INIT_LOG(DEBUG, "PCI Address: %04d:%02d:%02d:%d", + PMD_INIT_LOG(DEBUG, "PCI Address: " PCI_PRI_FMT, pci_dev->addr.domain, pci_dev->addr.bus, pci_dev->addr.devid, pci_dev->addr.function); - tctl = E1000_READ_REG(hw, E1000_TCTL); - rctl = E1000_READ_REG(hw, E1000_RCTL); - if (link.link_status) { - /* enable Tx/Rx */ - tctl |= E1000_TCTL_EN; - rctl |= E1000_RCTL_EN; - } else { - /* disable Tx/Rx */ - tctl &= ~E1000_TCTL_EN; - rctl &= ~E1000_RCTL_EN; - } - E1000_WRITE_REG(hw, E1000_TCTL, tctl); - E1000_WRITE_REG(hw, E1000_RCTL, rctl); - E1000_WRITE_FLUSH(hw); - _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, - NULL); + rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL); } return 0; @@ -2946,13 +2976,17 @@ void igbvf_mbx_process(struct rte_eth_dev *dev) struct e1000_mbx_info *mbx = &hw->mbx; u32 in_msg = 0; - if (mbx->ops.read(hw, &in_msg, 1, 0)) - return; + /* peek the message first */ + in_msg = E1000_READ_REG(hw, E1000_VMBMEM(0)); /* PF reset VF event */ - if (in_msg == E1000_PF_CONTROL_MSG) - _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET, - NULL); + if (in_msg == E1000_PF_CONTROL_MSG) { + /* dummy mbx read to ack pf */ + if (mbx->ops.read(hw, &in_msg, 1, 0)) + return; + rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET, + NULL); + } } static int @@ -2967,7 +3001,7 @@ eth_igbvf_interrupt_action(struct rte_eth_dev *dev, struct rte_intr_handle *intr } igbvf_intr_enable(dev); - rte_intr_enable(intr_handle); + rte_intr_ack(intr_handle); return 0; } @@ -3063,7 +3097,7 @@ eth_igb_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) PMD_INIT_LOG(DEBUG, "Rx packet buffer size = 0x%x", rx_buf_size); /* At least reserve one Ethernet frame for watermark */ - max_high_water = rx_buf_size - ETHER_MAX_LEN; + max_high_water = rx_buf_size - RTE_ETHER_MAX_LEN; if ((fc_conf->high_water > max_high_water) || (fc_conf->high_water < fc_conf->low_water)) { PMD_INIT_LOG(ERR, "e1000 incorrect high/low water value"); @@ -3103,7 +3137,7 @@ eth_igb_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) #define E1000_RAH_POOLSEL_SHIFT (18) static int -eth_igb_rar_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr, +eth_igb_rar_set(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr, uint32_t index, uint32_t pool) { struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); @@ -3119,7 +3153,7 @@ eth_igb_rar_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr, static void eth_igb_rar_clear(struct rte_eth_dev *dev, uint32_t index) { - uint8_t addr[ETHER_ADDR_LEN]; + uint8_t addr[RTE_ETHER_ADDR_LEN]; struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); memset(addr, 0, sizeof(addr)); @@ -3127,13 +3161,14 @@ eth_igb_rar_clear(struct rte_eth_dev *dev, uint32_t index) e1000_rar_set(hw, addr, index); } -static void +static int eth_igb_default_mac_addr_set(struct rte_eth_dev *dev, - struct ether_addr *addr) + struct rte_ether_addr *addr) { eth_igb_rar_clear(dev, 0); - eth_igb_rar_set(dev, (void *)addr, 0, 0); + + return 0; } /* * Virtual Function operations @@ -3156,9 +3191,12 @@ igbvf_stop_adapter(struct rte_eth_dev *dev) u16 i; struct rte_eth_dev_info dev_info; struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); + int ret; memset(&dev_info, 0, sizeof(dev_info)); - eth_igbvf_infos_get(dev, &dev_info); + ret = eth_igbvf_infos_get(dev, &dev_info); + if (ret != 0) + return; /* Clear interrupt mask to stop from interrupts being generated */ igbvf_intr_disable(hw); @@ -3226,19 +3264,22 @@ igbvf_dev_configure(struct rte_eth_dev *dev) PMD_INIT_LOG(DEBUG, "Configured Virtual Function port id: %d", dev->data->port_id); + if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) + dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; + /* * VF has no ability to enable/disable HW CRC * Keep the persistent behavior the same as Host PF */ #ifndef RTE_LIBRTE_E1000_PF_DISABLE_STRIP_CRC - if (!conf->rxmode.hw_strip_crc) { + if (conf->rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC) { PMD_INIT_LOG(NOTICE, "VF can't disable HW CRC Strip"); - conf->rxmode.hw_strip_crc = 1; + conf->rxmode.offloads &= ~DEV_RX_OFFLOAD_KEEP_CRC; } #else - if (conf->rxmode.hw_strip_crc) { + if (!(conf->rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC)) { PMD_INIT_LOG(NOTICE, "VF can't enable HW CRC Strip"); - conf->rxmode.hw_strip_crc = 0; + conf->rxmode.offloads |= DEV_RX_OFFLOAD_KEEP_CRC; } #endif @@ -3276,7 +3317,8 @@ igbvf_dev_start(struct rte_eth_dev *dev) } /* check and configure queue intr-vector mapping */ - if (dev->data->dev_conf.intr_conf.rxq != 0) { + if (rte_intr_cap_multiple(intr_handle) && + dev->data->dev_conf.intr_conf.rxq) { intr_vector = dev->data->nb_rx_queues; ret = rte_intr_efd_enable(intr_handle, intr_vector); if (ret) @@ -3310,6 +3352,11 @@ igbvf_dev_stop(struct rte_eth_dev *dev) { struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; + struct e1000_adapter *adapter = + E1000_DEV_PRIVATE(dev->data->dev_private); + + if (adapter->stopped) + return; PMD_INIT_FUNC_TRACE(); @@ -3332,22 +3379,23 @@ igbvf_dev_stop(struct rte_eth_dev *dev) rte_free(intr_handle->intr_vec); intr_handle->intr_vec = NULL; } + + adapter->stopped = true; } -static void +static int igbvf_dev_close(struct rte_eth_dev *dev) { struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); - struct e1000_adapter *adapter = - E1000_DEV_PRIVATE(dev->data->dev_private); - struct ether_addr addr; + struct rte_ether_addr addr; + struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); PMD_INIT_FUNC_TRACE(); e1000_reset_hw(hw); igbvf_dev_stop(dev); - adapter->stopped = 1; + igb_dev_free_queues(dev); /** @@ -3358,18 +3406,30 @@ igbvf_dev_close(struct rte_eth_dev *dev) memset(&addr, 0, sizeof(addr)); igbvf_default_mac_addr_set(dev, &addr); + + dev->dev_ops = NULL; + dev->rx_pkt_burst = NULL; + dev->tx_pkt_burst = NULL; + + rte_intr_callback_unregister(&pci_dev->intr_handle, + eth_igbvf_interrupt_handler, + (void *)dev); + + return 0; } -static void +static int igbvf_promiscuous_enable(struct rte_eth_dev *dev) { struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); /* Set both unicast and multicast promisc */ e1000_promisc_set_vf(hw, e1000_promisc_enabled); + + return 0; } -static void +static int igbvf_promiscuous_disable(struct rte_eth_dev *dev) { struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); @@ -3379,9 +3439,11 @@ igbvf_promiscuous_disable(struct rte_eth_dev *dev) e1000_promisc_set_vf(hw, e1000_promisc_multicast); else e1000_promisc_set_vf(hw, e1000_promisc_disabled); + + return 0; } -static void +static int igbvf_allmulticast_enable(struct rte_eth_dev *dev) { struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); @@ -3389,9 +3451,11 @@ igbvf_allmulticast_enable(struct rte_eth_dev *dev) /* In promiscuous mode multicast promisc already set */ if (dev->data->promiscuous == 0) e1000_promisc_set_vf(hw, e1000_promisc_multicast); + + return 0; } -static void +static int igbvf_allmulticast_disable(struct rte_eth_dev *dev) { struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); @@ -3399,6 +3463,8 @@ igbvf_allmulticast_disable(struct rte_eth_dev *dev) /* In promiscuous mode leave multicast promisc enabled */ if (dev->data->promiscuous == 0) e1000_promisc_set_vf(hw, e1000_promisc_disabled); + + return 0; } static int igbvf_set_vfta(struct e1000_hw *hw, uint16_t vid, bool on) @@ -3484,14 +3550,15 @@ igbvf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on) return 0; } -static void -igbvf_default_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *addr) +static int +igbvf_default_mac_addr_set(struct rte_eth_dev *dev, struct rte_ether_addr *addr) { struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); /* index is not used by rar_set() */ hw->mac.ops.rar_set(hw, (void *)addr, 0); + return 0; } @@ -3684,7 +3751,7 @@ ntuple_filter_to_2tuple(struct rte_eth_ntuple_filter *filter, return -EINVAL; if (filter->priority > E1000_2TUPLE_MAX_PRI) return -EINVAL; /* filter index is out of range. */ - if (filter->tcp_flags > TCP_FLAG_ALL) + if (filter->tcp_flags > RTE_NTUPLE_TCP_FLAGS_MASK) return -EINVAL; /* flags is invalid. */ switch (filter->dst_port_mask) { @@ -3764,18 +3831,18 @@ igb_inject_2uple_filter(struct rte_eth_dev *dev, ttqf &= ~E1000_TTQF_MASK_ENABLE; /* tcp flags bits setting. */ - if (filter->filter_info.tcp_flags & TCP_FLAG_ALL) { - if (filter->filter_info.tcp_flags & TCP_URG_FLAG) + if (filter->filter_info.tcp_flags & RTE_NTUPLE_TCP_FLAGS_MASK) { + if (filter->filter_info.tcp_flags & RTE_TCP_URG_FLAG) imir_ext |= E1000_IMIREXT_CTRL_URG; - if (filter->filter_info.tcp_flags & TCP_ACK_FLAG) + if (filter->filter_info.tcp_flags & RTE_TCP_ACK_FLAG) imir_ext |= E1000_IMIREXT_CTRL_ACK; - if (filter->filter_info.tcp_flags & TCP_PSH_FLAG) + if (filter->filter_info.tcp_flags & RTE_TCP_PSH_FLAG) imir_ext |= E1000_IMIREXT_CTRL_PSH; - if (filter->filter_info.tcp_flags & TCP_RST_FLAG) + if (filter->filter_info.tcp_flags & RTE_TCP_RST_FLAG) imir_ext |= E1000_IMIREXT_CTRL_RST; - if (filter->filter_info.tcp_flags & TCP_SYN_FLAG) + if (filter->filter_info.tcp_flags & RTE_TCP_SYN_FLAG) imir_ext |= E1000_IMIREXT_CTRL_SYN; - if (filter->filter_info.tcp_flags & TCP_FIN_FLAG) + if (filter->filter_info.tcp_flags & RTE_TCP_FIN_FLAG) imir_ext |= E1000_IMIREXT_CTRL_FIN; } else { imir_ext |= E1000_IMIREXT_CTRL_BP; @@ -4170,7 +4237,7 @@ ntuple_filter_to_5tuple_82576(struct rte_eth_ntuple_filter *filter, return -EINVAL; if (filter->priority > E1000_2TUPLE_MAX_PRI) return -EINVAL; /* filter index is out of range. */ - if (filter->tcp_flags > TCP_FLAG_ALL) + if (filter->tcp_flags > RTE_NTUPLE_TCP_FLAGS_MASK) return -EINVAL; /* flags is invalid. */ switch (filter->dst_ip_mask) { @@ -4300,18 +4367,18 @@ igb_inject_5tuple_filter_82576(struct rte_eth_dev *dev, imir |= filter->filter_info.priority << E1000_IMIR_PRIORITY_SHIFT; /* tcp flags bits setting. */ - if (filter->filter_info.tcp_flags & TCP_FLAG_ALL) { - if (filter->filter_info.tcp_flags & TCP_URG_FLAG) + if (filter->filter_info.tcp_flags & RTE_NTUPLE_TCP_FLAGS_MASK) { + if (filter->filter_info.tcp_flags & RTE_TCP_URG_FLAG) imir_ext |= E1000_IMIREXT_CTRL_URG; - if (filter->filter_info.tcp_flags & TCP_ACK_FLAG) + if (filter->filter_info.tcp_flags & RTE_TCP_ACK_FLAG) imir_ext |= E1000_IMIREXT_CTRL_ACK; - if (filter->filter_info.tcp_flags & TCP_PSH_FLAG) + if (filter->filter_info.tcp_flags & RTE_TCP_PSH_FLAG) imir_ext |= E1000_IMIREXT_CTRL_PSH; - if (filter->filter_info.tcp_flags & TCP_RST_FLAG) + if (filter->filter_info.tcp_flags & RTE_TCP_RST_FLAG) imir_ext |= E1000_IMIREXT_CTRL_RST; - if (filter->filter_info.tcp_flags & TCP_SYN_FLAG) + if (filter->filter_info.tcp_flags & RTE_TCP_SYN_FLAG) imir_ext |= E1000_IMIREXT_CTRL_SYN; - if (filter->filter_info.tcp_flags & TCP_FIN_FLAG) + if (filter->filter_info.tcp_flags & RTE_TCP_FIN_FLAG) imir_ext |= E1000_IMIREXT_CTRL_FIN; } else { imir_ext |= E1000_IMIREXT_CTRL_BP; @@ -4452,8 +4519,8 @@ eth_igb_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) uint32_t rctl; struct e1000_hw *hw; struct rte_eth_dev_info dev_info; - uint32_t frame_size = mtu + (ETHER_HDR_LEN + ETHER_CRC_LEN + - VLAN_TAG_SIZE); + uint32_t frame_size = mtu + E1000_ETH_OVERHEAD; + int ret; hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); @@ -4462,11 +4529,13 @@ eth_igb_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) if (hw->mac.type == e1000_82571) return -ENOTSUP; #endif - eth_igb_infos_get(dev, &dev_info); + ret = eth_igb_infos_get(dev, &dev_info); + if (ret != 0) + return ret; /* check that mtu is within the allowed range */ - if ((mtu < ETHER_MIN_MTU) || - (frame_size > dev_info.max_rx_pktlen)) + if (mtu < RTE_ETHER_MIN_MTU || + frame_size > dev_info.max_rx_pktlen) return -EINVAL; /* refuse mtu that requires the support of scattered packets when this @@ -4478,11 +4547,13 @@ eth_igb_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) rctl = E1000_READ_REG(hw, E1000_RCTL); /* switch to jumbo mode if needed */ - if (frame_size > ETHER_MAX_LEN) { - dev->data->dev_conf.rxmode.jumbo_frame = 1; + if (frame_size > RTE_ETHER_MAX_LEN) { + dev->data->dev_conf.rxmode.offloads |= + DEV_RX_OFFLOAD_JUMBO_FRAME; rctl |= E1000_RCTL_LPE; } else { - dev->data->dev_conf.rxmode.jumbo_frame = 0; + dev->data->dev_conf.rxmode.offloads &= + ~DEV_RX_OFFLOAD_JUMBO_FRAME; rctl &= ~E1000_RCTL_LPE; } E1000_WRITE_REG(hw, E1000_RCTL, rctl); @@ -4722,8 +4793,8 @@ igb_add_del_ethertype_filter(struct rte_eth_dev *dev, uint32_t etqf = 0; int ret; - if (filter->ether_type == ETHER_TYPE_IPv4 || - filter->ether_type == ETHER_TYPE_IPv6) { + if (filter->ether_type == RTE_ETHER_TYPE_IPV4 || + filter->ether_type == RTE_ETHER_TYPE_IPV6) { PMD_DRV_LOG(ERR, "unsupported ether_type(0x%04x) in" " ethertype filter.", filter->ether_type); return -EINVAL; @@ -4885,7 +4956,7 @@ eth_igb_filter_ctrl(struct rte_eth_dev *dev, static int eth_igb_set_mc_addr_list(struct rte_eth_dev *dev, - struct ether_addr *mc_addr_set, + struct rte_ether_addr *mc_addr_set, uint32_t nb_mc_addr) { struct e1000_hw *hw; @@ -5005,8 +5076,7 @@ static void igb_start_timecounters(struct rte_eth_dev *dev) { struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); - struct e1000_adapter *adapter = - (struct e1000_adapter *)dev->data->dev_private; + struct e1000_adapter *adapter = dev->data->dev_private; uint32_t incval = 1; uint32_t shift = 0; uint64_t mask = E1000_CYCLECOUNTER_MASK; @@ -5057,8 +5127,7 @@ igb_start_timecounters(struct rte_eth_dev *dev) static int igb_timesync_adjust_time(struct rte_eth_dev *dev, int64_t delta) { - struct e1000_adapter *adapter = - (struct e1000_adapter *)dev->data->dev_private; + struct e1000_adapter *adapter = dev->data->dev_private; adapter->systime_tc.nsec += delta; adapter->rx_tstamp_tc.nsec += delta; @@ -5071,8 +5140,7 @@ static int igb_timesync_write_time(struct rte_eth_dev *dev, const struct timespec *ts) { uint64_t ns; - struct e1000_adapter *adapter = - (struct e1000_adapter *)dev->data->dev_private; + struct e1000_adapter *adapter = dev->data->dev_private; ns = rte_timespec_to_ns(ts); @@ -5088,8 +5156,7 @@ static int igb_timesync_read_time(struct rte_eth_dev *dev, struct timespec *ts) { uint64_t ns, systime_cycles; - struct e1000_adapter *adapter = - (struct e1000_adapter *)dev->data->dev_private; + struct e1000_adapter *adapter = dev->data->dev_private; systime_cycles = igb_read_systime_cyclecounter(dev); ns = rte_timecounter_update(&adapter->systime_tc, systime_cycles); @@ -5134,7 +5201,7 @@ igb_timesync_enable(struct rte_eth_dev *dev) /* Enable L2 filtering of IEEE1588/802.1AS Ethernet frame types. */ E1000_WRITE_REG(hw, E1000_ETQF(E1000_ETQF_FILTER_1588), - (ETHER_TYPE_1588 | + (RTE_ETHER_TYPE_1588 | E1000_ETQF_FILTER_ENABLE | E1000_ETQF_1588)); @@ -5182,8 +5249,7 @@ igb_timesync_read_rx_timestamp(struct rte_eth_dev *dev, uint32_t flags __rte_unused) { struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); - struct e1000_adapter *adapter = - (struct e1000_adapter *)dev->data->dev_private; + struct e1000_adapter *adapter = dev->data->dev_private; uint32_t tsync_rxctl; uint64_t rx_tstamp_cycles; uint64_t ns; @@ -5204,8 +5270,7 @@ igb_timesync_read_tx_timestamp(struct rte_eth_dev *dev, struct timespec *timestamp) { struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); - struct e1000_adapter *adapter = - (struct e1000_adapter *)dev->data->dev_private; + struct e1000_adapter *adapter = dev->data->dev_private; uint32_t tsync_txctl; uint64_t tx_tstamp_cycles; uint64_t ns; @@ -5363,6 +5428,86 @@ eth_igb_set_eeprom(struct rte_eth_dev *dev, return nvm->ops.write(hw, first, length, data); } +static int +eth_igb_get_module_info(struct rte_eth_dev *dev, + struct rte_eth_dev_module_info *modinfo) +{ + struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); + + uint32_t status = 0; + uint16_t sff8472_rev, addr_mode; + bool page_swap = false; + + if (hw->phy.media_type == e1000_media_type_copper || + hw->phy.media_type == e1000_media_type_unknown) + return -EOPNOTSUPP; + + /* Check whether we support SFF-8472 or not */ + status = e1000_read_phy_reg_i2c(hw, IGB_SFF_8472_COMP, &sff8472_rev); + if (status) + return -EIO; + + /* addressing mode is not supported */ + status = e1000_read_phy_reg_i2c(hw, IGB_SFF_8472_SWAP, &addr_mode); + if (status) + return -EIO; + + /* addressing mode is not supported */ + if ((addr_mode & 0xFF) & IGB_SFF_ADDRESSING_MODE) { + PMD_DRV_LOG(ERR, + "Address change required to access page 0xA2, " + "but not supported. Please report the module " + "type to the driver maintainers.\n"); + page_swap = true; + } + + if ((sff8472_rev & 0xFF) == IGB_SFF_8472_UNSUP || page_swap) { + /* We have an SFP, but it does not support SFF-8472 */ + modinfo->type = RTE_ETH_MODULE_SFF_8079; + modinfo->eeprom_len = RTE_ETH_MODULE_SFF_8079_LEN; + } else { + /* We have an SFP which supports a revision of SFF-8472 */ + modinfo->type = RTE_ETH_MODULE_SFF_8472; + modinfo->eeprom_len = RTE_ETH_MODULE_SFF_8472_LEN; + } + + return 0; +} + +static int +eth_igb_get_module_eeprom(struct rte_eth_dev *dev, + struct rte_dev_eeprom_info *info) +{ + struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); + + uint32_t status = 0; + uint16_t dataword[RTE_ETH_MODULE_SFF_8472_LEN / 2 + 1]; + u16 first_word, last_word; + int i = 0; + + if (info->length == 0) + return -EINVAL; + + first_word = info->offset >> 1; + last_word = (info->offset + info->length - 1) >> 1; + + /* Read EEPROM block, SFF-8079/SFF-8472, word at a time */ + for (i = 0; i < last_word - first_word + 1; i++) { + status = e1000_read_phy_reg_i2c(hw, (first_word + i) * 2, + &dataword[i]); + if (status) { + /* Error occurred while reading module */ + return -EIO; + } + + dataword[i] = rte_be_to_cpu_16(dataword[i]); + } + + memcpy(info->data, (u8 *)dataword + (info->offset & 1), info->length); + + return 0; +} + static int eth_igb_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) { @@ -5402,7 +5547,7 @@ eth_igb_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id) E1000_WRITE_REG(hw, E1000_EIMS, regval | mask); E1000_WRITE_FLUSH(hw); - rte_intr_enable(intr_handle); + rte_intr_ack(intr_handle); return 0; } @@ -5510,13 +5655,17 @@ eth_igb_configure_msix_intr(struct rte_eth_dev *dev) E1000_GPIE_NSICR); intr_mask = RTE_LEN2MASK(intr_handle->nb_efd, uint32_t) << misc_shift; + + if (dev->data->dev_conf.intr_conf.lsc != 0) + intr_mask |= (1 << IGB_MSIX_OTHER_INTR_VEC); + regval = E1000_READ_REG(hw, E1000_EIAC); E1000_WRITE_REG(hw, E1000_EIAC, regval | intr_mask); /* enable msix_other interrupt */ regval = E1000_READ_REG(hw, E1000_EIMS); E1000_WRITE_REG(hw, E1000_EIMS, regval | intr_mask); - tmpval = (dev->data->nb_rx_queues | E1000_IVAR_VALID) << 8; + tmpval = (IGB_MSIX_OTHER_INTR_VEC | E1000_IVAR_VALID) << 8; E1000_WRITE_REG(hw, E1000_IVAR_MISC, tmpval); } @@ -5525,6 +5674,10 @@ eth_igb_configure_msix_intr(struct rte_eth_dev *dev) */ intr_mask = RTE_LEN2MASK(intr_handle->nb_efd, uint32_t) << misc_shift; + + if (dev->data->dev_conf.intr_conf.lsc != 0) + intr_mask |= (1 << IGB_MSIX_OTHER_INTR_VEC); + regval = E1000_READ_REG(hw, E1000_EIAM); E1000_WRITE_REG(hw, E1000_EIAM, regval | intr_mask); @@ -5611,7 +5764,7 @@ igb_rss_filter_restore(struct rte_eth_dev *dev) struct e1000_filter_info *filter_info = E1000_DEV_PRIVATE_TO_FILTER_INFO(dev->data->dev_private); - if (filter_info->rss_info.num) + if (filter_info->rss_info.conf.queue_num) igb_config_rss_filter(dev, &filter_info->rss_info, TRUE); } @@ -5634,3 +5787,9 @@ RTE_PMD_REGISTER_KMOD_DEP(net_e1000_igb, "* igb_uio | uio_pci_generic | vfio-pci RTE_PMD_REGISTER_PCI(net_e1000_igb_vf, rte_igbvf_pmd); RTE_PMD_REGISTER_PCI_TABLE(net_e1000_igb_vf, pci_id_igbvf_map); RTE_PMD_REGISTER_KMOD_DEP(net_e1000_igb_vf, "* igb_uio | vfio-pci"); + +/* see e1000_logs.c */ +RTE_INIT(e1000_init_log) +{ + e1000_igb_init_log(); +}