X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fenetc%2Fenetc_ethdev.c;h=6ff3022874528a261c75833348fe0cb00d3747e9;hb=bd885ab120e2335f978a28ee0aa4303017390e15;hp=dec42b976389913835567b65cef4295d08e743e0;hpb=bdad90d12ec8eea8c9552880d715f10b0af93cc6;p=dpdk.git diff --git a/drivers/net/enetc/enetc_ethdev.c b/drivers/net/enetc/enetc_ethdev.c index dec42b9763..6ff3022874 100644 --- a/drivers/net/enetc/enetc_ethdev.c +++ b/drivers/net/enetc/enetc_ethdev.c @@ -1,15 +1,15 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright 2018-2019 NXP + * Copyright 2018-2020 NXP */ #include #include +#include +#include #include "enetc_logs.h" #include "enetc.h" -int enetc_logtype_pmd; - static int enetc_dev_start(struct rte_eth_dev *dev) { @@ -45,7 +45,7 @@ enetc_dev_start(struct rte_eth_dev *dev) return 0; } -static void +static int enetc_dev_stop(struct rte_eth_dev *dev) { struct enetc_eth_hw *hw = @@ -54,6 +54,7 @@ enetc_dev_stop(struct rte_eth_dev *dev) uint32_t val; PMD_INIT_FUNC_TRACE(); + dev->data->dev_started = 0; /* Disable port */ val = enetc_port_rd(enetc_hw, ENETC_PMR); enetc_port_wr(enetc_hw, ENETC_PMR, val & (~ENETC_PMR_EN)); @@ -61,6 +62,8 @@ enetc_dev_stop(struct rte_eth_dev *dev) val = enetc_port_rd(enetc_hw, ENETC_PM0_CMD_CFG); enetc_port_wr(enetc_hw, ENETC_PM0_CMD_CFG, val & (~(ENETC_PM0_TX_EN | ENETC_PM0_RX_EN))); + + return 0; } static const uint32_t * @@ -123,23 +126,64 @@ enetc_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused) return rte_eth_linkstatus_set(dev, &link); } +static void +print_ethaddr(const char *name, const struct rte_ether_addr *eth_addr) +{ + char buf[RTE_ETHER_ADDR_FMT_SIZE]; + + rte_ether_format_addr(buf, RTE_ETHER_ADDR_FMT_SIZE, eth_addr); + ENETC_PMD_NOTICE("%s%s\n", name, buf); +} + static int enetc_hardware_init(struct enetc_eth_hw *hw) { struct enetc_hw *enetc_hw = &hw->hw; uint32_t *mac = (uint32_t *)hw->mac.addr; + uint32_t high_mac = 0; + uint16_t low_mac = 0; PMD_INIT_FUNC_TRACE(); /* Calculating and storing the base HW addresses */ hw->hw.port = (void *)((size_t)hw->hw.reg + ENETC_PORT_BASE); hw->hw.global = (void *)((size_t)hw->hw.reg + ENETC_GLOBAL_BASE); + /* WA for Rx lock-up HW erratum */ + enetc_port_wr(enetc_hw, ENETC_PM0_RX_FIFO, 1); + + /* set ENETC transaction flags to coherent, don't allocate. + * BD writes merge with surrounding cache line data, frame data writes + * overwrite cache line. + */ + enetc_wr(enetc_hw, ENETC_SICAR0, ENETC_SICAR0_COHERENT); + /* Enabling Station Interface */ enetc_wr(enetc_hw, ENETC_SIMR, ENETC_SIMR_EN); *mac = (uint32_t)enetc_port_rd(enetc_hw, ENETC_PSIPMAR0(0)); + high_mac = (uint32_t)*mac; mac++; *mac = (uint16_t)enetc_port_rd(enetc_hw, ENETC_PSIPMAR1(0)); + low_mac = (uint16_t)*mac; + + if ((high_mac | low_mac) == 0) { + char *first_byte; + + ENETC_PMD_NOTICE("MAC is not available for this SI, " + "set random MAC\n"); + mac = (uint32_t *)hw->mac.addr; + *mac = (uint32_t)rte_rand(); + first_byte = (char *)mac; + *first_byte &= 0xfe; /* clear multicast bit */ + *first_byte |= 0x02; /* set local assignment bit (IEEE802) */ + + enetc_port_wr(enetc_hw, ENETC_PSIPMAR0(0), *mac); + mac++; + *mac = (uint16_t)rte_rand(); + enetc_port_wr(enetc_hw, ENETC_PSIPMAR1(0), *mac); + print_ethaddr("New address: ", + (const struct rte_ether_addr *)hw->mac.addr); + } return 0; } @@ -178,12 +222,12 @@ enetc_alloc_txbdr(struct enetc_bdr *txr, uint16_t nb_desc) int size; size = nb_desc * sizeof(struct enetc_swbd); - txr->q_swbd = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE); + txr->q_swbd = rte_malloc(NULL, size, ENETC_BD_RING_ALIGN); if (txr->q_swbd == NULL) return -ENOMEM; size = nb_desc * sizeof(struct enetc_tx_bd); - txr->bd_base = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE); + txr->bd_base = rte_malloc(NULL, size, ENETC_BD_RING_ALIGN); if (txr->bd_base == NULL) { rte_free(txr->q_swbd); txr->q_swbd = NULL; @@ -325,12 +369,12 @@ enetc_alloc_rxbdr(struct enetc_bdr *rxr, int size; size = nb_rx_desc * sizeof(struct enetc_swbd); - rxr->q_swbd = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE); + rxr->q_swbd = rte_malloc(NULL, size, ENETC_BD_RING_ALIGN); if (rxr->q_swbd == NULL) return -ENOMEM; size = nb_rx_desc * sizeof(union enetc_rx_bd); - rxr->bd_base = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE); + rxr->bd_base = rte_malloc(NULL, size, ENETC_BD_RING_ALIGN); if (rxr->bd_base == NULL) { rte_free(rxr->q_swbd); rxr->q_swbd = NULL; @@ -492,7 +536,7 @@ int enetc_stats_get(struct rte_eth_dev *dev, return 0; } -static void +static int enetc_stats_reset(struct rte_eth_dev *dev) { struct enetc_eth_hw *hw = @@ -500,15 +544,21 @@ enetc_stats_reset(struct rte_eth_dev *dev) struct enetc_hw *enetc_hw = &hw->hw; enetc_port_wr(enetc_hw, ENETC_PM0_STAT_CONFIG, ENETC_CLEAR_STATS); + + return 0; } -static void +static int enetc_dev_close(struct rte_eth_dev *dev) { uint16_t i; + int ret; PMD_INIT_FUNC_TRACE(); - enetc_dev_stop(dev); + if (rte_eal_process_type() != RTE_PROC_PRIMARY) + return 0; + + ret = enetc_dev_stop(dev); for (i = 0; i < dev->data->nb_rx_queues; i++) { enetc_rx_queue_release(dev->data->rx_queues[i]); @@ -521,9 +571,14 @@ enetc_dev_close(struct rte_eth_dev *dev) dev->data->tx_queues[i] = NULL; } dev->data->nb_tx_queues = 0; + + if (rte_eal_iova_mode() == RTE_IOVA_PA) + dpaax_iova_table_depopulate(); + + return ret; } -static void +static int enetc_promiscuous_enable(struct rte_eth_dev *dev) { struct enetc_eth_hw *hw = @@ -537,9 +592,11 @@ enetc_promiscuous_enable(struct rte_eth_dev *dev) psipmr |= ENETC_PSIPMR_SET_UP(0) | ENETC_PSIPMR_SET_MP(0); enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr); + + return 0; } -static void +static int enetc_promiscuous_disable(struct rte_eth_dev *dev) { struct enetc_eth_hw *hw = @@ -555,9 +612,11 @@ enetc_promiscuous_disable(struct rte_eth_dev *dev) psipmr &= (~ENETC_PSIPMR_SET_MP(0)); enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr); + + return 0; } -static void +static int enetc_allmulticast_enable(struct rte_eth_dev *dev) { struct enetc_eth_hw *hw = @@ -571,9 +630,11 @@ enetc_allmulticast_enable(struct rte_eth_dev *dev) psipmr |= ENETC_PSIPMR_SET_MP(0); enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr); + + return 0; } -static void +static int enetc_allmulticast_disable(struct rte_eth_dev *dev) { struct enetc_eth_hw *hw = @@ -582,13 +643,15 @@ enetc_allmulticast_disable(struct rte_eth_dev *dev) uint32_t psipmr = 0; if (dev->data->promiscuous == 1) - return; /* must remain in all_multicast mode */ + return 0; /* must remain in all_multicast mode */ /* Setting to disable all multicast mode for SI0*/ psipmr = enetc_port_rd(enetc_hw, ENETC_PSIPMR) & ~(ENETC_PSIPMR_SET_MP(0)); enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr); + + return 0; } static int @@ -822,6 +885,8 @@ enetc_dev_init(struct rte_eth_dev *eth_dev) eth_dev->rx_pkt_burst = &enetc_recv_pkts; eth_dev->tx_pkt_burst = &enetc_xmit_pkts; + eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; + /* Retrieving and storing the HW base address of device */ hw->hw.reg = (void *)pci_dev->mem_resource[0].addr; hw->device_id = pci_dev->id.device_id; @@ -853,6 +918,9 @@ enetc_dev_init(struct rte_eth_dev *eth_dev) eth_dev->data->mtu = RTE_ETHER_MAX_LEN - RTE_ETHER_HDR_LEN - RTE_ETHER_CRC_LEN; + if (rte_eal_iova_mode() == RTE_IOVA_PA) + dpaax_iova_table_populate(); + ENETC_PMD_DEBUG("port_id %d vendorID=0x%x deviceID=0x%x", eth_dev->data->port_id, pci_dev->id.vendor_id, pci_dev->id.device_id); @@ -860,10 +928,11 @@ enetc_dev_init(struct rte_eth_dev *eth_dev) } static int -enetc_dev_uninit(struct rte_eth_dev *eth_dev __rte_unused) +enetc_dev_uninit(struct rte_eth_dev *eth_dev) { PMD_INIT_FUNC_TRACE(); - return 0; + + return enetc_dev_close(eth_dev); } static int @@ -891,10 +960,4 @@ static struct rte_pci_driver rte_enetc_pmd = { RTE_PMD_REGISTER_PCI(net_enetc, rte_enetc_pmd); RTE_PMD_REGISTER_PCI_TABLE(net_enetc, pci_id_enetc_map); RTE_PMD_REGISTER_KMOD_DEP(net_enetc, "* vfio-pci"); - -RTE_INIT(enetc_pmd_init_log) -{ - enetc_logtype_pmd = rte_log_register("pmd.net.enetc"); - if (enetc_logtype_pmd >= 0) - rte_log_set_level(enetc_logtype_pmd, RTE_LOG_NOTICE); -} +RTE_LOG_REGISTER(enetc_logtype_pmd, pmd.net.enetc, NOTICE);