X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fenic%2Fenic_ethdev.c;h=ca75919ee235dcfa46519a1f4d76ae9e03f70d7d;hb=61ede39537f45e561dc80eaa23621ce3d2cf9e73;hp=1a129f414a6008701e6cd4ed1a2d067488723dbe;hpb=432ed10d817167007dee7ae81f0ee849dde5d7d2;p=dpdk.git diff --git a/drivers/net/enic/enic_ethdev.c b/drivers/net/enic/enic_ethdev.c index 1a129f414a..ca75919ee2 100644 --- a/drivers/net/enic/enic_ethdev.c +++ b/drivers/net/enic/enic_ethdev.c @@ -21,34 +21,55 @@ #include "vnic_enet.h" #include "enic.h" -int enicpmd_logtype_init; -int enicpmd_logtype_flow; - -#define ENICPMD_FUNC_TRACE() PMD_INIT_LOG(DEBUG, " >>") - /* * The set of PCI devices this driver supports */ #define CISCO_PCI_VENDOR_ID 0x1137 static const struct rte_pci_id pci_id_enic_map[] = { - { RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET) }, - { RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) }, + {RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET)}, + {RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET_VF)}, + {RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET_SN)}, {.vendor_id = 0, /* sentinel */}, }; +/* Supported link speeds of production VIC models */ +static const struct vic_speed_capa { + uint16_t sub_devid; + uint32_t capa; +} vic_speed_capa_map[] = { + { 0x0043, ETH_LINK_SPEED_10G }, /* VIC */ + { 0x0047, ETH_LINK_SPEED_10G }, /* P81E PCIe */ + { 0x0048, ETH_LINK_SPEED_10G }, /* M81KR Mezz */ + { 0x004f, ETH_LINK_SPEED_10G }, /* 1280 Mezz */ + { 0x0084, ETH_LINK_SPEED_10G }, /* 1240 MLOM */ + { 0x0085, ETH_LINK_SPEED_10G }, /* 1225 PCIe */ + { 0x00cd, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G }, /* 1285 PCIe */ + { 0x00ce, ETH_LINK_SPEED_10G }, /* 1225T PCIe */ + { 0x012a, ETH_LINK_SPEED_40G }, /* M4308 */ + { 0x012c, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G }, /* 1340 MLOM */ + { 0x012e, ETH_LINK_SPEED_10G }, /* 1227 PCIe */ + { 0x0137, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G }, /* 1380 Mezz */ + { 0x014d, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G }, /* 1385 PCIe */ + { 0x015d, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G }, /* 1387 MLOM */ + { 0x0215, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_25G | + ETH_LINK_SPEED_40G }, /* 1440 Mezz */ + { 0x0216, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_25G | + ETH_LINK_SPEED_40G }, /* 1480 MLOM */ + { 0x0217, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_25G }, /* 1455 PCIe */ + { 0x0218, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_25G }, /* 1457 MLOM */ + { 0x0219, ETH_LINK_SPEED_40G }, /* 1485 PCIe */ + { 0x021a, ETH_LINK_SPEED_40G }, /* 1487 MLOM */ + { 0x024a, ETH_LINK_SPEED_40G | ETH_LINK_SPEED_100G }, /* 1495 PCIe */ + { 0x024b, ETH_LINK_SPEED_40G | ETH_LINK_SPEED_100G }, /* 1497 MLOM */ + { 0, 0 }, /* End marker */ +}; + #define ENIC_DEVARG_DISABLE_OVERLAY "disable-overlay" #define ENIC_DEVARG_ENABLE_AVX2_RX "enable-avx2-rx" +#define ENIC_DEVARG_GENEVE_OPT "geneve-opt" #define ENIC_DEVARG_IG_VLAN_REWRITE "ig-vlan-rewrite" -RTE_INIT(enicpmd_init_log) -{ - enicpmd_logtype_init = rte_log_register("pmd.net.enic.init"); - if (enicpmd_logtype_init >= 0) - rte_log_set_level(enicpmd_logtype_init, RTE_LOG_NOTICE); - enicpmd_logtype_flow = rte_log_register("pmd.net.enic.flow"); - if (enicpmd_logtype_flow >= 0) - rte_log_set_level(enicpmd_logtype_flow, RTE_LOG_NOTICE); -} +RTE_LOG_REGISTER(enic_pmd_logtype, pmd.net.enic, INFO); static int enicpmd_fdir_ctrl_func(struct rte_eth_dev *eth_dev, @@ -101,15 +122,25 @@ enicpmd_dev_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_op filter_op, void *arg) { + struct enic *enic = pmd_priv(dev); int ret = 0; ENICPMD_FUNC_TRACE(); + /* + * Currently, when Geneve with options offload is enabled, host + * cannot insert match-action rules. + */ + if (enic->geneve_opt_enabled) + return -ENOTSUP; switch (filter_type) { case RTE_ETH_FILTER_GENERIC: if (filter_op != RTE_ETH_FILTER_GET) return -EINVAL; - *(const void **)arg = &enic_flow_ops; + if (enic->flow_filter_mode == FILTER_FLOWMAN) + *(const void **)arg = &enic_fm_flow_ops; + else + *(const void **)arg = &enic_flow_ops; break; case RTE_ETH_FILTER_FDIR: ret = enicpmd_fdir_ctrl_func(dev, filter_op, arg); @@ -336,18 +367,6 @@ static int enicpmd_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask) enic->ig_vlan_strip_en = 0; } - if ((mask & ETH_VLAN_FILTER_MASK) && - (offloads & DEV_RX_OFFLOAD_VLAN_FILTER)) { - dev_warning(enic, - "Configuration of VLAN filter is not supported\n"); - } - - if ((mask & ETH_VLAN_EXTEND_MASK) && - (offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)) { - dev_warning(enic, - "Configuration of extended VLAN is not supported\n"); - } - return enic_set_vlan_strip(enic); } @@ -367,6 +386,11 @@ static int enicpmd_dev_configure(struct rte_eth_dev *eth_dev) return ret; } + if (eth_dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) + eth_dev->data->dev_conf.rxmode.offloads |= + DEV_RX_OFFLOAD_RSS_HASH; + + enic->mc_count = 0; enic->hw_ip_checksum = !!(eth_dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_CHECKSUM); /* All vlan offload masks to apply the current settings */ @@ -432,10 +456,8 @@ static void enicpmd_dev_close(struct rte_eth_dev *eth_dev) static int enicpmd_dev_link_update(struct rte_eth_dev *eth_dev, __rte_unused int wait_to_complete) { - struct enic *enic = pmd_priv(eth_dev); - ENICPMD_FUNC_TRACE(); - return enic_link_update(enic); + return enic_link_update(eth_dev); } static int enicpmd_dev_stats_get(struct rte_eth_dev *eth_dev, @@ -447,15 +469,39 @@ static int enicpmd_dev_stats_get(struct rte_eth_dev *eth_dev, return enic_dev_stats_get(enic, stats); } -static void enicpmd_dev_stats_reset(struct rte_eth_dev *eth_dev) +static int enicpmd_dev_stats_reset(struct rte_eth_dev *eth_dev) { struct enic *enic = pmd_priv(eth_dev); ENICPMD_FUNC_TRACE(); - enic_dev_stats_clear(enic); + return enic_dev_stats_clear(enic); +} + +static uint32_t speed_capa_from_pci_id(struct rte_eth_dev *eth_dev) +{ + const struct vic_speed_capa *m; + struct rte_pci_device *pdev; + uint16_t id; + + pdev = RTE_ETH_DEV_TO_PCI(eth_dev); + id = pdev->id.subsystem_device_id; + for (m = vic_speed_capa_map; m->sub_devid != 0; m++) { + if (m->sub_devid == id) + return m->capa; + } + /* 1300 and later models are at least 40G */ + if (id >= 0x0100) + return ETH_LINK_SPEED_40G; + /* VFs have subsystem id 0, check device id */ + if (id == 0) { + /* Newer VF implies at least 40G model */ + if (pdev->id.device_id == PCI_DEVICE_ID_CISCO_VIC_ENET_SN) + return ETH_LINK_SPEED_40G; + } + return ETH_LINK_SPEED_10G; } -static void enicpmd_dev_info_get(struct rte_eth_dev *eth_dev, +static int enicpmd_dev_info_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *device_info) { struct enic *enic = pmd_priv(eth_dev); @@ -473,7 +519,9 @@ static void enicpmd_dev_info_get(struct rte_eth_dev *eth_dev, * ignoring vNIC mtu. */ device_info->max_rx_pktlen = enic_mtu_to_max_rx_pktlen(enic->max_mtu); - device_info->max_mac_addrs = ENIC_MAX_MAC_ADDR; + device_info->max_mac_addrs = ENIC_UNICAST_PERFECT_FILTERS; + device_info->min_mtu = ENIC_MIN_MTU; + device_info->max_mtu = enic->max_mtu; device_info->rx_offload_capa = enic->rx_offload_capa; device_info->tx_offload_capa = enic->tx_offload_capa; device_info->tx_queue_offload_capa = enic->tx_queue_offload_capa; @@ -507,6 +555,9 @@ static void enicpmd_dev_info_get(struct rte_eth_dev *eth_dev, ENIC_DEFAULT_TX_RING_SIZE), .nb_queues = ENIC_DEFAULT_TX_RINGS, }; + device_info->speed_capa = speed_capa_from_pci_id(eth_dev); + + return 0; } static const uint32_t *enicpmd_dev_supported_ptypes_get(struct rte_eth_dev *dev) @@ -553,57 +604,77 @@ static const uint32_t *enicpmd_dev_supported_ptypes_get(struct rte_eth_dev *dev) return NULL; } -static void enicpmd_dev_promiscuous_enable(struct rte_eth_dev *eth_dev) +static int enicpmd_dev_promiscuous_enable(struct rte_eth_dev *eth_dev) { struct enic *enic = pmd_priv(eth_dev); + int ret; if (rte_eal_process_type() != RTE_PROC_PRIMARY) - return; + return -E_RTE_SECONDARY; ENICPMD_FUNC_TRACE(); enic->promisc = 1; - enic_add_packet_filter(enic); + ret = enic_add_packet_filter(enic); + if (ret != 0) + enic->promisc = 0; + + return ret; } -static void enicpmd_dev_promiscuous_disable(struct rte_eth_dev *eth_dev) +static int enicpmd_dev_promiscuous_disable(struct rte_eth_dev *eth_dev) { struct enic *enic = pmd_priv(eth_dev); + int ret; if (rte_eal_process_type() != RTE_PROC_PRIMARY) - return; + return -E_RTE_SECONDARY; ENICPMD_FUNC_TRACE(); enic->promisc = 0; - enic_add_packet_filter(enic); + ret = enic_add_packet_filter(enic); + if (ret != 0) + enic->promisc = 1; + + return ret; } -static void enicpmd_dev_allmulticast_enable(struct rte_eth_dev *eth_dev) +static int enicpmd_dev_allmulticast_enable(struct rte_eth_dev *eth_dev) { struct enic *enic = pmd_priv(eth_dev); + int ret; if (rte_eal_process_type() != RTE_PROC_PRIMARY) - return; + return -E_RTE_SECONDARY; ENICPMD_FUNC_TRACE(); enic->allmulti = 1; - enic_add_packet_filter(enic); + ret = enic_add_packet_filter(enic); + if (ret != 0) + enic->allmulti = 0; + + return ret; } -static void enicpmd_dev_allmulticast_disable(struct rte_eth_dev *eth_dev) +static int enicpmd_dev_allmulticast_disable(struct rte_eth_dev *eth_dev) { struct enic *enic = pmd_priv(eth_dev); + int ret; if (rte_eal_process_type() != RTE_PROC_PRIMARY) - return; + return -E_RTE_SECONDARY; ENICPMD_FUNC_TRACE(); enic->allmulti = 0; - enic_add_packet_filter(enic); + ret = enic_add_packet_filter(enic); + if (ret != 0) + enic->allmulti = 1; + + return ret; } static int enicpmd_add_mac_addr(struct rte_eth_dev *eth_dev, - struct ether_addr *mac_addr, + struct rte_ether_addr *mac_addr, __rte_unused uint32_t index, __rte_unused uint32_t pool) { struct enic *enic = pmd_priv(eth_dev); @@ -628,7 +699,7 @@ static void enicpmd_remove_mac_addr(struct rte_eth_dev *eth_dev, uint32_t index) } static int enicpmd_set_mac_addr(struct rte_eth_dev *eth_dev, - struct ether_addr *addr) + struct rte_ether_addr *addr) { struct enic *enic = pmd_priv(eth_dev); int ret; @@ -643,6 +714,98 @@ static int enicpmd_set_mac_addr(struct rte_eth_dev *eth_dev, return enic_set_mac_address(enic, addr->addr_bytes); } +static void debug_log_add_del_addr(struct rte_ether_addr *addr, bool add) +{ + char mac_str[RTE_ETHER_ADDR_FMT_SIZE]; + + rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE, addr); + ENICPMD_LOG(DEBUG, " %s address %s\n", + add ? "add" : "remove", mac_str); +} + +static int enicpmd_set_mc_addr_list(struct rte_eth_dev *eth_dev, + struct rte_ether_addr *mc_addr_set, + uint32_t nb_mc_addr) +{ + struct enic *enic = pmd_priv(eth_dev); + char mac_str[RTE_ETHER_ADDR_FMT_SIZE]; + struct rte_ether_addr *addr; + uint32_t i, j; + int ret; + + ENICPMD_FUNC_TRACE(); + + /* Validate the given addresses first */ + for (i = 0; i < nb_mc_addr && mc_addr_set != NULL; i++) { + addr = &mc_addr_set[i]; + if (!rte_is_multicast_ether_addr(addr) || + rte_is_broadcast_ether_addr(addr)) { + rte_ether_format_addr(mac_str, + RTE_ETHER_ADDR_FMT_SIZE, addr); + ENICPMD_LOG(ERR, " invalid multicast address %s\n", + mac_str); + return -EINVAL; + } + } + + /* Flush all if requested */ + if (nb_mc_addr == 0 || mc_addr_set == NULL) { + ENICPMD_LOG(DEBUG, " flush multicast addresses\n"); + for (i = 0; i < enic->mc_count; i++) { + addr = &enic->mc_addrs[i]; + debug_log_add_del_addr(addr, false); + ret = vnic_dev_del_addr(enic->vdev, addr->addr_bytes); + if (ret) + return ret; + } + enic->mc_count = 0; + return 0; + } + + if (nb_mc_addr > ENIC_MULTICAST_PERFECT_FILTERS) { + ENICPMD_LOG(ERR, " too many multicast addresses: max=%d\n", + ENIC_MULTICAST_PERFECT_FILTERS); + return -ENOSPC; + } + /* + * devcmd is slow, so apply the difference instead of flushing and + * adding everything. + * 1. Delete addresses on the NIC but not on the host + */ + for (i = 0; i < enic->mc_count; i++) { + addr = &enic->mc_addrs[i]; + for (j = 0; j < nb_mc_addr; j++) { + if (rte_is_same_ether_addr(addr, &mc_addr_set[j])) + break; + } + if (j < nb_mc_addr) + continue; + debug_log_add_del_addr(addr, false); + ret = vnic_dev_del_addr(enic->vdev, addr->addr_bytes); + if (ret) + return ret; + } + /* 2. Add addresses on the host but not on the NIC */ + for (i = 0; i < nb_mc_addr; i++) { + addr = &mc_addr_set[i]; + for (j = 0; j < enic->mc_count; j++) { + if (rte_is_same_ether_addr(addr, &enic->mc_addrs[j])) + break; + } + if (j < enic->mc_count) + continue; + debug_log_add_del_addr(addr, true); + ret = vnic_dev_add_addr(enic->vdev, addr->addr_bytes); + if (ret) + return ret; + } + /* Keep a copy so we can flush/apply later on.. */ + memcpy(enic->mc_addrs, mc_addr_set, + nb_mc_addr * sizeof(struct rte_ether_addr)); + enic->mc_count = nb_mc_addr; + return 0; +} + static int enicpmd_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu) { struct enic *enic = pmd_priv(eth_dev); @@ -758,7 +921,7 @@ static void enicpmd_dev_rxq_info_get(struct rte_eth_dev *dev, ENICPMD_FUNC_TRACE(); sop_queue_idx = enic_rte_rq_idx_to_sop_idx(rx_queue_id); - data_queue_idx = enic_rte_rq_idx_to_data_idx(rx_queue_id); + data_queue_idx = enic_rte_rq_idx_to_data_idx(rx_queue_id, enic); rq_sop = &enic->rq[sop_queue_idx]; rq_data = &enic->rq[data_queue_idx]; /* valid if data_queue_enable */ qinfo->mp = rq_sop->mp; @@ -794,6 +957,49 @@ static void enicpmd_dev_txq_info_get(struct rte_eth_dev *dev, /* tx_thresh, and all the other fields are not applicable for enic */ } +static int enicpmd_dev_rx_burst_mode_get(struct rte_eth_dev *dev, + __rte_unused uint16_t queue_id, + struct rte_eth_burst_mode *mode) +{ + eth_rx_burst_t pkt_burst = dev->rx_pkt_burst; + struct enic *enic = pmd_priv(dev); + const char *info_str = NULL; + int ret = -EINVAL; + + ENICPMD_FUNC_TRACE(); + if (enic->use_noscatter_vec_rx_handler) + info_str = "Vector AVX2 No Scatter"; + else if (pkt_burst == enic_noscatter_recv_pkts) + info_str = "Scalar No Scatter"; + else if (pkt_burst == enic_recv_pkts) + info_str = "Scalar"; + if (info_str) { + strlcpy(mode->info, info_str, sizeof(mode->info)); + ret = 0; + } + return ret; +} + +static int enicpmd_dev_tx_burst_mode_get(struct rte_eth_dev *dev, + __rte_unused uint16_t queue_id, + struct rte_eth_burst_mode *mode) +{ + eth_tx_burst_t pkt_burst = dev->tx_pkt_burst; + const char *info_str = NULL; + int ret = -EINVAL; + + ENICPMD_FUNC_TRACE(); + if (pkt_burst == enic_simple_xmit_pkts) + info_str = "Scalar Simplified"; + else if (pkt_burst == enic_xmit_pkts) + info_str = "Scalar"; + if (info_str) { + strlcpy(mode->info, info_str, sizeof(mode->info)); + ret = 0; + } + return ret; +} + static int enicpmd_dev_rx_queue_intr_enable(struct rte_eth_dev *eth_dev, uint16_t rx_queue_id) { @@ -820,7 +1026,7 @@ static int udp_tunnel_common_check(struct enic *enic, if (tnl->prot_type != RTE_TUNNEL_TYPE_VXLAN) return -ENOTSUP; if (!enic->overlay_offload) { - PMD_INIT_LOG(DEBUG, " vxlan (overlay offload) is not " + ENICPMD_LOG(DEBUG, " vxlan (overlay offload) is not " "supported\n"); return -ENOTSUP; } @@ -832,10 +1038,10 @@ static int update_vxlan_port(struct enic *enic, uint16_t port) if (vnic_dev_overlay_offload_cfg(enic->vdev, OVERLAY_CFG_VXLAN_PORT_UPDATE, port)) { - PMD_INIT_LOG(DEBUG, " failed to update vxlan port\n"); + ENICPMD_LOG(DEBUG, " failed to update vxlan port\n"); return -EINVAL; } - PMD_INIT_LOG(DEBUG, " updated vxlan port to %u\n", port); + ENICPMD_LOG(DEBUG, " updated vxlan port to %u\n", port); enic->vxlan_port = port; return 0; } @@ -855,7 +1061,7 @@ static int enicpmd_dev_udp_tunnel_port_add(struct rte_eth_dev *eth_dev, * number replaces it. */ if (tnl->udp_port == enic->vxlan_port || tnl->udp_port == 0) { - PMD_INIT_LOG(DEBUG, " %u is already configured or invalid\n", + ENICPMD_LOG(DEBUG, " %u is already configured or invalid\n", tnl->udp_port); return -EINVAL; } @@ -880,11 +1086,31 @@ static int enicpmd_dev_udp_tunnel_port_del(struct rte_eth_dev *eth_dev, * which is tied to inner RSS and TSO. */ if (tnl->udp_port != enic->vxlan_port) { - PMD_INIT_LOG(DEBUG, " %u is not a configured vxlan port\n", + ENICPMD_LOG(DEBUG, " %u is not a configured vxlan port\n", tnl->udp_port); return -EINVAL; } - return update_vxlan_port(enic, ENIC_DEFAULT_VXLAN_PORT); + return update_vxlan_port(enic, RTE_VXLAN_DEFAULT_PORT); +} + +static int enicpmd_dev_fw_version_get(struct rte_eth_dev *eth_dev, + char *fw_version, size_t fw_size) +{ + struct vnic_devcmd_fw_info *info; + struct enic *enic; + int ret; + + ENICPMD_FUNC_TRACE(); + if (fw_version == NULL || fw_size <= 0) + return -EINVAL; + enic = pmd_priv(eth_dev); + ret = vnic_dev_fw_info(enic->vdev, &info); + if (ret) + return ret; + snprintf(fw_version, fw_size, "%s %s", + info->fw_version, info->fw_build); + fw_version[fw_size - 1] = '\0'; + return 0; } static const struct eth_dev_ops enicpmd_eth_dev_ops = { @@ -923,6 +1149,8 @@ static const struct eth_dev_ops enicpmd_eth_dev_ops = { .rx_queue_intr_disable = enicpmd_dev_rx_queue_intr_disable, .rxq_info_get = enicpmd_dev_rxq_info_get, .txq_info_get = enicpmd_dev_txq_info_get, + .rx_burst_mode_get = enicpmd_dev_rx_burst_mode_get, + .tx_burst_mode_get = enicpmd_dev_tx_burst_mode_get, .dev_led_on = NULL, .dev_led_off = NULL, .flow_ctrl_get = NULL, @@ -931,6 +1159,7 @@ static const struct eth_dev_ops enicpmd_eth_dev_ops = { .mac_addr_add = enicpmd_add_mac_addr, .mac_addr_remove = enicpmd_remove_mac_addr, .mac_addr_set = enicpmd_set_mac_addr, + .set_mc_addr_list = enicpmd_set_mc_addr_list, .filter_ctrl = enicpmd_dev_filter_ctrl, .reta_query = enicpmd_dev_rss_reta_query, .reta_update = enicpmd_dev_rss_reta_update, @@ -938,6 +1167,7 @@ static const struct eth_dev_ops enicpmd_eth_dev_ops = { .rss_hash_update = enicpmd_dev_rss_hash_update, .udp_tunnel_port_add = enicpmd_dev_udp_tunnel_port_add, .udp_tunnel_port_del = enicpmd_dev_udp_tunnel_port_del, + .fw_version_get = enicpmd_dev_fw_version_get, }; static int enic_parse_zero_one(const char *key, @@ -961,6 +1191,8 @@ static int enic_parse_zero_one(const char *key, enic->disable_overlay = b; if (strcmp(key, ENIC_DEVARG_ENABLE_AVX2_RX) == 0) enic->enable_avx2_rx = b; + if (strcmp(key, ENIC_DEVARG_GENEVE_OPT) == 0) + enic->geneve_opt_request = b; return 0; } @@ -1002,6 +1234,7 @@ static int enic_check_devargs(struct rte_eth_dev *dev) static const char *const valid_keys[] = { ENIC_DEVARG_DISABLE_OVERLAY, ENIC_DEVARG_ENABLE_AVX2_RX, + ENIC_DEVARG_GENEVE_OPT, ENIC_DEVARG_IG_VLAN_REWRITE, NULL}; struct enic *enic = pmd_priv(dev); @@ -1011,6 +1244,7 @@ static int enic_check_devargs(struct rte_eth_dev *dev) enic->disable_overlay = false; enic->enable_avx2_rx = false; + enic->geneve_opt_request = false; enic->ig_vlan_rewrite_mode = IG_VLAN_REWRITE_MODE_PASS_THRU; if (!dev->device->devargs) return 0; @@ -1021,6 +1255,8 @@ static int enic_check_devargs(struct rte_eth_dev *dev) enic_parse_zero_one, enic) < 0 || rte_kvargs_process(kvlist, ENIC_DEVARG_ENABLE_AVX2_RX, enic_parse_zero_one, enic) < 0 || + rte_kvargs_process(kvlist, ENIC_DEVARG_GENEVE_OPT, + enic_parse_zero_one, enic) < 0 || rte_kvargs_process(kvlist, ENIC_DEVARG_IG_VLAN_REWRITE, enic_parse_ig_vlan_rewrite, enic) < 0) { rte_kvargs_free(kvlist); @@ -1030,7 +1266,6 @@ static int enic_check_devargs(struct rte_eth_dev *dev) return 0; } -struct enic *enicpmd_list_head = NULL; /* Initialize the driver * It returns 0 on success. */ @@ -1043,12 +1278,21 @@ static int eth_enicpmd_dev_init(struct rte_eth_dev *eth_dev) ENICPMD_FUNC_TRACE(); - enic->port_id = eth_dev->data->port_id; - enic->rte_dev = eth_dev; eth_dev->dev_ops = &enicpmd_eth_dev_ops; eth_dev->rx_pkt_burst = &enic_recv_pkts; eth_dev->tx_pkt_burst = &enic_xmit_pkts; eth_dev->tx_pkt_prepare = &enic_prep_pkts; + if (rte_eal_process_type() != RTE_PROC_PRIMARY) { + enic_pick_tx_handler(eth_dev); + enic_pick_rx_handler(eth_dev); + return 0; + } + /* Only the primary sets up adapter and other data in shared memory */ + enic->port_id = eth_dev->data->port_id; + enic->rte_dev = eth_dev; + enic->dev_data = eth_dev->data; + /* Let rte_eth_dev_close() release the port resources */ + eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE; pdev = RTE_ETH_DEV_TO_PCI(eth_dev); rte_eth_copy_pci_info(eth_dev, pdev); @@ -1078,16 +1322,21 @@ static int eth_enic_pci_remove(struct rte_pci_device *pci_dev) static struct rte_pci_driver rte_enic_pmd = { .id_table = pci_id_enic_map, - .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC | - RTE_PCI_DRV_IOVA_AS_VA, + .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC, .probe = eth_enic_pci_probe, .remove = eth_enic_pci_remove, }; +int dev_is_enic(struct rte_eth_dev *dev) +{ + return dev->device->driver == &rte_enic_pmd.driver; +} + RTE_PMD_REGISTER_PCI(net_enic, rte_enic_pmd); RTE_PMD_REGISTER_PCI_TABLE(net_enic, pci_id_enic_map); RTE_PMD_REGISTER_KMOD_DEP(net_enic, "* igb_uio | uio_pci_generic | vfio-pci"); RTE_PMD_REGISTER_PARAM_STRING(net_enic, ENIC_DEVARG_DISABLE_OVERLAY "=0|1 " ENIC_DEVARG_ENABLE_AVX2_RX "=0|1 " + ENIC_DEVARG_GENEVE_OPT "=0|1 " ENIC_DEVARG_IG_VLAN_REWRITE "=trunk|untag|priority|pass");