X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Ffm10k%2Ffm10k_ethdev.c;h=3ff1b0e0f80089a8b8256b3cced5843d4332def1;hb=917481cad8695f4241f9c018d403e860007e5140;hp=d2c47f6460ff5bf31f7bf69c6d3ef5afa4d1f0c4;hpb=7151de0f57edb3543cda3907b878282c5e73b7b4;p=dpdk.git diff --git a/drivers/net/fm10k/fm10k_ethdev.c b/drivers/net/fm10k/fm10k_ethdev.c index d2c47f6460..3ff1b0e0f8 100644 --- a/drivers/net/fm10k/fm10k_ethdev.c +++ b/drivers/net/fm10k/fm10k_ethdev.c @@ -64,6 +64,9 @@ static void fm10k_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info); static uint64_t fm10k_get_rx_queue_offloads_capa(struct rte_eth_dev *dev); static uint64_t fm10k_get_rx_port_offloads_capa(struct rte_eth_dev *dev); +static uint64_t fm10k_get_tx_queue_offloads_capa(struct rte_eth_dev *dev); +static uint64_t fm10k_get_tx_port_offloads_capa(struct rte_eth_dev *dev); + struct fm10k_xstats_name_off { char name[RTE_ETH_XSTATS_NAME_SIZE]; unsigned offset; @@ -445,21 +448,13 @@ static int fm10k_dev_configure(struct rte_eth_dev *dev) { int ret; - struct rte_eth_dev_info dev_info; - uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads; PMD_INIT_FUNC_TRACE(); - if ((rx_offloads & DEV_RX_OFFLOAD_CRC_STRIP) == 0) + if ((dev->data->dev_conf.rxmode.offloads & + DEV_RX_OFFLOAD_CRC_STRIP) == 0) PMD_INIT_LOG(WARNING, "fm10k always strip CRC"); - fm10k_dev_infos_get(dev, &dev_info); - if ((rx_offloads & dev_info.rx_offload_capa) != rx_offloads) { - PMD_DRV_LOG(ERR, "Some Rx offloads are not supported " - "requested 0x%" PRIx64 " supported 0x%" PRIx64, - rx_offloads, dev_info.rx_offload_capa); - return -ENOTSUP; - } /* multipe queue mode checking */ ret = fm10k_check_mq_mode(dev); if (ret != 0) { @@ -1249,13 +1244,11 @@ fm10k_link_update(struct rte_eth_dev *dev, FM10K_DEV_PRIVATE_TO_INFO(dev->data->dev_private); PMD_INIT_FUNC_TRACE(); - /* The speed is ~50Gbps per Gen3 x8 PCIe interface. For now, we - * leave the speed undefined since there is no 50Gbps Ethernet. - */ - dev->data->dev_link.link_speed = 0; + dev->data->dev_link.link_speed = ETH_SPEED_NUM_50G; dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX; dev->data->dev_link.link_status = dev_info->sm_down ? ETH_LINK_DOWN : ETH_LINK_UP; + dev->data->dev_link.link_autoneg = ETH_LINK_FIXED; return 0; } @@ -1393,7 +1386,6 @@ fm10k_dev_infos_get(struct rte_eth_dev *dev, PMD_INIT_FUNC_TRACE(); - dev_info->pci_dev = pdev; dev_info->min_rx_bufsize = FM10K_MIN_RX_BUF_SIZE; dev_info->max_rx_pktlen = FM10K_MAX_PKT_SIZE; dev_info->max_rx_queues = hw->mac.max_queues; @@ -1408,12 +1400,9 @@ fm10k_dev_infos_get(struct rte_eth_dev *dev, dev_info->rx_queue_offload_capa = fm10k_get_rx_queue_offloads_capa(dev); dev_info->rx_offload_capa = fm10k_get_rx_port_offloads_capa(dev) | dev_info->rx_queue_offload_capa; - dev_info->tx_offload_capa = - DEV_TX_OFFLOAD_VLAN_INSERT | - DEV_TX_OFFLOAD_IPV4_CKSUM | - DEV_TX_OFFLOAD_UDP_CKSUM | - DEV_TX_OFFLOAD_TCP_CKSUM | - DEV_TX_OFFLOAD_TCP_TSO; + dev_info->tx_queue_offload_capa = fm10k_get_tx_queue_offloads_capa(dev); + dev_info->tx_offload_capa = fm10k_get_tx_port_offloads_capa(dev) | + dev_info->tx_queue_offload_capa; dev_info->hash_key_size = FM10K_RSSRK_SIZE * sizeof(uint32_t); dev_info->reta_size = FM10K_MAX_RSS_INDICES; @@ -1437,7 +1426,7 @@ fm10k_dev_infos_get(struct rte_eth_dev *dev, }, .tx_free_thresh = FM10K_TX_FREE_THRESH_DEFAULT(0), .tx_rs_thresh = FM10K_TX_RS_THRESH_DEFAULT(0), - .txq_flags = FM10K_SIMPLE_TX_FLAG, + .offloads = 0, }; dev_info->rx_desc_lim = (struct rte_eth_desc_lim) { @@ -1820,22 +1809,6 @@ static uint64_t fm10k_get_rx_port_offloads_capa(struct rte_eth_dev *dev) DEV_RX_OFFLOAD_HEADER_SPLIT); } -static int -fm10k_check_rx_queue_offloads(struct rte_eth_dev *dev, uint64_t requested) -{ - uint64_t port_offloads = dev->data->dev_conf.rxmode.offloads; - uint64_t queue_supported = fm10k_get_rx_queue_offloads_capa(dev); - uint64_t port_supported = fm10k_get_rx_port_offloads_capa(dev); - - if ((requested & (queue_supported | port_supported)) != requested) - return 0; - - if ((port_offloads ^ requested) & port_supported) - return 0; - - return 1; -} - static int fm10k_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_id, uint16_t nb_desc, unsigned int socket_id, @@ -1846,20 +1819,11 @@ fm10k_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_id, FM10K_DEV_PRIVATE_TO_INFO(dev->data->dev_private); struct fm10k_rx_queue *q; const struct rte_memzone *mz; + uint64_t offloads; PMD_INIT_FUNC_TRACE(); - if (!fm10k_check_rx_queue_offloads(dev, conf->offloads)) { - PMD_INIT_LOG(ERR, "%p: Rx queue offloads 0x%" PRIx64 - " don't match port offloads 0x%" PRIx64 - " or supported port offloads 0x%" PRIx64 - " or supported queue offloads 0x%" PRIx64, - (void *)dev, conf->offloads, - dev->data->dev_conf.rxmode.offloads, - fm10k_get_rx_port_offloads_capa(dev), - fm10k_get_rx_queue_offloads_capa(dev)); - return -ENOTSUP; - } + offloads = conf->offloads | dev->data->dev_conf.rxmode.offloads; /* make sure the mempool element size can account for alignment. */ if (!mempool_element_size_valid(mp)) { @@ -1905,7 +1869,7 @@ fm10k_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_id, q->queue_id = queue_id; q->tail_ptr = (volatile uint32_t *) &((uint32_t *)hw->hw_addr)[FM10K_RDT(queue_id)]; - q->offloads = conf->offloads; + q->offloads = offloads; if (handle_rxconf(q, conf)) return -EINVAL; @@ -2015,6 +1979,24 @@ handle_txconf(struct fm10k_tx_queue *q, const struct rte_eth_txconf *conf) return 0; } +static uint64_t fm10k_get_tx_queue_offloads_capa(struct rte_eth_dev *dev) +{ + RTE_SET_USED(dev); + + return 0; +} + +static uint64_t fm10k_get_tx_port_offloads_capa(struct rte_eth_dev *dev) +{ + RTE_SET_USED(dev); + + return (uint64_t)(DEV_TX_OFFLOAD_VLAN_INSERT | + DEV_TX_OFFLOAD_IPV4_CKSUM | + DEV_TX_OFFLOAD_UDP_CKSUM | + DEV_TX_OFFLOAD_TCP_CKSUM | + DEV_TX_OFFLOAD_TCP_TSO); +} + static int fm10k_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_id, uint16_t nb_desc, unsigned int socket_id, @@ -2023,9 +2005,12 @@ fm10k_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_id, struct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private); struct fm10k_tx_queue *q; const struct rte_memzone *mz; + uint64_t offloads; PMD_INIT_FUNC_TRACE(); + offloads = conf->offloads | dev->data->dev_conf.txmode.offloads; + /* make sure a valid number of descriptors have been requested */ if (check_nb_desc(FM10K_MIN_TX_DESC, FM10K_MAX_TX_DESC, FM10K_MULT_TX_DESC, nb_desc)) { @@ -2062,7 +2047,7 @@ fm10k_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_id, q->nb_desc = nb_desc; q->port_id = dev->data->port_id; q->queue_id = queue_id; - q->txq_flags = conf->txq_flags; + q->offloads = offloads; q->ops = &def_txq_ops; q->tail_ptr = (volatile uint32_t *) &((uint32_t *)hw->hw_addr)[FM10K_TDT(queue_id)]; @@ -2928,7 +2913,7 @@ fm10k_set_tx_function(struct rte_eth_dev *dev) uint16_t tx_ftag_en = 0; if (rte_eal_process_type() != RTE_PROC_PRIMARY) { - /* primary process has set the ftag flag and txq_flags */ + /* primary process has set the ftag flag and offloads */ txq = dev->data->tx_queues[0]; if (fm10k_tx_vec_condition_check(txq)) { dev->tx_pkt_burst = fm10k_xmit_pkts;