X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fhinic%2Fhinic_pmd_rx.c;h=7adb6e365993fb087ce1362d893dc23716b42d34;hb=1d5e6bb6b964674bed75fcf954ea4cd6c796c8e4;hp=743bae9693f95555d5dedbddcebf529f1d40b52c;hpb=361a9ccf81d6edd4902adedca104028f85a44d1d;p=dpdk.git diff --git a/drivers/net/hinic/hinic_pmd_rx.c b/drivers/net/hinic/hinic_pmd_rx.c index 743bae9693..7adb6e3659 100644 --- a/drivers/net/hinic/hinic_pmd_rx.c +++ b/drivers/net/hinic/hinic_pmd_rx.c @@ -4,7 +4,7 @@ #include #include -#ifdef __ARM64_NEON__ +#ifdef RTE_ARCH_ARM64 #include #endif @@ -209,7 +209,8 @@ void hinic_get_func_rx_buf_size(struct hinic_nic_dev *nic_dev) nic_dev->hwdev->nic_io->rq_buf_size = buf_size; } -int hinic_create_rq(struct hinic_hwdev *hwdev, u16 q_id, u16 rq_depth) +int hinic_create_rq(struct hinic_hwdev *hwdev, u16 q_id, + u16 rq_depth, unsigned int socket_id) { int err; struct hinic_nic_io *nic_io = hwdev->nic_io; @@ -223,17 +224,15 @@ int hinic_create_rq(struct hinic_hwdev *hwdev, u16 q_id, u16 rq_depth) nic_io->rq_depth = rq_depth; err = hinic_wq_allocate(hwdev, &nic_io->rq_wq[q_id], - HINIC_RQ_WQEBB_SHIFT, nic_io->rq_depth); + HINIC_RQ_WQEBB_SHIFT, nic_io->rq_depth, socket_id); if (err) { PMD_DRV_LOG(ERR, "Failed to allocate WQ for RQ"); return err; } rq->wq = &nic_io->rq_wq[q_id]; - rq->pi_virt_addr = - (volatile u16 *)dma_zalloc_coherent(hwdev, HINIC_PAGE_SIZE, - &rq->pi_dma_addr, - GFP_KERNEL); + rq->pi_virt_addr = (volatile u16 *)dma_zalloc_coherent(hwdev, + HINIC_PAGE_SIZE, &rq->pi_dma_addr, socket_id); if (!rq->pi_virt_addr) { PMD_DRV_LOG(ERR, "Failed to allocate rq pi virt addr"); err = -ENOMEM; @@ -305,15 +304,13 @@ void hinic_rxq_stats_reset(struct hinic_rxq *rxq) memset(rxq_stats, 0, sizeof(*rxq_stats)); } -static int hinic_rx_alloc_cqe(struct hinic_rxq *rxq) +static int hinic_rx_alloc_cqe(struct hinic_rxq *rxq, unsigned int socket_id) { size_t cqe_mem_size; cqe_mem_size = sizeof(struct hinic_rq_cqe) * rxq->q_depth; - rxq->cqe_start_vaddr = - dma_zalloc_coherent(rxq->nic_dev->hwdev, - cqe_mem_size, &rxq->cqe_start_paddr, - GFP_KERNEL); + rxq->cqe_start_vaddr = dma_zalloc_coherent(rxq->nic_dev->hwdev, + cqe_mem_size, &rxq->cqe_start_paddr, socket_id); if (!rxq->cqe_start_vaddr) { PMD_DRV_LOG(ERR, "Allocate cqe dma memory failed"); return -ENOMEM; @@ -369,11 +366,12 @@ int hinic_setup_rx_resources(struct hinic_rxq *rxq) int err, pkts; rx_info_sz = rxq->q_depth * sizeof(*rxq->rx_info); - rxq->rx_info = kzalloc_aligned(rx_info_sz, GFP_KERNEL); + rxq->rx_info = rte_zmalloc_socket("rx_info", rx_info_sz, + RTE_CACHE_LINE_SIZE, rxq->socket_id); if (!rxq->rx_info) return -ENOMEM; - err = hinic_rx_alloc_cqe(rxq); + err = hinic_rx_alloc_cqe(rxq, rxq->socket_id); if (err) { PMD_DRV_LOG(ERR, "Allocate rx cqe failed"); goto rx_cqe_err; @@ -392,7 +390,7 @@ rx_fill_err: hinic_rx_free_cqe(rxq); rx_cqe_err: - kfree(rxq->rx_info); + rte_free(rxq->rx_info); rxq->rx_info = NULL; return err; @@ -404,7 +402,7 @@ void hinic_free_rx_resources(struct hinic_rxq *rxq) return; hinic_rx_free_cqe(rxq); - kfree(rxq->rx_info); + rte_free(rxq->rx_info); rxq->rx_info = NULL; } @@ -415,7 +413,8 @@ void hinic_free_all_rx_resources(struct rte_eth_dev *eth_dev) HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev); for (q_id = 0; q_id < nic_dev->num_rq; q_id++) { - eth_dev->data->rx_queues[q_id] = NULL; + if (eth_dev->data->rx_queues != NULL) + eth_dev->data->rx_queues[q_id] = NULL; if (nic_dev->rxqs[q_id] == NULL) continue; @@ -505,14 +504,14 @@ static void hinic_fill_rss_type(struct nic_rss_type *rss_type, { u64 rss_hf = rss_conf->rss_hf; - rss_type->ipv4 = (rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4)) ? 1 : 0; - rss_type->tcp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) ? 1 : 0; - rss_type->ipv6 = (rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6)) ? 1 : 0; - rss_type->ipv6_ext = (rss_hf & ETH_RSS_IPV6_EX) ? 1 : 0; - rss_type->tcp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP) ? 1 : 0; - rss_type->tcp_ipv6_ext = (rss_hf & ETH_RSS_IPV6_TCP_EX) ? 1 : 0; - rss_type->udp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) ? 1 : 0; - rss_type->udp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_UDP) ? 1 : 0; + rss_type->ipv4 = (rss_hf & (RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4)) ? 1 : 0; + rss_type->tcp_ipv4 = (rss_hf & RTE_ETH_RSS_NONFRAG_IPV4_TCP) ? 1 : 0; + rss_type->ipv6 = (rss_hf & (RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6)) ? 1 : 0; + rss_type->ipv6_ext = (rss_hf & RTE_ETH_RSS_IPV6_EX) ? 1 : 0; + rss_type->tcp_ipv6 = (rss_hf & RTE_ETH_RSS_NONFRAG_IPV6_TCP) ? 1 : 0; + rss_type->tcp_ipv6_ext = (rss_hf & RTE_ETH_RSS_IPV6_TCP_EX) ? 1 : 0; + rss_type->udp_ipv4 = (rss_hf & RTE_ETH_RSS_NONFRAG_IPV4_UDP) ? 1 : 0; + rss_type->udp_ipv6 = (rss_hf & RTE_ETH_RSS_NONFRAG_IPV6_UDP) ? 1 : 0; } static void hinic_fillout_indir_tbl(struct hinic_nic_dev *nic_dev, u32 *indir) @@ -533,7 +532,7 @@ static void hinic_fillout_indir_tbl(struct hinic_nic_dev *nic_dev, u32 *indir) } static int hinic_rss_init(struct hinic_nic_dev *nic_dev, - __attribute__((unused)) u8 *rq2iq_map, + __rte_unused u8 *rq2iq_map, struct rte_eth_rss_conf *rss_conf) { u32 indir_tbl[HINIC_RSS_INDIR_SIZE] = {0}; @@ -589,8 +588,8 @@ static int hinic_setup_num_qps(struct hinic_nic_dev *nic_dev) { int err, i; - if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) { - nic_dev->flags &= ~ETH_MQ_RX_RSS_FLAG; + if (!(nic_dev->flags & RTE_ETH_MQ_RX_RSS_FLAG)) { + nic_dev->flags &= ~RTE_ETH_MQ_RX_RSS_FLAG; nic_dev->num_rss = 0; if (nic_dev->num_rq > 1) { /* get rss template id */ @@ -600,7 +599,7 @@ static int hinic_setup_num_qps(struct hinic_nic_dev *nic_dev) PMD_DRV_LOG(WARNING, "Alloc rss template failed"); return err; } - nic_dev->flags |= ETH_MQ_RX_RSS_FLAG; + nic_dev->flags |= RTE_ETH_MQ_RX_RSS_FLAG; for (i = 0; i < nic_dev->num_rq; i++) hinic_add_rq_to_rx_queue_list(nic_dev, i); } @@ -611,12 +610,12 @@ static int hinic_setup_num_qps(struct hinic_nic_dev *nic_dev) static void hinic_destroy_num_qps(struct hinic_nic_dev *nic_dev) { - if (nic_dev->flags & ETH_MQ_RX_RSS_FLAG) { + if (nic_dev->flags & RTE_ETH_MQ_RX_RSS_FLAG) { if (hinic_rss_template_free(nic_dev->hwdev, nic_dev->rss_tmpl_idx)) PMD_DRV_LOG(WARNING, "Free rss template failed"); - nic_dev->flags &= ~ETH_MQ_RX_RSS_FLAG; + nic_dev->flags &= ~RTE_ETH_MQ_RX_RSS_FLAG; } } @@ -642,7 +641,7 @@ int hinic_config_mq_mode(struct rte_eth_dev *dev, bool on) int ret = 0; switch (dev_conf->rxmode.mq_mode) { - case ETH_MQ_RX_RSS: + case RTE_ETH_MQ_RX_RSS: ret = hinic_config_mq_rx_rss(nic_dev, on); break; default: @@ -658,8 +657,12 @@ int hinic_rx_configure(struct rte_eth_dev *dev) struct rte_eth_rss_conf rss_conf = dev->data->dev_conf.rx_adv_conf.rss_conf; int err; + bool lro_en; + int max_lro_size; + int lro_wqe_num; + int buf_size; - if (nic_dev->flags & ETH_MQ_RX_RSS_FLAG) { + if (nic_dev->flags & RTE_ETH_MQ_RX_RSS_FLAG) { if (rss_conf.rss_hf == 0) { rss_conf.rss_hf = HINIC_RSS_OFFLOAD_ALL; } else if ((rss_conf.rss_hf & HINIC_RSS_OFFLOAD_ALL) == 0) { @@ -675,7 +678,7 @@ int hinic_rx_configure(struct rte_eth_dev *dev) } /* Enable both L3/L4 rx checksum offload */ - if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_CHECKSUM) + if (dev->data->dev_conf.rxmode.offloads & RTE_ETH_RX_OFFLOAD_CHECKSUM) nic_dev->rx_csum_en = HINIC_RX_CSUM_OFFLOAD_EN; err = hinic_set_rx_csum_offload(nic_dev->hwdev, @@ -683,23 +686,52 @@ int hinic_rx_configure(struct rte_eth_dev *dev) if (err) goto rx_csum_ofl_err; + /* config lro */ + lro_en = dev->data->dev_conf.rxmode.offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO ? + true : false; + max_lro_size = dev->data->dev_conf.rxmode.max_lro_pkt_size; + buf_size = nic_dev->hwdev->nic_io->rq_buf_size; + lro_wqe_num = max_lro_size / buf_size ? (max_lro_size / buf_size) : 1; + + err = hinic_set_rx_lro(nic_dev->hwdev, lro_en, lro_en, lro_wqe_num); + if (err) { + PMD_DRV_LOG(ERR, "%s %s lro failed, err: %d, max_lro_size: %d", + dev->data->name, lro_en ? "Enable" : "Disable", + err, max_lro_size); + goto set_rx_lro_err; + } + return 0; +set_rx_lro_err: rx_csum_ofl_err: rss_config_err: + hinic_destroy_num_qps(nic_dev); return HINIC_ERROR; } +static void hinic_rx_remove_lro(struct hinic_nic_dev *nic_dev) +{ + int err; + + err = hinic_set_rx_lro(nic_dev->hwdev, false, false, 0); + if (err) + PMD_DRV_LOG(ERR, "%s disable LRO failed", + nic_dev->proc_dev_name); +} + void hinic_rx_remove_configure(struct rte_eth_dev *dev) { struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev); - if (nic_dev->flags & ETH_MQ_RX_RSS_FLAG) { + if (nic_dev->flags & RTE_ETH_MQ_RX_RSS_FLAG) { hinic_rss_deinit(nic_dev); hinic_destroy_num_qps(nic_dev); } + + hinic_rx_remove_lro(nic_dev); } void hinic_free_all_rx_mbufs(struct hinic_rxq *rxq) @@ -730,7 +762,7 @@ void hinic_free_all_rx_mbufs(struct hinic_rxq *rxq) static inline void hinic_rq_cqe_be_to_cpu32(void *dst_le32, volatile void *src_be32) { -#if defined(__X86_64_SSE__) +#if defined(RTE_ARCH_X86_64) volatile __m128i *wqe_be = (volatile __m128i *)src_be32; __m128i *wqe_le = (__m128i *)dst_le32; __m128i shuf_mask = _mm_set_epi8(12, 13, 14, 15, 8, 9, 10, @@ -738,7 +770,7 @@ static inline void hinic_rq_cqe_be_to_cpu32(void *dst_le32, /* l2nic just use first 128 bits */ wqe_le[0] = _mm_shuffle_epi8(wqe_be[0], shuf_mask); -#elif defined(__ARM64_NEON__) +#elif defined(RTE_ARCH_ARM64) volatile uint8x16_t *wqe_be = (volatile uint8x16_t *)src_be32; uint8x16_t *wqe_le = (uint8x16_t *)dst_le32; const uint8x16_t shuf_mask = {3, 2, 1, 0, 7, 6, 5, 4, 11, 10, @@ -770,7 +802,7 @@ static inline uint64_t hinic_rx_rss_hash(uint32_t offload_type, rss_type = HINIC_GET_RSS_TYPES(offload_type); if (likely(rss_type != 0)) { *rss_hash = cqe_hass_val; - return PKT_RX_RSS_HASH; + return RTE_MBUF_F_RX_RSS_HASH; } return 0; @@ -783,33 +815,33 @@ static inline uint64_t hinic_rx_csum(uint32_t status, struct hinic_rxq *rxq) struct hinic_nic_dev *nic_dev = rxq->nic_dev; if (unlikely(!(nic_dev->rx_csum_en & HINIC_RX_CSUM_OFFLOAD_EN))) - return PKT_RX_IP_CKSUM_UNKNOWN; + return RTE_MBUF_F_RX_IP_CKSUM_UNKNOWN; /* most case checksum is ok */ checksum_err = HINIC_GET_RX_CSUM_ERR(status); if (likely(checksum_err == 0)) - return (PKT_RX_IP_CKSUM_GOOD | PKT_RX_L4_CKSUM_GOOD); + return (RTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_GOOD); /* If BYPASS bit set, all other status indications should be ignored */ if (unlikely(HINIC_CSUM_ERR_BYPASSED(checksum_err))) - return PKT_RX_IP_CKSUM_UNKNOWN; + return RTE_MBUF_F_RX_IP_CKSUM_UNKNOWN; flags = 0; /* IP checksum error */ if (HINIC_CSUM_ERR_IP(checksum_err)) - flags |= PKT_RX_IP_CKSUM_BAD; + flags |= RTE_MBUF_F_RX_IP_CKSUM_BAD; else - flags |= PKT_RX_IP_CKSUM_GOOD; + flags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD; /* L4 checksum error */ if (HINIC_CSUM_ERR_L4(checksum_err)) - flags |= PKT_RX_L4_CKSUM_BAD; + flags |= RTE_MBUF_F_RX_L4_CKSUM_BAD; else - flags |= PKT_RX_L4_CKSUM_GOOD; + flags |= RTE_MBUF_F_RX_L4_CKSUM_GOOD; if (unlikely(HINIC_CSUM_ERR_OTHER(checksum_err))) - flags = PKT_RX_L4_CKSUM_NONE; + flags = RTE_MBUF_F_RX_L4_CKSUM_NONE; rxq->rxq_stats.errors++; @@ -829,7 +861,7 @@ static inline uint64_t hinic_rx_vlan(uint32_t offload_type, uint32_t vlan_len, *vlan_tci = vlan_tag; - return PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED; + return RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED; } static inline u32 hinic_rx_alloc_mbuf_bulk(struct hinic_rxq *rxq, @@ -853,10 +885,11 @@ static inline u32 hinic_rx_alloc_mbuf_bulk(struct hinic_rxq *rxq, static struct rte_mbuf *hinic_rx_alloc_mbuf(struct hinic_rxq *rxq, dma_addr_t *dma_addr) { - struct rte_mbuf *mbuf; + struct rte_mbuf *mbuf = NULL; + int rc; - mbuf = rte_mbuf_raw_alloc(rxq->mb_pool); - if (unlikely(!mbuf)) + rc = rte_pktmbuf_alloc_bulk(rxq->mb_pool, &mbuf, 1); + if (unlikely(rc != HINIC_OK)) return NULL; *dma_addr = rte_mbuf_data_iova_default(mbuf); @@ -957,7 +990,7 @@ u16 hinic_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, u16 nb_pkts) volatile struct hinic_rq_cqe *rx_cqe; u16 rx_buf_len, pkts = 0; u16 sw_ci, ci_mask, wqebb_cnt = 0; - u32 pkt_len, status, vlan_len; + u32 pkt_len, status, vlan_len, lro_num; u64 rx_bytes = 0; struct hinic_rq_cqe cqe; u32 offload_type, rss_hash; @@ -1025,6 +1058,13 @@ u16 hinic_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, u16 nb_pkts) rxm->ol_flags |= hinic_rx_rss_hash(offload_type, rss_hash, &rxm->hash.rss); + /* lro offload */ + lro_num = HINIC_GET_RX_NUM_LRO(cqe.status); + if (unlikely(lro_num != 0)) { + rxm->ol_flags |= RTE_MBUF_F_RX_LRO; + rxm->tso_segsz = pkt_len / lro_num; + } + /* 6. clear done bit */ rx_cqe->status = 0;