X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fhns3%2Fhns3_ethdev.c;h=0b565a561479cc594fbfff691c61a5ecc24183a4;hb=ae5f21f287aa680843363fe526920b70fb8e1fb5;hp=73bf209717c114e9cfc3d93fa94bedaeae1a8cbf;hpb=e8f1f783d1cd61faf12658df64726bca88b7ff63;p=dpdk.git diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c index 73bf209717..0b565a5614 100644 --- a/drivers/net/hns3/hns3_ethdev.c +++ b/drivers/net/hns3/hns3_ethdev.c @@ -2015,11 +2015,9 @@ hns3_dev_configure(struct rte_eth_dev *dev) goto cfg_err; } - /* When RSS is not configured, redirect the packet queue 0 */ if ((uint32_t)mq_mode & RTE_ETH_MQ_RX_RSS_FLAG) { conf->rxmode.offloads |= RTE_ETH_RX_OFFLOAD_RSS_HASH; rss_conf = conf->rx_adv_conf.rss_conf; - hw->rss_dis_flag = false; ret = hns3_dev_rss_hash_update(dev, &rss_conf); if (ret) goto cfg_err; @@ -2733,6 +2731,10 @@ hns3_get_capability(struct hns3_hw *hw) if (ret) return ret; + ret = hns3_query_mac_stats_reg_num(hw); + if (ret) + return ret; + if (hw->revision < PCI_REVISION_ID_HIP09_A) { hns3_set_default_dev_specifications(hw); hw->intr.mapping_mode = HNS3_INTR_MAPPING_VEC_RSV_ONE; @@ -2821,7 +2823,6 @@ hns3_get_board_configuration(struct hns3_hw *hw) hw->mac.media_type = cfg.media_type; hw->rss_size_max = cfg.rss_size_max; - hw->rss_dis_flag = false; memcpy(hw->mac.mac_addr, cfg.mac_addr, RTE_ETHER_ADDR_LEN); hw->mac.phy_addr = cfg.phy_addr; hw->dcb_info.num_pg = 1; @@ -4360,10 +4361,12 @@ hns3_service_handler(void *param) struct hns3_adapter *hns = eth_dev->data->dev_private; struct hns3_hw *hw = &hns->hw; - if (!hns3_is_reset_pending(hns)) + if (!hns3_is_reset_pending(hns)) { hns3_update_linkstatus_and_event(hw, true); - else + hns3_update_hw_stats(hw); + } else { hns3_warn(hw, "Cancel the query when reset is pending"); + } rte_eal_alarm_set(HNS3_SERVICE_INTERVAL, hns3_service_handler, eth_dev); } @@ -4374,6 +4377,10 @@ hns3_init_hardware(struct hns3_adapter *hns) struct hns3_hw *hw = &hns->hw; int ret; + /* + * All queue-related HW operations must be performed after the TCAM + * table is configured. + */ ret = hns3_map_tqp(hw); if (ret) { PMD_INIT_LOG(ERR, "Failed to map tqp: %d", ret); @@ -4614,13 +4621,6 @@ hns3_init_pf(struct rte_eth_dev *eth_dev) goto err_cmd_init; } - /* Hardware statistics of imissed registers cleared. */ - ret = hns3_update_imissed_stats(hw, true); - if (ret) { - hns3_err(hw, "clear imissed stats failed, ret = %d", ret); - goto err_cmd_init; - } - hns3_config_all_msix_error(hw, true); ret = rte_intr_callback_register(pci_dev->intr_handle, @@ -4646,7 +4646,7 @@ hns3_init_pf(struct rte_eth_dev *eth_dev) goto err_get_config; } - ret = hns3_tqp_stats_init(hw); + ret = hns3_stats_init(hw); if (ret) goto err_get_config; @@ -4692,7 +4692,7 @@ err_enable_intr: err_fdir: hns3_uninit_umv_space(hw); err_init_hw: - hns3_tqp_stats_uninit(hw); + hns3_stats_uninit(hw); err_get_config: hns3_pf_disable_irq0(hw); rte_intr_disable(pci_dev->intr_handle); @@ -4726,7 +4726,7 @@ hns3_uninit_pf(struct rte_eth_dev *eth_dev) hns3_flow_uninit(eth_dev); hns3_fdir_filter_uninit(hns); hns3_uninit_umv_space(hw); - hns3_tqp_stats_uninit(hw); + hns3_stats_uninit(hw); hns3_config_mac_tnl_int(hw, false); hns3_pf_disable_irq0(hw); rte_intr_disable(pci_dev->intr_handle); @@ -5342,7 +5342,7 @@ hns3_get_current_fc_mode(struct rte_eth_dev *dev) return hns3_get_autoneg_fc_mode(hw); } -static int +int hns3_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) { struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private); @@ -5543,15 +5543,15 @@ hns3_reinit_dev(struct hns3_adapter *hns) return ret; } - ret = hns3_reset_all_tqps(hns); + ret = hns3_init_hardware(hns); if (ret) { - hns3_err(hw, "Failed to reset all queues: %d", ret); + hns3_err(hw, "Failed to init hardware: %d", ret); return ret; } - ret = hns3_init_hardware(hns); + ret = hns3_reset_all_tqps(hns); if (ret) { - hns3_err(hw, "Failed to init hardware: %d", ret); + hns3_err(hw, "Failed to reset all queues: %d", ret); return ret; } @@ -6560,6 +6560,7 @@ static const struct eth_dev_ops hns3_eth_dev_ops = { .timesync_adjust_time = hns3_timesync_adjust_time, .timesync_read_time = hns3_timesync_read_time, .timesync_write_time = hns3_timesync_write_time, + .eth_dev_priv_dump = hns3_eth_dev_priv_dump, }; static const struct hns3_reset_ops hns3_reset_ops = {