X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fhns3%2Fhns3_ethdev.h;h=e28056b1bd604620ba5d62cb4430743ac9b58091;hb=92ef4b8f1688ded571fb2085727e5e82f2afe5d6;hp=aef3043d4621a4518ccb4d4b7c587c3d7eaa94f9;hpb=70791213242ea01f75fb2706fcf75a1f52efa068;p=dpdk.git diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h index aef3043d46..e28056b1bd 100644 --- a/drivers/net/hns3/hns3_ethdev.h +++ b/drivers/net/hns3/hns3_ethdev.h @@ -5,6 +5,7 @@ #ifndef _HNS3_ETHDEV_H_ #define _HNS3_ETHDEV_H_ +#include #include #include #include @@ -41,6 +42,9 @@ #define HNS3_PF_FUNC_ID 0 #define HNS3_1ST_VF_FUNC_ID 1 +#define HNS3_DEFAULT_PORT_CONF_BURST_SIZE 32 +#define HNS3_DEFAULT_PORT_CONF_QUEUES_NUM 1 + #define HNS3_SW_SHIFT_AND_DISCARD_MODE 0 #define HNS3_HW_SHIFT_AND_DISCARD_MODE 1 @@ -151,7 +155,6 @@ struct hns3_tc_queue_info { }; struct hns3_cfg { - uint8_t vmdq_vport_num; uint8_t tc_num; uint16_t tqp_desc_num; uint16_t rx_buf_len; @@ -185,7 +188,6 @@ enum hns3_media_type { struct hns3_mac { uint8_t mac_addr[RTE_ETHER_ADDR_LEN]; - bool default_addr_setted; /* whether default addr(mac_addr) is set */ uint8_t media_type; uint8_t phy_addr; uint8_t link_duplex : 1; /* ETH_LINK_[HALF/FULL]_DUPLEX */ @@ -478,6 +480,11 @@ struct hns3_hw { struct hns3_cmq cmq; struct hns3_mbx_resp_status mbx_resp; /* mailbox response */ struct hns3_mac mac; + /* + * This flag indicates dev_set_link_down() API is called, and is cleared + * by dev_set_link_up() or dev_start(). + */ + bool set_link_down; unsigned int secondary_cnt; /* Number of secondary processes init'd. */ struct hns3_tqp_stats tqp_stats; /* Include Mac stats | Rx stats | Tx stats */ @@ -485,6 +492,7 @@ struct hns3_hw { struct hns3_rx_missed_stats imissed_stats; uint64_t oerror_stats; uint32_t fw_version; + uint16_t pf_vf_if_version; /* version of communication interface */ uint16_t num_msi; uint16_t total_tqps_num; /* total task queue pairs of this PF */ @@ -624,6 +632,12 @@ struct hns3_hw { uint8_t udp_cksum_mode; struct hns3_port_base_vlan_config port_base_vlan_cfg; + + pthread_mutex_t flows_lock; /* rte_flow ops lock */ + struct hns3_fdir_rule_list flow_fdir_list; /* flow fdir rule list */ + struct hns3_rss_filter_list flow_rss_list; /* flow RSS rule list */ + struct hns3_flow_mem_list flow_list; + /* * PMD setup and configuration is not thread safe. Since it is not * performance sensitive, it is better to guarantee thread-safety @@ -690,6 +704,8 @@ struct hns3_vtag_cfg { enum hns3_mp_req_type { HNS3_MP_REQ_START_RXTX = 1, HNS3_MP_REQ_STOP_RXTX, + HNS3_MP_REQ_START_TX, + HNS3_MP_REQ_STOP_TX, HNS3_MP_REQ_MAX }; @@ -731,7 +747,7 @@ struct hns3_ptype_table { * descriptor, it functions only when firmware report the capability of * HNS3_CAPS_RXD_ADV_LAYOUT_B and driver enabled it. */ - uint32_t ptype[HNS3_PTYPE_NUM] __rte_cache_min_aligned; + uint32_t ptype[HNS3_PTYPE_NUM] __rte_cache_aligned; }; #define HNS3_FIXED_MAX_TQP_NUM_MODE 0 @@ -776,6 +792,7 @@ struct hns3_pf { uint8_t prio_tc[HNS3_MAX_USER_PRIO]; /* TC indexed by prio */ uint16_t pause_time; bool support_fc_autoneg; /* support FC autonegotiate */ + bool support_multi_tc_pause; uint16_t wanted_umv_size; uint16_t max_umv_size; @@ -835,7 +852,7 @@ struct hns3_adapter { uint64_t dev_caps_mask; - struct hns3_ptype_table ptype_tbl __rte_cache_min_aligned; + struct hns3_ptype_table ptype_tbl __rte_cache_aligned; }; enum { @@ -851,55 +868,23 @@ enum { #define HNS3_DEVARG_DEV_CAPS_MASK "dev_caps_mask" -#define HNS3_DEV_SUPPORT_DCB_B 0x0 -#define HNS3_DEV_SUPPORT_COPPER_B 0x1 -#define HNS3_DEV_SUPPORT_UDP_GSO_B 0x2 -#define HNS3_DEV_SUPPORT_FD_QUEUE_REGION_B 0x3 -#define HNS3_DEV_SUPPORT_PTP_B 0x4 -#define HNS3_DEV_SUPPORT_TX_PUSH_B 0x5 -#define HNS3_DEV_SUPPORT_INDEP_TXRX_B 0x6 -#define HNS3_DEV_SUPPORT_STASH_B 0x7 -#define HNS3_DEV_SUPPORT_RXD_ADV_LAYOUT_B 0x9 -#define HNS3_DEV_SUPPORT_OUTER_UDP_CKSUM_B 0xA -#define HNS3_DEV_SUPPORT_RAS_IMP_B 0xB - -#define hns3_dev_dcb_supported(hw) \ - hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_DCB_B) - -/* Support copper media type */ -#define hns3_dev_copper_supported(hw) \ - hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_COPPER_B) - -/* Support UDP GSO offload */ -#define hns3_dev_udp_gso_supported(hw) \ - hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_UDP_GSO_B) - -/* Support the queue region action rule of flow directory */ -#define hns3_dev_fd_queue_region_supported(hw) \ - hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_FD_QUEUE_REGION_B) - -/* Support PTP timestamp offload */ -#define hns3_dev_ptp_supported(hw) \ - hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_PTP_B) - -#define hns3_dev_tx_push_supported(hw) \ - hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_TX_PUSH_B) - -/* Support to Independently enable/disable/reset Tx or Rx queues */ -#define hns3_dev_indep_txrx_supported(hw) \ - hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_INDEP_TXRX_B) - -#define hns3_dev_stash_supported(hw) \ - hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_STASH_B) - -#define hns3_dev_rxd_adv_layout_supported(hw) \ - hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_RXD_ADV_LAYOUT_B) - -#define hns3_dev_outer_udp_cksum_supported(hw) \ - hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_OUTER_UDP_CKSUM_B) +enum { + HNS3_DEV_SUPPORT_DCB_B, + HNS3_DEV_SUPPORT_COPPER_B, + HNS3_DEV_SUPPORT_FD_QUEUE_REGION_B, + HNS3_DEV_SUPPORT_PTP_B, + HNS3_DEV_SUPPORT_TX_PUSH_B, + HNS3_DEV_SUPPORT_INDEP_TXRX_B, + HNS3_DEV_SUPPORT_STASH_B, + HNS3_DEV_SUPPORT_RXD_ADV_LAYOUT_B, + HNS3_DEV_SUPPORT_OUTER_UDP_CKSUM_B, + HNS3_DEV_SUPPORT_RAS_IMP_B, + HNS3_DEV_SUPPORT_TM_B, + HNS3_DEV_SUPPORT_VF_VLAN_FLT_MOD_B, +}; -#define hns3_dev_ras_imp_supported(hw) \ - hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_RAS_IMP_B) +#define hns3_dev_get_support(hw, _name) \ + hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_##_name##_B) #define HNS3_DEV_PRIVATE_TO_HW(adapter) \ (&((struct hns3_adapter *)adapter)->hw) @@ -980,13 +965,13 @@ static inline void hns3_write_reg(void *base, uint32_t reg, uint32_t value) } /* - * The optimized function for writing registers used in the '.rx_pkt_burst' and - * '.tx_pkt_burst' ops implementation function. + * The optimized function for writing registers reduces one address addition + * calculation, it was used in the '.rx_pkt_burst' and '.tx_pkt_burst' ops + * implementation function. */ static inline void hns3_write_reg_opt(volatile void *addr, uint32_t value) { - rte_io_wmb(); - rte_write32_relaxed(rte_cpu_to_le_32(value), addr); + rte_write32(rte_cpu_to_le_32(value), addr); } static inline uint32_t hns3_read_reg(void *base, uint32_t reg) @@ -1001,8 +986,6 @@ static inline uint32_t hns3_read_reg(void *base, uint32_t reg) #define hns3_read_dev(a, reg) \ hns3_read_reg((a)->io_base, (reg)) -#define ARRAY_SIZE(x) RTE_DIM(x) - #define NEXT_ITEM_OF_ACTION(act, actions, index) \ do { \ act = (actions) + (index); \ @@ -1015,15 +998,9 @@ static inline uint32_t hns3_read_reg(void *base, uint32_t reg) #define MSEC_PER_SEC 1000L #define USEC_PER_MSEC 1000L -static inline uint64_t -get_timeofday_ms(void) -{ - struct timeval tv; - - (void)gettimeofday(&tv, NULL); - - return (uint64_t)tv.tv_sec * MSEC_PER_SEC + tv.tv_usec / USEC_PER_MSEC; -} +void hns3_clock_gettime(struct timeval *tv); +uint64_t hns3_clock_calctime_ms(struct timeval *tv); +uint64_t hns3_clock_gettime_ms(void); static inline uint64_t hns3_atomic_test_bit(unsigned int nr, volatile uint64_t *addr)