X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fhns3%2Fhns3_ethdev.h;h=f3cc88f43e9aa9a63531094e16c0cb326f7de392;hb=11f99cfc886fff5e7c60218c50d993227871460f;hp=a6622a66bfc4f90cb456ba9c23fc805f9ddff116;hpb=77d1f6b1afc8a685c5685141e14d866fe2434e99;p=dpdk.git

diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h
index a6622a66bf..f3cc88f43e 100644
--- a/drivers/net/hns3/hns3_ethdev.h
+++ b/drivers/net/hns3/hns3_ethdev.h
@@ -155,7 +155,6 @@ struct hns3_tc_queue_info {
 };
 
 struct hns3_cfg {
-	uint8_t vmdq_vport_num;
 	uint8_t tc_num;
 	uint16_t tqp_desc_num;
 	uint16_t rx_buf_len;
@@ -189,13 +188,12 @@ enum hns3_media_type {
 
 struct hns3_mac {
 	uint8_t mac_addr[RTE_ETHER_ADDR_LEN];
-	bool default_addr_setted; /* whether default addr(mac_addr) is set */
 	uint8_t media_type;
 	uint8_t phy_addr;
-	uint8_t link_duplex  : 1; /* ETH_LINK_[HALF/FULL]_DUPLEX */
-	uint8_t link_autoneg : 1; /* ETH_LINK_[AUTONEG/FIXED] */
-	uint8_t link_status  : 1; /* ETH_LINK_[DOWN/UP] */
-	uint32_t link_speed;      /* ETH_SPEED_NUM_ */
+	uint8_t link_duplex  : 1; /* RTE_ETH_LINK_[HALF/FULL]_DUPLEX */
+	uint8_t link_autoneg : 1; /* RTE_ETH_LINK_[AUTONEG/FIXED] */
+	uint8_t link_status  : 1; /* RTE_ETH_LINK_[DOWN/UP] */
+	uint32_t link_speed;      /* RTE_ETH_SPEED_NUM_ */
 	/*
 	 * Some firmware versions support only the SFP speed query. In addition
 	 * to the SFP speed query, some firmware supports the query of the speed
@@ -430,6 +428,17 @@ struct hns3_reset_data {
 	struct hns3_wait_data *wait_data;
 };
 
+struct hns3_hw_ops {
+	int (*add_mc_mac_addr)(struct hns3_hw *hw,
+				struct rte_ether_addr *mac_addr);
+	int (*del_mc_mac_addr)(struct hns3_hw *hw,
+				struct rte_ether_addr *mac_addr);
+	int (*add_uc_mac_addr)(struct hns3_hw *hw,
+				struct rte_ether_addr *mac_addr);
+	int (*del_uc_mac_addr)(struct hns3_hw *hw,
+				struct rte_ether_addr *mac_addr);
+};
+
 #define HNS3_INTR_MAPPING_VEC_RSV_ONE		0
 #define HNS3_INTR_MAPPING_VEC_ALL		1
 
@@ -482,6 +491,11 @@ struct hns3_hw {
 	struct hns3_cmq cmq;
 	struct hns3_mbx_resp_status mbx_resp; /* mailbox response */
 	struct hns3_mac mac;
+	/*
+	 * This flag indicates dev_set_link_down() API is called, and is cleared
+	 * by dev_set_link_up() or dev_start().
+	 */
+	bool set_link_down;
 	unsigned int secondary_cnt; /* Number of secondary processes init'd. */
 	struct hns3_tqp_stats tqp_stats;
 	/* Include Mac stats | Rx stats | Tx stats */
@@ -489,6 +503,7 @@ struct hns3_hw {
 	struct hns3_rx_missed_stats imissed_stats;
 	uint64_t oerror_stats;
 	uint32_t fw_version;
+	uint16_t pf_vf_if_version;  /* version of communication interface */
 
 	uint16_t num_msi;
 	uint16_t total_tqps_num;    /* total task queue pairs of this PF */
@@ -618,7 +633,7 @@ struct hns3_hw {
 	 *  - HNS3_SPECIAL_PORT_SW_CKSUM_MODE
 	 *     In this mode, HW can not do checksum for special UDP port like
 	 *     4789, 4790, 6081 for non-tunnel UDP packets and UDP tunnel
-	 *     packets without the PKT_TX_TUNEL_MASK in the mbuf. So, PMD need
+	 *     packets without the RTE_MBUF_F_TX_TUNEL_MASK in the mbuf. So, PMD need
 	 *     do the checksum for these packets to avoid a checksum error.
 	 *
 	 *  - HNS3_SPECIAL_PORT_HW_CKSUM_MODE
@@ -630,6 +645,11 @@ struct hns3_hw {
 	struct hns3_port_base_vlan_config port_base_vlan_cfg;
 
 	pthread_mutex_t flows_lock; /* rte_flow ops lock */
+	struct hns3_fdir_rule_list flow_fdir_list; /* flow fdir rule list */
+	struct hns3_rss_filter_list flow_rss_list; /* flow RSS rule list */
+	struct hns3_flow_mem_list flow_list;
+
+	struct hns3_hw_ops ops;
 
 	/*
 	 * PMD setup and configuration is not thread safe. Since it is not
@@ -697,6 +717,8 @@ struct hns3_vtag_cfg {
 enum hns3_mp_req_type {
 	HNS3_MP_REQ_START_RXTX = 1,
 	HNS3_MP_REQ_STOP_RXTX,
+	HNS3_MP_REQ_START_TX,
+	HNS3_MP_REQ_STOP_TX,
 	HNS3_MP_REQ_MAX
 };
 
@@ -738,7 +760,7 @@ struct hns3_ptype_table {
 	 * descriptor, it functions only when firmware report the capability of
 	 * HNS3_CAPS_RXD_ADV_LAYOUT_B and driver enabled it.
 	 */
-	uint32_t ptype[HNS3_PTYPE_NUM] __rte_cache_min_aligned;
+	uint32_t ptype[HNS3_PTYPE_NUM] __rte_cache_aligned;
 };
 
 #define HNS3_FIXED_MAX_TQP_NUM_MODE		0
@@ -783,6 +805,7 @@ struct hns3_pf {
 	uint8_t prio_tc[HNS3_MAX_USER_PRIO]; /* TC indexed by prio */
 	uint16_t pause_time;
 	bool support_fc_autoneg;       /* support FC autonegotiate */
+	bool support_multi_tc_pause;
 
 	uint16_t wanted_umv_size;
 	uint16_t max_umv_size;
@@ -841,8 +864,9 @@ struct hns3_adapter {
 	uint32_t tx_func_hint;
 
 	uint64_t dev_caps_mask;
+	uint16_t mbx_time_limit_ms; /* wait time for mbx message */
 
-	struct hns3_ptype_table ptype_tbl __rte_cache_min_aligned;
+	struct hns3_ptype_table ptype_tbl __rte_cache_aligned;
 };
 
 enum {
@@ -858,48 +882,25 @@ enum {
 
 #define HNS3_DEVARG_DEV_CAPS_MASK	"dev_caps_mask"
 
+#define HNS3_DEVARG_MBX_TIME_LIMIT_MS	"mbx_time_limit_ms"
+
 enum {
 	HNS3_DEV_SUPPORT_DCB_B,
 	HNS3_DEV_SUPPORT_COPPER_B,
 	HNS3_DEV_SUPPORT_FD_QUEUE_REGION_B,
 	HNS3_DEV_SUPPORT_PTP_B,
+	HNS3_DEV_SUPPORT_TX_PUSH_B,
 	HNS3_DEV_SUPPORT_INDEP_TXRX_B,
 	HNS3_DEV_SUPPORT_STASH_B,
 	HNS3_DEV_SUPPORT_RXD_ADV_LAYOUT_B,
 	HNS3_DEV_SUPPORT_OUTER_UDP_CKSUM_B,
 	HNS3_DEV_SUPPORT_RAS_IMP_B,
+	HNS3_DEV_SUPPORT_TM_B,
+	HNS3_DEV_SUPPORT_VF_VLAN_FLT_MOD_B,
 };
 
-#define hns3_dev_dcb_supported(hw) \
-	hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_DCB_B)
-
-/* Support copper media type */
-#define hns3_dev_copper_supported(hw) \
-	hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_COPPER_B)
-
-/* Support the queue region action rule of flow directory */
-#define hns3_dev_fd_queue_region_supported(hw) \
-	hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_FD_QUEUE_REGION_B)
-
-/* Support PTP timestamp offload */
-#define hns3_dev_ptp_supported(hw) \
-	hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_PTP_B)
-
-/* Support to Independently enable/disable/reset Tx or Rx queues */
-#define hns3_dev_indep_txrx_supported(hw) \
-	hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_INDEP_TXRX_B)
-
-#define hns3_dev_stash_supported(hw) \
-	hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_STASH_B)
-
-#define hns3_dev_rxd_adv_layout_supported(hw) \
-	hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_RXD_ADV_LAYOUT_B)
-
-#define hns3_dev_outer_udp_cksum_supported(hw) \
-	hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_OUTER_UDP_CKSUM_B)
-
-#define hns3_dev_ras_imp_supported(hw) \
-	hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_RAS_IMP_B)
+#define hns3_dev_get_support(hw, _name) \
+	hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_##_name##_B)
 
 #define HNS3_DEV_PRIVATE_TO_HW(adapter) \
 	(&((struct hns3_adapter *)adapter)->hw)
@@ -1060,6 +1061,14 @@ void hns3vf_update_link_status(struct hns3_hw *hw, uint8_t link_status,
 			  uint32_t link_speed, uint8_t link_duplex);
 void hns3_parse_devargs(struct rte_eth_dev *dev);
 void hns3vf_update_push_lsc_cap(struct hns3_hw *hw, bool supported);
+int hns3_configure_all_mc_mac_addr(struct hns3_adapter *hns, bool del);
+int hns3_configure_all_mac_addr(struct hns3_adapter *hns, bool del);
+int hns3_add_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr,
+		__rte_unused uint32_t idx, __rte_unused uint32_t pool);
+void hns3_remove_mac_addr(struct rte_eth_dev *dev, uint32_t idx);
+int hns3_set_mc_mac_addr_list(struct rte_eth_dev *dev,
+			struct rte_ether_addr *mc_addr_set,
+							uint32_t nb_mc_addr);
 int hns3_restore_ptp(struct hns3_adapter *hns);
 int hns3_mbuf_dyn_rx_timestamp_register(struct rte_eth_dev *dev,
 				    struct rte_eth_conf *conf);
@@ -1091,9 +1100,9 @@ static inline uint64_t
 hns3_txvlan_cap_get(struct hns3_hw *hw)
 {
 	if (hw->port_base_vlan_cfg.state)
-		return DEV_TX_OFFLOAD_VLAN_INSERT;
+		return RTE_ETH_TX_OFFLOAD_VLAN_INSERT;
 	else
-		return DEV_TX_OFFLOAD_VLAN_INSERT | DEV_TX_OFFLOAD_QINQ_INSERT;
+		return RTE_ETH_TX_OFFLOAD_VLAN_INSERT | RTE_ETH_TX_OFFLOAD_QINQ_INSERT;
 }
 
 #endif /* _HNS3_ETHDEV_H_ */